99 #define ETH_ISR_VOID (0x00U) 101 #define ETH_ISR_CAT1 (0x01U) 103 #define ETH_ISR_CAT2 (0x02U) 135 #if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID) 137 #elif (ETH_ISR_TYPE == ETH_ISR_CAT2) 160 #if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID) 162 #elif (ETH_ISR_TYPE == ETH_ISR_CAT2) 184 #if (STD_ON == ETH_ENABLE_MII_API) 185 #if (ETH_ISR_TYPE == ETH_ISR_CAT1 || ETH_ISR_TYPE == ETH_ISR_VOID) 187 #elif (ETH_ISR_TYPE == ETH_ISR_CAT2) void Eth_TxIrqHdlr_0(void)
ISR for frame transmission interrupts of the indexed controller.
ISR(Cdd_IpcIrqMbxFromMcu_20)
A Mailbox can raise multiple interrupts. In this implementation, the Mailbox new message interrupt is...
void Eth_RxIrqHdlr_0(void)
ISR for frame reception interrupts of the indexed controller.
void Eth_MdioIrqHdlr_0(void)
ISR for MDIO interrupts of the indexed controller.