PDK API Guide for J721E
pmic_core_lp8764x.h
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33 
41 #ifndef PMIC_CORE_LP8764X_H_
42 #define PMIC_CORE_LP8764X_H_
43 
44 /* ========================================================================== */
45 /* Include Files */
46 /* ========================================================================== */
47 
48 #ifdef __cplusplus
49 extern "C" {
50 #endif
51 
52 /* ========================================================================== */
53 /* Macros & Typedefs */
54 /* ========================================================================== */
55 
56 /* On J7200 1.0 EVM, PMIC_HERA_DEV_REV_ID is 0x03 */
57 #define PMIC_HERA_DEV_REV_ID_PG_1_0 (0x03U)
58 
59 /* On J7200 2.0 EVM, PMIC_HERA_DEV_REV_ID is 0x43U */
60 #define PMIC_HERA_DEV_REV_ID_PG_2_0 (0x43U)
61 
69 #define PMIC_LP8764X_EEPROM_DEFAULTS_LOAD_TO_CONF_OTHER_REGS (0U)
70 
71 #define PMIC_LP8764X_EEPROM_DEFAULTS_NOT_LOADED_TO_CONF_OTHER_REGS (1U)
72 
81 #define PMIC_LP8764X_SKIP_EEPROM_DEF_LD_TO_CONF_OTHER_REGS_DISABLED (0U)
82 
84 #define PMIC_LP8764X_SKIP_EEPROM_DEF_LD_TO_CONF_OTHER_REGS_ENABLED (1U)
85 
93 #define PMIC_LP8764X_REF_OUT_PIN_CFG_DISABLE (0U)
94 
95 #define PMIC_LP8764X_REF_OUT_PIN_CFG_ENABLE (1U)
96 /* @} */
97 
105 #define PMIC_LP8764X_SYNCCLKIN_1_1_MHZ (0U)
106 
107 #define PMIC_LP8764X_SYNCCLKIN_2_2_MHZ (1U)
108 
109 #define PMIC_LP8764X_SYNCCLKIN_4_4_MHZ (2U)
110 
111 #define PMIC_LP8764X_SYNCCLKIN_8_8_MHZ (3U)
112 /* @} */
113 
114 
115 /*==========================================================================*/
116 /* Structures and Enums */
117 /*==========================================================================*/
118 
119 /*==========================================================================*/
120 /* Function Declarations */
121 /*==========================================================================*/
122 
123 #ifdef __cplusplus
124 }
125 #endif /* __cplusplus */
126 
127 #endif /* PMIC_CORE_LP8764X_H_ */