J721E_LEGACY Board Configuration Resource Assignment Type Descriptions¶
Introduction¶
This chapter provides information of Board Configuration resource assignment type IDs that are permitted in the J721E_LEGACY SoC. The resource type IDs represent J721E_LEGACY resources ranges assignable to SoC processing entities (or PEs).
WARNING: System Firmware RM currently supports a maximum of 600 RM board configuration resource assignment ranges on the J721E_LEGACY SoC. Sending more entries than the maximum will result in the RM board configuration being NACK’d
| Device Name | Device ID (10-bits) | Subtype Name | Subtype ID (6-bits) | Unique Type ID (16-bits) | Resource Range Start | Resource Range Number |
|---|---|---|---|---|---|---|
| J721E_DEV_C66SS0_INTROUTER0 | 0x079 | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x1E40 | 4 | 93 |
| J721E_DEV_C66SS1_INTROUTER0 | 0x07A | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x1E80 | 4 | 93 |
| J721E_DEV_CMPEVENT_INTRTR0 | 0x07B | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x1EC0 | 0 | 32 |
| J721E_DEV_MAIN2MCU_LVL_INTRTR0 | 0x080 | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x2000 | 0 | 64 |
| J721E_DEV_MAIN2MCU_PLS_INTRTR0 | 0x082 | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x2080 | 0 | 48 |
| J721E_DEV_GPIOMUX_INTRTR0 | 0x083 | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x20C0 | 0 | 64 |
| J721E_DEV_R5FSS0_INTROUTER0 | 0x086 | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x2180 | 0 | 256 |
| J721E_DEV_R5FSS1_INTROUTER0 | 0x087 | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x21C0 | 0 | 256 |
| J721E_DEV_TIMESYNC_INTRTR0 | 0x088 | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x2200 | 0 | 48 |
| J721E_DEV_WKUP_GPIOMUX_INTRTR0 | 0x089 | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x2240 | 0 | 32 |
| J721E_DEV_NAVSS0_MODSS_INTAGGR_0 | 0x0CF | RESASG_SUBTYPE_IA_VINT | 0x0A | 0x33CA | 0 | 64 |
| RESASG_SUBTYPE_GLOBAL_EVENT_SEVT | 0x0D | 0x33CD | 20480 | 1024 | ||
| J721E_DEV_NAVSS0_MODSS_INTAGGR_1 | 0x0D0 | RESASG_SUBTYPE_IA_VINT | 0x0A | 0x340A | 0 | 64 |
| RESASG_SUBTYPE_GLOBAL_EVENT_SEVT | 0x0D | 0x340D | 22528 | 1024 | ||
| J721E_DEV_NAVSS0_UDMASS_INTAGGR_0 | 0x0D1 | RESASG_SUBTYPE_IA_VINT | 0x0A | 0x344A | 38 | 218 |
| RESASG_SUBTYPE_GLOBAL_EVENT_SEVT | 0x0D | 0x344D | 38 | 4570 | ||
| J721E_DEV_NAVSS0_PROXY_0 | 0x0D2 | RESASG_SUBTYPE_PROXY_PROXIES | 0x00 | 0x3480 | 0 | 64 |
| J721E_DEV_NAVSS0_RINGACC_0 | 0x0D3 | RESASG_SUBTYPE_RA_ERROR_OES | 0x00 | 0x34C0 | 0 | 1 |
| RESASG_SUBTYPE_RA_GP | 0x01 | 0x34C1 | 440 | 534 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX | 0x02 | 0x34C2 | 316 | 124 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX | 0x03 | 0x34C3 | 16 | 124 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX_EXT | 0x04 | 0x34C4 | 140 | 160 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX_H | 0x05 | 0x34C5 | 304 | 12 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX_UH | 0x06 | 0x34C6 | 300 | 4 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX_H | 0x07 | 0x34C7 | 4 | 12 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX_UH | 0x08 | 0x34C8 | 0 | 4 | ||
| RESASG_SUBTYPE_RA_VIRTID | 0x0A | 0x34CA | 0 | 4096 | ||
| RESASG_SUBTYPE_RA_MONITORS | 0x0B | 0x34CB | 0 | 32 | ||
| J721E_DEV_NAVSS0_UDMAP_0 | 0x0D4 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON | 0x00 | 0x3500 | 140 | 160 |
| RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES | 0x01 | 0x3501 | 0 | 1 | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER | 0x02 | 0x3502 | 49152 | 1024 | ||
| RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG | 0x03 | 0x3503 | 0 | 1 | ||
| RESASG_SUBTYPE_UDMAP_RX_CHAN | 0x0A | 0x350A | 16 | 124 | ||
| RESASG_SUBTYPE_UDMAP_RX_HCHAN | 0x0B | 0x350B | 4 | 12 | ||
| RESASG_SUBTYPE_UDMAP_RX_UHCHAN | 0x0C | 0x350C | 0 | 4 | ||
| RESASG_SUBTYPE_UDMAP_TX_CHAN | 0x0D | 0x350D | 16 | 124 | ||
| RESASG_SUBTYPE_UDMAP_TX_ECHAN | 0x0E | 0x350E | 140 | 160 | ||
| RESASG_SUBTYPE_UDMAP_TX_HCHAN | 0x0F | 0x350F | 4 | 12 | ||
| RESASG_SUBTYPE_UDMAP_TX_UHCHAN | 0x10 | 0x3510 | 0 | 4 | ||
| J721E_DEV_NAVSS0_INTR_ROUTER_0 | 0x0D5 | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x3540 | 10 | 178 |
| 196 | 28 | |||||
| 228 | 28 | |||||
| 260 | 28 | |||||
| 292 | 52 | |||||
| 348 | 28 | |||||
| 380 | 132 | |||||
| J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0 | 0x0E9 | RESASG_SUBTYPE_IA_VINT | 0x0A | 0x3A4A | 8 | 248 |
| RESASG_SUBTYPE_GLOBAL_EVENT_SEVT | 0x0D | 0x3A4D | 16392 | 1528 | ||
| J721E_DEV_MCU_NAVSS0_PROXY0 | 0x0EA | RESASG_SUBTYPE_PROXY_PROXIES | 0x00 | 0x3A80 | 1 | 63 |
| J721E_DEV_MCU_NAVSS0_RINGACC0 | 0x0EB | RESASG_SUBTYPE_RA_ERROR_OES | 0x00 | 0x3AC0 | 0 | 1 |
| RESASG_SUBTYPE_RA_GP | 0x01 | 0x3AC1 | 96 | 156 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX | 0x02 | 0x3AC2 | 50 | 43 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX | 0x03 | 0x3AC3 | 2 | 44 | ||
| RESASG_SUBTYPE_RA_UDMAP_RX_H | 0x05 | 0x3AC5 | 48 | 2 | ||
| RESASG_SUBTYPE_RA_UDMAP_TX_H | 0x07 | 0x3AC7 | 0 | 2 | ||
| RESASG_SUBTYPE_RA_VIRTID | 0x0A | 0x3ACA | 0 | 4096 | ||
| RESASG_SUBTYPE_RA_MONITORS | 0x0B | 0x3ACB | 0 | 32 | ||
| J721E_DEV_MCU_NAVSS0_UDMAP_0 | 0x0EC | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON | 0x00 | 0x3B00 | 48 | 48 |
| RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES | 0x01 | 0x3B01 | 0 | 1 | ||
| RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER | 0x02 | 0x3B02 | 56320 | 256 | ||
| RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG | 0x03 | 0x3B03 | 0 | 1 | ||
| RESASG_SUBTYPE_UDMAP_RX_CHAN | 0x0A | 0x3B0A | 2 | 43 | ||
| RESASG_SUBTYPE_UDMAP_RX_HCHAN | 0x0B | 0x3B0B | 0 | 2 | ||
| RESASG_SUBTYPE_UDMAP_TX_CHAN | 0x0D | 0x3B0D | 2 | 44 | ||
| RESASG_SUBTYPE_UDMAP_TX_HCHAN | 0x0F | 0x3B0F | 0 | 2 | ||
| J721E_DEV_MCU_NAVSS0_INTR_0 | 0x0ED | RESASG_SUBTYPE_IR_OUTPUT | 0x00 | 0x3B40 | 4 | 28 |
| 36 | 28 |