PDK Documentation
User Guide

Introduction

The Texas Instruments Platform Development Kit (PDK) is a single scalable software driver package that offers streamlined development on J721E ADAS Processor. The PDK package contains Device Abstraction Layer libraries and peripheral/board level sample/demo examples that demonstrate the capabilities of the peripherals on J721E platform for development, deployment and execution of applications.


Scope

The purpose of this guide is to quickly provide the information you need most while evaluating and developing applications on a TI embedded processor, specifically running embedded real-time operating system. It is not intended to be a thorough design document. As such, the focus is on application programming interfaces (API), build information, and examples to use as a template to start development.


Building the PDK

The PDK comes with pre-built application and libraries for running the demos/examples and everything you need to start writing an application (Note: This is part of the binary package and not available with source only package). However, one may want to customize and rebuild the source. Inside the PDK there is a top-level makefile at PDK_INSTALL_DIR/packages/ti/build that can be used to build some of the sub-components found within the PDK. Prior to calling this makefile, user needs to get the correct tool chains and setup the environment by updating Rules.make available at PDK_INSTALL_DIR/packages/ti/build


Build Steps

This section describes the steps to build the PDK package. For Windows machine, the package is built using the gmake from TI XDC package. For Linux machine, make can be used. In all below commands "gmake" can be replaced with "make" for Linux machine build. Also makefile internally uses some binaries like rm, mkdir echo from Cygwin.

To build all the examples and libraries you can use following command.

gmake -s allcores BOARD=j721e_evm

This will build all examples and libraries for all applicable cores.

gmake -s all BOARD=j721e_evm CORE=mcu2_0

Command to clean all targets you can use following command

gmake -s allcores_clean BOARD=j721e_evm

Command to clean everything (all cores and all platforms/boards)

gmake -s allclean

Command to clean individual targets you can use following command

gmake -s <target>_clean BOARD=j721e_evm CORE=<core>

To know more build options run the below command.

gmake -s help BOARD=j721e_evm

Command to build an examples/demos/libraries you can use following command

gmake -s <app_name/comp> BOARD=<board> CORE=<core>

<app_name/comp> can be found from the help command as shown above or in the make file of the respective examples and library folder.

Note: The executable will be generated under PDK_INSTALL_DIR/packages/ti/binary/<example> folder.
Note: The library will be generated under PDK_INSTALL_DIR/packages/ti/<component>/lib/<soc>/<core>/<debug/release>/ folder.
IMPORTANT NOTE: If the installation folder depth is high then windows cmd prompt fails with error that it cannot find a file, even if the file is present in mentioned path, this is because Windows has a limitation of 8191 characters for the commands that can execute. In such situation as a workaround either restrict the folder depth to d:/ or if it cannot be restricted use git bash to build. Refer https://support.microsoft.com/en-in/kb/830473 for more details.
(Always point to xdc path gmake only)
IMPORTANT NOTE: If '-j' option is used in windows build and build fails then clean that particular application target and run the same command again w/o '-j' option.


Uniflash

Uniflash is a standalone tool to program the on board flash devices like NOR flash and HyperFlash with boot images. Please refer to Uniflash User guide for more details on Uniflash tool.

Uniflash includes a command line utility which runs on host PC and a flash writer which runs on HW target. Two modes are supported for downloading the flash writer to HW target.

  • JTAG
    • In this mode, JTAG is used for downloading the flash writer to HW target. Please refer to Flash Writer JTAG download for the steps to download flash writer using JTAG. Once flash writer is downloaded, further communication with target happens through UART.
  • UART
    • In this mode, UART boot is used to download the flash writer to the target. This mode is under development which will be supported in next release.

J721E Module Validation Table

Following table shows list of cores on which corresponding CSL-FL/driver (LLD) is validated. If certain module's (peripheral's) CSL-FL is not validated on the core, does not mean that the respective peripheral is not accessible from the same core. With proper SoC level configurations like interrupts configurations, etc., current CSL-FL sample application can be adapted to access any peripheral from any core. To check the accessibility of a peripheral from a core, please refer corresponding SoC 'Technical Reference Manual'.

mpu1_0 mcu1_0 mcu1_1 mcu2_0 mcu2_1 mcu3_0 mcu3_1 c66xdsp_1 c66xdsp_2 c7x_1
VHWA X
DSS X
CSI2RX X
SCICLIENT X X X X X X X X X X
IPC X X X X X X X X X X
UDMA X X X X X X X X X X
CPSW2G X
CPSW9G X
OSPI X X
MMCSD/FATFS X X
I2C X X X X X X X X X X
McSPI X
GPIO X X X X X X X X X X
UART X X X X X X X X X
McASP X X X X X
MCAN X X
SPINLOCK X X X
MAILBOX X X X
CRC X X
ESM X
ADC X
DCC X

Test Setup / Running examples

Refer the PSDKRA top level user guide for generic test setup details and steps to run the examples/demos using CCS/SBL.
For all examples logs will be available on CCS console or Uart console. Logs from mcu domain cores should be captured on J43 connector and logs from main domain cores should be captured on J44 connector. Refer to PSDKRA top level user guide for details.
Below sections mentions any special steps/setup required for each of the specific tests.

CSI Rx

  • Setup Details:
    • Connect the Fusion 1 Rev C to 'CSI EXP' MIPI connector available on J7 Common Processor Board.
    • Connect 4 IMX390 sensors to Fusion 1 board('Cam0' to 'Cam3' ports)
  • Expected result:
    • After capturing n frames, application shall print capture status like fps, number of error frames and number of dropped frames on the UART as well as on the CCS console.
    • Typically, number of error and dropped frames should be '0'. For 4 channel capture, fps should be ~120 fps(~30 fps per channel).

DSS

  • Setup Details:
    • Connect DP to Display 0 port available on the Common processor Board.
    • Connect the HDMI display on the HDMI port available on the infotainment daughter card.
  • Expected result:
    • Display test app will display on eDP connected to Display 0 port of Common Processor board.
    • A simple pattern with number is diaplyed.
    • Only 1080p display resolution is tested

OSPI

For OSPI application make sure that the SW3[1] should be off.

CPSW

  • Please refer the Cpsw Integration Guide for setup/test details. This Cpsw integration guide is available at PDK_INSTALL_DIR/packages/ti/drv/cpsw/docs/doxygen/html/cpsw_integration_guide_top.html
  • Please refer PHY Integration Guide to integrate PHY module and to know more about the state machine implemented in PHY driver. This PHY integration guide is available at PDK_INSTALL_DIR/packages/ti/drv/cpsw/docs/doxygen/html/cpsw_phy_guide_top.html
  • Please refer to PHY Link Configuration for guidelines to establish reliable Ethernet links in manual mode, auto-negotiation and strapping. This PHY Link Configuration document is available at PDK_INSTALL_DIR/packages/ti/drv/cpsw/docs/doxygen/html/cpsw_phy_link_config_top.html

VHWA

VHWA Examples requires the input images to be loaded in the memory. The example will print the addresses where the buffers needs to be loaded on the UART console.
Connect to the mcu2_1 core using CCS.
Make sure the core is halted and load the images using the scripting console.
Similarly the output buffer addresses are printed for each of the test cases.
Once the test case is executed, save the output buffers using the scripting console.

An example load and save commands to be run on the scripting console is as given below.

 loadRaw(0x90000000,0,"C:\\in.raw",32,false);
 saveRaw(0,0xA0000000,"C:\\out.raw",1048576,32,false); 

CSI Tx

CSITX sample application transmits the frames with running pattern on the CSI2TX interface and receives it on CSI2RX interface.

  • Board Modifications on J721E EVM:
    • By default, CSITX DPHY lanes are connected to UB941 serializer. To connect these lanes to DSI FPC Connector, do following modifications:
      • Un-install following registers(0 Ohm): R433, R434, R435, R436, R437, R438, R439, R440, R441, and R442
      • Install following registers(0 Ohm): R420, R421, R422, R423, R424, R425, R426, R427, R428, and R429
  • Setup Details:
    • Connect CSITX DPHY lanes (DSI FPC Connector) to CSIRX DPHY lanes (CSI2 EXP Port).
  • Expected result:
    • After transmitting 'n' frames, application shall print transmit and capture status like fps, number of error frames and number of dropped/repeated frames on the UART as well as on the CCS console.
    • Typically, number of error and dropped/repeated frames should be '0'.