Introduction

This release notes provides important information that will assist you in using the PDK software package. This document provides the product information and known issues that are specific to the PDK software package.

What's New

VHWA DOF
- Added FVID2 DOF driver
- Support for 12b packed and 8b input/output storage formats
- Confidence Score Histogram Support
- Configurable HSR and VSR Support
VHWA LDC
- Support for LDC Driver, based on FVID2 driver interface
- Support for YUV420, YUV422, Luma and Chroma data formats in LDC
- Support for multiple region mode for the LDC
VHWA VISS
- Support for VISS Driver, based on FVID2 driver interface
- Support for multi-exposure WDR merge mode
- Support for YUV420, YUV422, RGB, Grey and Saturation output data formats
- Support for configuring RAWFE, GLBCE, NSF3 and FlexCP components
CPSW9G
- Support for CPSW9G switch driver with following features:
  - Basic switching
  - VLAN aware switching
  - Multi-cast port group
  - RGMII 1G FullDuplex/100M FullDuplex
  - Switch Network and FIFO Statistics
  - Port VLAN configuration
  - VLAN Stripping and Insertion on egress
- Host Port Transmit and Receive from MCU_2_1
SCICLIENT
- Support to communicate with System Firmware executing on DMSC
- Support for Resource Management for UDMA driver
- Support for module power on/off
UDMA
- Support global event handle
  - With this support, this global event handle can be used as a master event while event registration
  - This enables interrupt aggregation up to 64 events across drivers/application
  - And hence reduces allocation of multiple NAVSS interrupt router outputs (which is typically very limited in number)
- Support for event disable and enable API
- Support ring attach for already created/configured ring
- Support flow attach for already created/configured flow
IPC
- Completed all CPU communication, Linux/BIOS, and BIOS/BIOS using Mailbox interrupt
- Added simpler examples to test two or more cores in Linux/BIOS
MCASP
- Support for MCASP driver
- Validated driver on MCU/Main R5F, A72 and C66x
Ethernet
- Support for 2-port Ethernet driver
- Validated driver on A72 and MCU R5F
OSPI
- Support for Octal-SPI driver
- Validated driver on A72 and MCU R5F

Upgrade and Compatibility

NA. This is a pre-silicon release.

Device Support

J721E Simulator (VLAB)

Validation Information

This release is validated on J721E Simulator (VLAB) for the above mentioned components. For details on the validated examples refer the test report.

Fixed Issues

ID	Head Line	Module	Affected Versions	Affected Platforms
PDK-3546	[CSIRX DRV]Virtual peripheral cannot send user specified images for RGB888('.png' file)	CSI2RX	00.05.00	J721E
PDK-3548	[CSIRX DRV]RAW12 capture is not working	CSI2RX	00.05.00	J721E
PDK-3689	R5 init code forcing cache write backs to be write through	CSL	00.05.00	J721E
PDK-3690	R5 cache operations missing barrier instructions	CSL	00.05.00	J721E
PDK-3650	CLEC supports only 1024 events	CSL	00.05.00	J721E
PDK-3635	DSS Event Manager master ISR doesn't clear interrupt status in correct sequence	DSS	00.03.00, 00.05.00	J721E
PDK-3560	DSS Video Crop is not supported on VLAB	DSS	00.05.00	J721E
PDK-3653	Fvid2_dequeue cannot be called from DSS pipePrgmCb	DSS	00.05.00	J721E
PDK-3572	FAT FS tests not enabled in MMC SD tests	FATFS	00.05.00	J721E
PDK-3566	Interrupt from C6x-1 and C6x-2 not received on C7x	IPC	00.05.00	J721E
PDK-3721	Annouce message from MCU2-0 to C7x fails when integrated into vision_apps	IPC	00.03.00, 00.05.00	J721E
PDK-3571	mmc sd ti rtos testcase load on mpu1_0 core not working	MMCSD	00.05.00	J721E
PDK-3672	SCICLIENT PM Get clock parent sends the set clock parent message ID	SCICLIENT	00.05.00	J721E
PDK-3338	UDMA Testcases not working on MPU1	UDMA	00.03.00	J721E
PDK-3863	[UDMA] Udma_chDequeueTdResponse not checking chHandle->tdCqRing for NULL	UDMA	00.05.00	J721E
PDK-3568	[VHWA_MSC] Multi-Handle test is not working	VHWA	00.05.00	J721E

Known Issues

ID	Head Line	Module	Reported in Release	Affected Platforms	Workaround in this release
PDK-3909	C66x_0 can't access 0x1000_0000 virtual address for RAT config	COMMON	00.08.00	J721E	NA
PDK-3910	C7x interrupt configuration options unspecified and insufficient in PDK	COMMON	00.08.00	J721E	NA
PDK-3967	[CPSW] Need IXIA to inject packet with CRC error to run CRC testcases	CPSW	00.08.00	J721E	NA
PDK-3981	[CPSW] RGMII Status Query - link not correct	CPSW	00.08.00	J721E	NA
PDK-3545	[CSIRX DRV]Unable to capture 16+ frames continuously	CSI2RX	00.05.00	J721E	Blocked on VLAB
PDK-3569	[CSIRX DRV]YUV422-8 bit capture is not working	CSI2RX	00.05.00	J721E	Blocked on VLAB
PDK-3570	[CSIRX DRV]Does not support capture on number data lanes 1 and 2.	CSI2RX	00.05.00	J721E	Blocked on VLAB
PDK-3547	[CSIRX DRV]Multi-channel capture is not working	CSI2RX	00.05.00	J721E	Blocked on VLAB
PDK-3518	[CSI2RX] CSL command timing out for test rerun on VLAB	CSI2RX	00.05.00	J721E	Blocked on VLAB
PDK-3551	Safety and security DSS interrupts are not modeled in VLAB	DSS	00.05.00	J721E	Blocked on VLAB
PDK-3550	DSS flip feature is not supported on VLAB	DSS	00.05.00	J721E	Blocked on VLAB
PDK-3559	DPI1 is not working due to VLAB Issue	DSS	00.05.00	J721E	Blocked on VLAB
PDK-3719	DSS 12 bit unpacked YUV420SP-UV format not working on VLAB	DSS	00.08.00	J721E	Blocked on VLAB
PDK-3576	[McSPI DRV]Loopback is failing in VLAB	McSPI	00.05.00	J721E	Blocked on VLAB
PDK-3969	[SCICLIENT] CSIRX, EMAC, CPSW and DRU testcases fails with DMSC	SCICLIENT	00.08.00	J721E	Bypass DMSC and use CSL calls
PDK-3963	[UDMA] MCU NAVSS Blockcpy from multiple tasks fails with invalid desc pointer	UDMA	00.08.00	J721E	Debug still pending
PDK-3968	[UDMA] Channel resume after a channel pause for blockcpy channel doesn't work	UDMA	00.08.00	J721E	Debug still pending

Limitations

None

Technical Support

For further information or to report any problems, contact http://e2e.ti.com or http://community.ti.com or http://support.ti.com.