msc_cfg.h

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/*
 *   Copyright (c) Texas Instruments Incorporated 2019
 *   All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef CFG_MSC_H_
#define CFG_MSC_H_
 
/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
#include <vhwa_vpac_abstraction_layer.h>
 
#include <include/vhwa_common.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* ========================================================================== */
/*                           Macros & Typedefs                                */
/* ========================================================================== */
#define MSC_MAX_OUTPUT                     (10U)
 
#define MSC_MAX_TAP                        (5U)
 
#define MSC_MAX_SP_COEFF_SET               (2U)
 
#define MSC_MAX_MP_COEFF_SET               (4U)
 
#define MSC_COEFF_SHIFT_5       (5U)
#define MSC_COEFF_SHIFT_6       (6U)
#define MSC_COEFF_SHIFT_7       (7U)
#define MSC_COEFF_SHIFT_8       (8U)
#define MSC_COEFF_SHIFT_9       (9U)
#define MSC_MULTI_32PHASE_COEFF_SET_0       (0U)
#define MSC_MULTI_32PHASE_COEFF_SET_1       (1U)
#define MSC_MULTI_32PHASE_COEFF_SET_2       (2U)
#define MSC_MULTI_32PHASE_COEFF_SET_3       (3U)
#define MSC_MULTI_64PHASE_COEFF_SET_0       (0U)
#define MSC_MULTI_64PHASE_COEFF_SET_2       (2U)
#define MSC_TAP_SEL_3TAPS               (0U)
#define MSC_TAP_SEL_4TAPS               (1U)
#define MSC_TAP_SEL_5TAPS               (2U)
#define MSC_SINGLE_PHASE_SP_COEFF_0         (0U)
#define MSC_SINGLE_PHASE_SP_COEFF_1         (1U)
#define MSC_SINGLE_PHASE_MP_COEFF0_0        (2U)
#define MSC_SINGLE_PHASE_MP_COEFF0_1        (3U)
#define MSC_SINGLE_PHASE_MP_COEFF0_2        (4U)
#define MSC_SINGLE_PHASE_MP_COEFF0_3        (5U)
#define MSC_SINGLE_PHASE_MP_COEFF0_4        (6U)
#define MSC_SINGLE_PHASE_MP_COEFF0_5        (7U)
#define MSC_SINGLE_PHASE_MP_COEFF0_6        (8U)
#define MSC_SINGLE_PHASE_MP_COEFF0_7        (9U)
#define MSC_SINGLE_PHASE_MP_COEFF0_8        (10U)
#define MSC_SINGLE_PHASE_MP_COEFF0_9        (11U)
#define MSC_SINGLE_PHASE_MP_COEFF0_10       (12U)
#define MSC_SINGLE_PHASE_MP_COEFF0_11       (13U)
#define MSC_SINGLE_PHASE_MP_COEFF0_12       (14U)
#define MSC_SINGLE_PHASE_MP_COEFF0_13       (15U)
#define MSC_SINGLE_PHASE_MP_COEFF0_14       (16U)
#define MSC_SINGLE_PHASE_MP_COEFF0_15       (17U)
#define MSC_PHASE_MODE_64PHASE      (0U)
 
#define MSC_PHASE_MODE_32PHASE      (1U)
#define MSC_FILTER_MODE_SINGLE_PHASE        (0U)
 
#define MSC_FILTER_MODE_MULTI_PHASE         (1U)
#define VHWA_MSC_VBUSM_RD_ERR                   (0x4U)
#define VHWA_MSC_SL2_WR_ERR                     (0x8U)
#define VHWA_MSC0_WDTIMER_ERR                   (0x1000000U)
#define VHWA_MSC1_WDTIMER_ERR                   (0x2000000U)
 
#define VHWA_MSC_ALL_ERR_EVENTS (VHWA_MSC_VBUSM_RD_ERR | VHWA_MSC_SL2_WR_ERR)
/* ========================================================================== */
/*                         Structure Declarations                             */
/* ========================================================================== */
 
typedef void (*Msc_ErrEventCbFxn)(Fvid2_Handle handle, uint32_t errEvents,
    void *appData);
 
typedef void (*Msc_WdTimerErrEventCbFxn)(Fvid2_Handle handle, uint32_t errEvents,
    void *appData);
 
typedef int32_t (*Msc_ConfigRegCompareCbFxn)(Fvid2_Handle handle, void *configRegPrms);
 
typedef struct
{
    uint32_t                        enable;
    Fvid2_CropConfig                inRoi;
    uint32_t                        outWidth;
    uint32_t                        outHeight;
    uint32_t                        horzAccInit;
    uint32_t                        vertAccInit;
    uint32_t                        filtMode;
    uint32_t                        phaseMode;
    uint32_t                        hsSpCoeffSel;
    uint32_t                        vsSpCoeffSel;
    uint32_t                        hsMpCoeffSel;
    uint32_t                        vsMpCoeffSel;
    uint32_t                        coeffShift;
    uint32_t                        isSignedData;
    uint32_t                        isEnableFiltSatMode;
    uint32_t                isInterleaveFormat;
} Msc_ScConfig;
 
typedef struct
{
    uint32_t       tapSel;
    Msc_ScConfig   scCfg[MSC_MAX_OUTPUT];
} Msc_Config;
 
typedef struct
{
    uint32_t                    errEvents;
    Msc_ErrEventCbFxn           cbFxn;
    void                       *appData;
} Msc_ErrEventParams;
 
typedef struct
{
    uint32_t                    wdTimeoutCycles;
    uint32_t                    wdTimerErrEvents;
    Msc_WdTimerErrEventCbFxn    cbFxn;
    void                       *appData;
} Msc_WdTimerErrEventParams;
 
typedef struct
{
    int32_t        *spCoeffSet[MSC_MAX_SP_COEFF_SET];
    int32_t        *mpCoeffSet[MSC_MAX_MP_COEFF_SET];
} Msc_Coeff;
 
/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */
 
static inline void Msc_configInit(Msc_Config *mscCfg);
 
static inline void Msc_coeffInit(Msc_Coeff *coeffCfg);
 
/* ========================================================================== */
/*                          Function Definitions                              */
/* ========================================================================== */
 
static inline void Msc_coeffInit(Msc_Coeff *coeffCfg)
{   /* LDRA_JUSTIFY_START
    <metric start> branch <metric end>
    <justification start> Rationale:
 
    The negative test framework and test applications are unable to reach this portion of the code. The coeffCfg is passed using control commands from the application; if these control commands are not called, this API will not be invoked.
    Effect on this unit: If the control reaches here, the code base is expected to accumulate and return the error.
    However, due to the stated rationale, this is not tested.
    <justification end> */
    if (NULL != coeffCfg)
    /* LDRA_JUSTIFY_END */           
 
    {
        Fvid2Utils_memset(coeffCfg, 0, sizeof(Msc_Coeff));
    }
    /* LDRA_JUSTIFY_START
    <metric start> statement branch <metric end>
    <justification start>  Rationale:
 
    The negative test framework and test applications are unable to reach this portion of the code. The coeffCfg is passed using control commands from the application; if these control commands are not called, this API will not be invoked.
    Effect on this unit: If the control reaches here, the code base is expected to accumulate and return the error.
    However, due to the stated rationale, this is not tested.
    <justification end> */
    else
 
    {
        GT_0trace(VhwaMscTrace, GT_ERR,"Msc_coeffInit: Error - coeffCfg is null\n");
    }
        /* LDRA_JUSTIFY_END */           
 
}
 
static inline void Msc_ConfigInit(Msc_Config *mscCfg)
{
    uint32_t cnt;
    /* LDRA_JUSTIFY_START
    <metric start> branch <metric end>
    <justification start> Rationale:
    The negative test framework and test apps cannot reach this portion.
 
    mscCfg is passed using hObj  which is passed from Imaging kernel layer
    Effect on this unit: If the control reaches here, the code base is expected to accumulate and return the error.
    However, due to the stated rationale, this is not tested.
    <justification end> */
    if (NULL != mscCfg)
    /* LDRA_JUSTIFY_END */           
 
    {
        mscCfg->tapSel = MSC_TAP_SEL_5TAPS;
        for (cnt = 0; cnt < MSC_MAX_OUTPUT; cnt++)
        {
            mscCfg->scCfg[cnt].enable = UFALSE;
            mscCfg->scCfg[cnt].outWidth = 0U;
            mscCfg->scCfg[cnt].outHeight = 0U;
            mscCfg->scCfg[cnt].horzAccInit = 0U;
            mscCfg->scCfg[cnt].vertAccInit = 0U;
            mscCfg->scCfg[cnt].filtMode = MSC_FILTER_MODE_SINGLE_PHASE;
            mscCfg->scCfg[cnt].phaseMode = MSC_PHASE_MODE_64PHASE;
            mscCfg->scCfg[cnt].hsSpCoeffSel = MSC_SINGLE_PHASE_SP_COEFF_0;
            mscCfg->scCfg[cnt].vsSpCoeffSel = MSC_SINGLE_PHASE_SP_COEFF_0;
            mscCfg->scCfg[cnt].hsMpCoeffSel = MSC_MULTI_64PHASE_COEFF_SET_0;
            mscCfg->scCfg[cnt].vsMpCoeffSel = MSC_MULTI_64PHASE_COEFF_SET_0;
            mscCfg->scCfg[cnt].coeffShift = MSC_COEFF_SHIFT_8;
            mscCfg->scCfg[cnt].isSignedData = UFALSE;
            mscCfg->scCfg[cnt].isEnableFiltSatMode = UFALSE;
            mscCfg->scCfg[cnt].inRoi.cropStartX = 0U;
            mscCfg->scCfg[cnt].inRoi.cropStartY = 0U;
            mscCfg->scCfg[cnt].inRoi.cropWidth = 0U;
            mscCfg->scCfg[cnt].inRoi.cropHeight = 0U;
        }
    }
    /* LDRA_JUSTIFY_START
    <metric start> statement branch <metric end>
    <justification start>
    Rationale: The component level negative test framework and test applications cannot reach this portion.
    This failure case is out of scope for the imaging test framework.
    Effect on this unit: If the control reaches here, our code base is expected to accumulate the error status and return the same to the application.
    However, due to the stated rationale, this is not tested.
    <justification end> */
    else
    {
        GT_0trace(VhwaMscTrace, GT_ERR, "Msc_ConfigInit: Error - mscCfg is null\n");
    }
/* LDRA_JUSTIFY_END */ 
}
 
#ifdef __cplusplus
}
#endif
 
#endif