1. J784S4 Datasheet

1.1. Introduction

This section provides the performance numbers of device drivers supported in PDK

1.1.1. Setup Details

SOC Details Values
Core R5F
Core Operating Speed 1GHz
DDR Speed 4266 MTs
VPAC Frequency 650 MHz
DMPAC Frequency 520 MHz
Cache status Enabled
Optimization Details Values
Profile Release
Compile Options for R5F -g -ms -DMAKEFILE_BUILD -c -qq -pdsw225 –endian=little -mv7R5 –abi=eabi -eo.oer5f -ea.ser5f –symdebug:dwarf –embed_inline_assembly –float_support=vfpv3d16 –emit_warnings_as_errors
Linker Options for R5F –emit_warnings_as_errors -w -q -u _c_int00 -c -mv7R5 –diag_suppress=10063 -x –zero_init=on
Code Placement DDR
Data Placement DDR

1.1.2. Software Performance Numbers

1.1.2.1. UDMA

1.1.2.1.1. DMA Parameters
  • Ring Order ID: 0
  • Channel Order ID: 0
  • Channel DMA Priority: 1
  • Channel Bus Priority: 4
  • Channel BUS QOS: 4
  • Channel TX FIFO depth: 128
  • Channel Fetch Word Size: 16
  • Channel Burst Size: 64 bytes for normal channel, 128 bytes for HC and UHC channels
1.1.2.1.2. Test Parameters
  • Type: TR15 Block copy
  • TR: one TR per TRPD in PBR mode
  • TR Memory: Same as buffer memory (DDR, MSMC or OCMC depends on the test performed)
  • Transfer Size: 1 MB read and 1MB write
  • 1MB means 1000x1000 bytes and 1KB means 1000 bytes

Note: Throughput numbers mentioned is the combined memory throughput of both read and write operations

1.1.2.1.3. DRU Blockcopy

DRU channel performance with TR submitted through ring

1.1.2.1.5. MCU NAVSS Blockcopy (Normal Channel)

MCU NAVSS normal channel performance with TR submitted through ring

Test Description Throughput (MCU1) CPU Load (MCU1)
[PDK-3490] 1CH DDR 1MB to DDR 1MB 524 MB/sec 1%
[PDK-3491] 1CH MSMC 1KB Circular to DDR 1MB 817 MB/sec 1%
[PDK-3492] 1CH DDR 1MB to MSMC circular 1KB 568 MB/sec 1%
[PDK-3493] 1CH MSMC 1KB to MSMC circular 1KB (1MB per TR) 817 MB/sec 1%
[PDK-3489] 1CH OCMC 1KB to OCMC circular 1KB (1MB per TR) 2492 MB/sec 3%
[PDK-3495] Multi CH DDR 1MB to DDR 1MB 1046 MB/sec (2CH) 2%
[PDK-3497] Multi CH MSMC 1KB to MSMC circular 1KB (1 MB per TR) 1689 MB/sec (2CH) 3%

1.1.2.2. OSPI

1.1.2.2.1. OSPI Memory Non Cached Test Set-up
  • Platform: J784S4 EVM.
  • OS Type: Baremetal/FreeRTOS.
  • Core : R5F_0 at 1 GHz, A72_0 at 2 GHz.
  • Software/Application Used: OSPI_Flash_TestApp/OSPI_Flash_Dma_TestApp/OSPI_Baremetal_Flash_TestApp/OSPI_Baremetal_Flash_Dma_TestApp
  • System Configuration: Cache OFF, Read/Write Buffer in DDR. DMA Enabled/Disabled, Interrupts ON.
1.1.2.2.2. OSPI Read/Write Performance (DDR Octal Mode)
OSPI RCLK OS CPU Mode Write Tput (MB/s) Write CPU Load Read Tput (MB/s) Read CPU Load
133 MHz Baremetal R5F_0 DAC     7.368  
DAC DMA     264.458  
INDAC 0.560   23.467  
A72_0 DAC     5.508  
DAC DMA     265.529  
INDAC 0.561   12.430  
RTOS R5F_0 DAC     7.300 51%
DAC DMA     263.196 1%
INDAC 0.576 100% 23.866 51%
166 MHz Baremetal R5F_0 DAC     8.570  
DAC DMA     329.430  
INDAC 0.560   23.862  
A72_0 DAC     6.163  
DAC DMA     330.885  
INDAC 0.561   12.426  
RTOS R5F_0 DAC     8.570 51%
DAC DMA     327.270 2%
INDAC 0.576 100% 23.871 51%
1.1.2.2.3. OSPI Memory Cached Test Set-up
  • Platform: J784S4 EVM.
  • OS Type: Baremetal/FreeRTOS.
  • Core : R5F_0 at 1 GHz, A72_0 at 2 GHz.
  • Software/Application Used: OSPI_Flash_Cache_TestApp/OSPI_Flash_Dma_Cache_TestApp/OSPI_Baremetal_Flash_Cache_TestApp/OSPI_Baremetal_Flash_Dma_Cache_TestApp
  • System Configuration: Cache ON, Read/Write Buffer in DDR. DMA Enabled/Disabled, Interrupts ON.
1.1.2.2.4. OSPI Read/Write Performance (DDR Octal Mode)
OSPI RCLK OS CPU Mode Write Tput (MB/s) Write CPU Load Read Tput (MB/s) Read CPU Load
133 MHz Baremetal R5F_0 DAC     81.601  
DAC DMA     264.458  
INDAC 0.558   23.880  
RTOS R5F_0 DAC     81.594 51%
DAC DMA     263.196 1%
INDAC 0.568 100% 23.837 51%
166 MHz Baremetal R5F_0 DAC     93.099  
DAC DMA     329.223  
INDAC 0.560   23.884  
RTOS R5F_0 DAC     92.843 51%
DAC DMA     327.373 1%
INDAC 0.563 100% 23.869 51%

1.1.2.3. CPSW_9G

1.1.2.3.1. Test Setup
_images/enet_j784s4_cpsw9g_test_setup.png
Hardware Configuration Value
Processing Core Main R5F0 Core 0
Core Frequency 1 GHz
Ethernet Interface Type QSGMII at 1Gbps
Packet buffer memory DDR
Hardware checksum offload Yes
Scatter-gather TX Yes
Scatter-gather RX No
Software Configuration Value
RTOS FreeRTOS
RTOS application Enet LLD lwIP example
TCP/IP stack lwIP 2.1.2
Host PC tool version iperf v2.0.10
1.1.2.3.2. TCP Performance
Test Bandwidth (Mbps) CPU Load (%)
TCP RX 125 39
TCP TX 187 66
TCP Bidirectional RX=132 TX=170 100

Host PC commands:

iperf -c <evm_ip> -r
iperf -c <evm_ip> -d
1.1.2.3.3. UDP Performance
Test Datagram Length = 64B Datagram Length = 256B Datagram Length = 512B Datagram Length = 1470B
Bandwidth
(Mbps)
CPU
Load
(%)
Packet
Loss
(%)
Bandwidth
(Mbps)
CPU
Load
(%)
Packet
Loss
(%)
Bandwidth
(Mbps)
CPU
Load
(%)
Packet
Loss
(%)
Bandwidth
(Mbps)
CPU
Load
(%)
Packet
Loss
(%)
UDP RX 5.24 22 0.0 26.2 38 0.0 26.2 25 0.0 26.2 17 0.0
10.5 36 0.0026 52.4 69 0.17 52.4 42 0.001 52.4 25 0.0
15.7 49 0.061 105     105 76 0.11 105 40 0.0
UDP RX (Max) 22 66 0.14 52.4 69 0.14 110 79 0.31 294 100 0.12
UDP TX (Max) 45.7 100 0.0 112 100 0.0136 223 100 0.0498 622 100 0.0

Host PC commands:

  • Test with datagram length of 64B:

    iperf -c <evm_ip> -u -l64 -b<bw> -r
where <bw> is 5M, 10M, 15M, etc

  • Test with datagram length of 256B:

    iperf -c <evm_ip> -u -l256 -b<bw> -r
where <bw> is 25M, 50M, 100M, etc

  • Test with datagram length of 512B:

    iperf -c <evm_ip> -u -l512 -b<bw> -r
where <bw> is 25M, 50M, 100M, etc

  • Test with datagram length of 1470B (max):

    iperf -c <evm_ip> -u -b<bw> -r
where <bw> is 25M, 50M, 100M, etc

1.1.2.4. SBL OSPI Boot Performance App

1.1.2.4.1. Test Set-up
  • Platform: J721S2 EVM.
  • OS Type: Baremetal
  • Core : R5F_0 at 1 GHz
  • Software/Application Used: sbl_cust_img (with custom flags) and sbl_boot_perf_test appimage
1.1.2.4.2. GP EVM Performance
SBL Boot Time Breakdown Time (ms)
MCU_PORZ_OUT to MCU_RESETSTATz 0.63
ROM : init + SBL load from OSPI 8.768
SBL : SBL_SciClientInit: ReadSysfwImage 0.053
Load/Start SYSFW 4.120
Sciclient_init 3.153
Board Config 1.967
PM Config 0.133
Security Config 0.337
RM Config 0.421
SBL: SoC Late-Init 0.00
SBL : Board_init (pinmux) 0.646
SBL : Board_init (PLL) 1.142
SBL: Board_init (CLOCKS) 1.445
SBL: OSPI init 0.144
SBL: App copy to MCU SRAM & Jump to App 2.672
Misc 0.038
MCUSW: CAN response 1.00
TOTAL time 26.669

1.1.2.5. CSI-Rx

Capture Type Configuration CPU Load
CSI2Rx Inst 0 4CH 1080P30 IMX390 Sensor Raw12 1% (MCU2_0)