VHWA Introduction

Contents

  1. Introduction
  2. Licensing
  3. Documentation
  4. What's New
  5. Fixed Issues
  6. Known Issues
  7. VHWA Test Application
  8. Technical Support
  9. Package Versioning
  10. Trainings


Introduction

The Vision Hardware Accelerator (VHWA) provides the logic to interface for MSC, NF, LDC, VISS, DOF and SDE accelerators. This is VHWA FVID2 driver documentation.


Licensing

  • Refer to VHWA manifest Jacinto [HTML]
  • Refer to VHWA manifest Sitara [HTML]

  • Documentation

    VHWA Static Analysis Report Static Analysis Report [XLSX]
    VHWA Driver API Guide API Guide [HTML]
    VHWA Standalone applications performance Performance Statistics [XLSX]
    VHWA Test Report (AM62A) Test Report [XLSX]
    VHWA Bidirectional Report (AM62A) Bi-Directional Traceability Report [XLSX]
    VHWA Test Report (J7AEN) Test Report [XLSX]
    VHWA Bidirectional Report (J7AEN) Bi-Directional Traceability Report [XLSX]


    What's New


    Fixed Issues

    ID Summary
    PDK-19301 MISRA and static analysis fixes for VPAC and DMPAC driver
    PDK-18759 tivxEventPost is called multiple times for the same frame due to error interrupt callbacks
    PDK-19117 Incorrect Error Interrupt Masks for VISS based on IP revisions
    PDK-18772 An IP in a stalled state allows process requests submission, resulting in a stall
    PDK-19010 VHWA: Kernel tap params configured for non-applicable modules.
    PDK-19129 VPAC LDC: Bandwidth limiter settings applied to one handle unintentionally affect all other handles
    PDK-19141 VHWA:MSC: Single-phase coefficients not cleared when switching to multiphase coefficients between test cases
    PDK-19142 VHWA:HTS: Duplicate configuration of pattern adaptor enable bit leading to readback mismatch
    PDK-19029 VHWA-SDE confidence score map incorrectly programmed for map value > 7
    PDK-19143 VHWA:MSC: Incorrect Configuration Readback in MSC Sequential Processing
    PDK-17427 [VHWA]: Added mechanism to modify WDG Timeout cycles for all modules
    PDK-19173 Fixed issue where enabling/disabling Error Interrupts for VISS, SDE, and NF did not take effect if the control command was invoked between frame processing for the same handle.
    PDK-19177 Resolved improper masking issue causing errors when enabling Watchdog Timer Error Interrupt or Event Interrupts for VISS.


    Known Issues

    ID Summary
    PDK-12683 Chroma only output is not correct from Human Vision Pipeline when machine vision is enabled.
    PDK-12681 Incorrect access of luma and chroma channel in luma only and chroma only mode causes corruption.
    PDK-13247 AEWB output incorrect for VISS for Three Frame Merge with two YUV420, saturation and AEWB output
    PDK-12860 [VHWA-VISS]: Error check missing while setting VISS module specific configuration
    - [VHWA]: DPC stats enable MMR is not configurable from VHWA VPAC3L.
    - [VHWA]: DCC live tuning for AWB is not working properly on AM62A
    - [VHWA]: GLBCE context save and restore requires validation using low level driver test case for J722S and AM62A
    - [DMPAC]: DOF and SDE performance numbers are not meeting expectation on J722S
    - [VPAC]: AF output incorrect for VISS for Three Frame Merge with two YUV420, saturation and AF output
    PDK-19176 Updating Configurations for SDE will not take effect if the control command for the same is invoked between frame processing for the same handle.
    SITSW-11754 / PDK-20284 Failure on Flexconnect Safety test case related to 3 inputs to VISS
    SITSW-11753 / PDK-20392 Failure on CSL_nsf4vSetConfig VISS-PCID test case for AM62A / J722S
    SITSW-11752 / PDK-20393 Failure on "VISS-PCID for single RAW input and irRemapLut Enabled 1920x1080 - YUV, IR" test case for AM62A / J722S
    SITSW-11992 / PDK-20394 H3a output mismatch for LLD testcases on AM62A / J722S


    Application Examples

    VHWA Module Test Application Supported Platform Supported Cores
    VISS baremetal, freertos, safertos

    baremetal, freertos, safertos

    baremetal, freertos, safertos

    baremetal, freertos

    baremetal, freertos

    baremetal, freertos

    J721S2

    J721E

    J784S4

    J742S2

    J722S

    AM62A

    mcu2_0

    mcu2_0

    mcu2_0, mcu4_0

    mcu2_0, mcu4_0

    main_r5

    wakeup_r5

    LDC baremetal, freertos, safertos

    baremetal, freertos, safertos

    baremetal, freertos, safertos

    baremetal, freertos

    baremetal, freertos

    baremetal, freertos

    J721S2

    J721E

    J784S4

    J742S2

    J722S

    AM62A

    mcu2_0

    mcu2_0

    mcu2_0, mcu4_0

    mcu2_0, mcu4_0

    main_r5

    wakeup_r5

    MSC baremetal, freertos, safertos

    baremetal, freertos, safertos

    baremetal, freertos, safertos

    baremetal, freertos

    baremetal, freertos

    baremetal, freertos

    J721S2

    J721E

    J784S4

    J742S2

    J722S

    AM62A

    mcu2_0

    mcu2_0

    mcu2_0, mcu4_0

    mcu2_0, mcu4_0

    main_r5

    wakeup_r5

    DOF baremetal, freertos, freertos-negative, safertos

    baremetal, freertos, safertos

    baremetal, freertos, freertos-negative, safertos

    baremetal, freertos, freertos-negative

    baremetal, freertos

    baremetal, freertos

    J721S2

    J721E

    J784S4

    J742S2

    J722S

    AM62A

    mcu2_1

    mcu2_1

    mcu2_1

    mcu2_1

    main_r5

    wakeup_r5

    SDE baremetal, freertos, freertos-negative, safertos

    baremetal, freertos, safertos

    baremetal, freertos, freertos-negative, safertos

    baremetal, freertos, freertos-negative

    baremetal, freertos

    baremetal, freertos

    J721S2

    J721E

    J784S4

    J742S2

    J722S

    AM62A

    mcu2_1

    mcu2_1

    mcu2_1

    mcu2_1

    main_r5

    wakeup_r5


    Steps to run VHWA test applications:

    For VPAC1 and VPAC3 devices

    cd pdk/packages/ti/drv/vhwa/

    make help

    VHWA example build

    make vhwa_msc_baremetal_testapp BOARD=j721s2_evm SOC=j721s2 CORE=mcu2_0 BUILD_PROFILE=debug

    For VPAC3L devices:

    Navigate to mcu_plus_sdk path

    make DEVICE=j722s gen-buildfiles

    cd test/unity/

    make -f makefile.j722s.r5f.ti-arm-clang

    cd ../../

    make -s -f makefile.j722s all DEVICE=j722s PROFILE=release

    make -C source/drivers/vhwa -f makefile.j722s.main-r5fss0-0.ti-arm-clang PROFILE=release

    Steps to run DOF, SDE Negative test applications:

    For VPAC3 devices

    cd pdk/packages/ti/drv/vhwa/

    make help

    Build the negative test application using the following command:

    make vhwa_sde_negative_testapp_freertos BOARD=j721s2_evm SOC=$SOC CORE=mcu2_1 BUILD_PROFILE=release VHWA_NEGATIVE_TEST=true

    For negative test with FOCO WDTimer error, change the true flag like so:

    make vhwa_sde_negative_testapp_freertos BOARD=j721s2_evm SOC=$SOC CORE=mcu2_1 BUILD_PROFILE=release VHWA_NEGATIVE_FOCO_TEST=true

    The test binary will be created at the following path:
    pdk/packages/ti/binary/vhwa_sde_testapp_freertos/bin/j721s2_evm/vhwa_sde_testapp_freertos_mcu2_1_debug.xer5f

    Load this binary and run the application.

    To trigger the watchdog timer error, run testcase 3. This is applicable for DOF, SDE and (DOF, SDE) IP's FOCO watchdog timer error.

    NOTE: Test case 3 Image Resolution:

    DOF: 2 MP, 8-bit

    SDE: 1 MP, 8-bit


    Technical Support

    For technical support and additional assistance, contact E2E Forum


    Package Versioning

    Each package version is composed of 4 period-delimited numbers - represented here by the letters M, m, p and b [M.m.p.b]. The table below provides a descriptive reference regarding package version numbering.

    Digit Meaning Description
    1 (M=Major) Major revision Incremented when the new version is substantially different from the previous For example, a new module added or an existing module's algorithm significantly altered.
    2 (m=minor) Minor revision Incremented when the new version has changed but not in a major way. For example, some minor changes in the API or feature set.
    3 (p=patch) Patch number Incremented for all other source code changes. This include any packaging support code.
    4 (b=build) Build number Incremented for each release delivery to CM. Reset for any change to M, m or p


    Trainings

    VHWA Overview VHWA Modules and SW Overview [PPTX]
    [PDF]

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