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TIOVX User Guide
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Meaning of terms in the following tables,
This table lists the mapping of standard OpenVX kernels to compute targets on the Jacinto7 platform. When mapped to C7X DSP, it indicates if it is implemented using BAM DMA acceleration, or cache only.
All of the below kernels default to running on the first C7X DSP. If a different target is needed, it can be selected from the available targets indicated below by using the vxSetNodeTarget() API.
Note: all of the standard kernels were initially developed on J721E running on the C66x DSP. When porting to the C7x, the VXLIB kernels and TIOVX kernel wrappers were recompiled for the C7x. If custom kernels need to be recompiled from C66x to C7x, these kernels in VXLIB and associated kernel wrappers in TIOVX can be referenced for information on how to recompile these kernels.
Note: the below node implementation locations have changed from the 8.6 to 9.0 releases. The new locations can be referenced in Directory Structure document.
Kernel | Target | Remote Core(s) | PC Emulation Support |
---|---|---|---|
tivxCaptureNode | CSIRX | MCU2_0 | No |
tivxDisplayNode | DSS | MCU2_0 | No |
tivxTIDLNode | C7x + MMA | C7X_1 / C7X_2 | Yes |
tivxVpacVissNode | VPAC_VISS | MCU2_0 | Yes |
tivxVpacLdcNode | VPAC_LDC | MCU2_0 | Yes |
tivxVpacNfGenericNode | VPAC_NF | MCU2_0 | Yes |
tivxVpacNfBilateralNode | VPAC_NF | MCU2_0 | Yes |
tivxVpacMscScaleNode | VPAC_MSC | MCU2_0 | Yes |
tivxVpacMscPyramidNode | VPAC_MSC | MCU2_0 | Yes |
tivxDmpacSdeNode | DMPAC_SDE | MCU2_0 | Yes |
tivxDmpacDofNode | DMPAC_DOF | MCU2_0 | Yes |
tivxCsitxNode | CSITX | MCU2_0 | Yes |
tivxObjArraySplitNode | MPU | A53 | Yes |