6 #define L2RAM_C7x_1_ADDR (0x64800000u) 7 #define L2RAM_C7x_1_SIZE (0x00078000u) 10 #define L1RAM_C7x_1_ADDR (0x64E00000u) 11 #define L1RAM_C7x_1_SIZE (0x00004000u) 14 #define MSMC_C7x_1_ADDR (0x70020000u) 15 #define MSMC_C7x_1_SIZE (0x007C8000u) 18 #define DDR_C7x_1_IPC_ADDR (0xA8000000u) 19 #define DDR_C7x_1_IPC_SIZE (0x00100000u) 22 #define DDR_C7x_1_DTS_ADDR (0xA8100000u) 23 #define DDR_C7x_1_DTS_SIZE (0x00F00000u) 26 #define DDR_SHARED_MEM_ADDR (0xDC000000u) 27 #define DDR_SHARED_MEM_SIZE (0x1E000000u) 30 #define DDR_C7X_1_SCRATCH_ADDR (0xAE000000u) 31 #define DDR_C7X_1_SCRATCH_SIZE (0x20000000u) 34 #define DDR_C7X_1_SCRATCH_PHY_ADDR (0x880000000u) 35 #define DDR_C7X_1_SCRATCH_VIRT_ADDR (0x100000000u) void algoMmuMap(bool is_secure)
uint64_t algotb_virtToPhyAddrConversion(const void *virtAddr, uint32_t chNum, void *appData)