hwa_vpac_fc.h

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#ifndef HWA_VPAC_FC_H_
#define HWA_VPAC_FC_H_

#include <VX/vx.h>
#include <VX/vx_kernels.h>
#include "TI/hwa_vpac_viss.h"
#include "TI/hwa_vpac_msc.h"

#ifdef __cplusplus
extern "C" {
#endif

#define TIVX_KERNEL_VPAC_FC_NAME "com.ti.hwa.vpac_fc"


/*********************************
 *      VPAC_FC Control Commands
 *********************************/

#define TIVX_VPAC_FC_MSC_CMD_SET_COEFF                    (0x10000000u)

#define TIVX_VPAC_FC_MSC_CMD_SET_INPUT_PARAMS             (0x10000001u)

#define TIVX_VPAC_FC_MSC_CMD_SET_OUTPUT_PARAMS            (0x10000002u)

#define TIVX_VPAC_FC_MSC_CMD_SET_CROP_PARAMS            (0x10000003u)

#define TIVX_VPAC_FC_VISS_CMD_SET_DCC_PARAMS                   (0x10000004u)

#define TIVX_VPAC_FC_DELETE_GRAPH                              (0x10000005u)

/*********************************
 *      VPAC_FC Defines
 *********************************/

#define TIVX_KERNEL_VPAC_FC_MAX_MSC_INPUT_THREADS    (4U)
#define TIVX_VPAC_FC_VISS_OUT0                      (0U)
#define TIVX_VPAC_FC_VISS_OUT1                      (1U)
#define TIVX_VPAC_FC_VISS_OUT2                      (2U)
#define TIVX_VPAC_FC_VISS_OUT3                      (3U)
#define TIVX_VPAC_FC_MSC_CH_INVALID                 (4U)
#define TIVX_VPAC_FC_MSC0                           (0U)
#define TIVX_VPAC_FC_MSC1                           (1U)
#define TIVX_VPAC_FC_MSC_TH_INVALID                 (2U)

/*********************************
 *      VPAC_FC STRUCTURES
 *********************************/

typedef struct {

    /*
    *
    * |     val  | msc0_input0 | msc0_input1 | msc1_input0 | msc1_input1 |
    * |:--------:|:-----------:|:-----------:| :----------:|:-----------:|
    * | 0        | VISS_OUT0   | VISS_OUT0   | VISS_OUT0   | VISS_OUT0   |
    * | 1        | VISS_OUT1   | VISS_OUT1   | VISS_OUT1   | VISS_OUT1   |
    * | 2        | VISS_OUT2   | VISS_OUT2   | VISS_OUT2   | VISS_OUT2   |
    * | 3        | VISS_OUT3   | VISS_OUT3   | VISS_OUT3   | VISS_OUT3   |
    * | 4        | INVALID     | INVALID     | INVALID     | INVALID     |
    * | -------- | ----------  | ----------  | ----------  | ----------  |
    * 
    * Note:
    *   - YUV420, YUV422, Luma+Chroma uses output_0 or output_2
    *       - output_1 or output_3 is unusable respectively
    *   - Single plane Luma uses output_0 or output_2
    *   - Single plane Chroma uses output_1 or output_3
    *   - Any other value is INVALID
    *   - For VPAC3L devices VISS_OUT2 and VISS_OUT3 is enabled at 1.5 bytes per pixel for Flexconnect; VISS_OUT0 and VISS_OUT1 is enabled at 2 bytes per pixel
    *   - For VPAC1 devices, Flexconnect is supported with LUMA only outputs on MSC0; Chroma only outputs on MSC1 will be enabled in upcoming release
    */
    uint32_t     msc_in_thread_viss_out_map[TIVX_KERNEL_VPAC_FC_MAX_MSC_INPUT_THREADS];

    /*
    * | val | msc_output0 | msc_output1 | .. | msc_output7 | msc_output8 | msc_output9 |
    * |:---:|:-----------:|:-----------:|:--:|:-----------:|:-----------:|:-----------:|
    * | 0   | MSC_0       | MSC_0       | .. | MSC_0       | MSC_0       | MSC_0       |
    * | 1   | MSC_1       | MSC_1       | .. | MSC_1       | MSC_1       | MSC_1       |
    * | 2   | INVALID     | INVALID     | .. | INVALID     | INVALID     | INVALID     |* 
    * | ----| ----------- | ----------- | -- | ----------- | ----------- | ----------- |
    * 
    * Note:
    *   - A single YUV420 uses 2 MSC outputs
    *       - mapped to even outputs (0/2/4/6/8)
    *       - odd outputs (1/3/5/7/9) are unusable
    *   - Any other value is INVALID
    *   - For VPAC3L devices only MSC0 is enabled for Flexconnect
    *   - For VPAC1 devices, Flexconnect is supported only on MSC0; MSC1 will be enabled in upcoming release
    */
    uint32_t     msc_out_msc_in_map[TIVX_VPAC_MSC_MAX_OUTPUT];

    tivx_vpac_viss_params_t         tivxVissPrms;

} tivx_vpac_fc_viss_msc_params_t;

/*********************************
 *      Function Prototypes
 *********************************/

void tivx_vpac_fc_params_init(tivx_vpac_fc_viss_msc_params_t *prms);

void tivxRegisterHwaTargetVpacFcKernels(void);

void tivxUnRegisterHwaTargetVpacFcKernels(void);

VX_API_ENTRY vx_node VX_API_CALL tivxVpacFcVissMscNode(vx_graph  graph,
                                      vx_user_data_object   configuration,
                                      vx_user_data_object   viss_ae_awb_result,
                                      vx_user_data_object   dcc_buf,
                                      tivx_raw_image        viss_raw,
                                      vx_image              viss_out0,
                                      vx_image              viss_out1,
                                      vx_image              viss_out2,
                                      vx_image              viss_out3,
                                      vx_user_data_object   viss_h3a_out,
                                      vx_distribution       viss_histogram0,
                                      vx_distribution       viss_histogram1,
                                      vx_distribution       viss_raw_histogram,                                                                      
                                      vx_image              msc_scale_out0_img,
                                      vx_image              msc_scale_out1_img,
                                      vx_image              msc_scale_out2_img,
                                      vx_image              msc_scale_out3_img,
                                      vx_image              msc_scale_out4_img,
                                      vx_image              msc_scale_out5_img,
                                      vx_image              msc_scale_out6_img,
                                      vx_image              msc_scale_out7_img,
                                      vx_image              msc_scale_out8_img,
                                      vx_image              msc_scale_out9_img);

#ifdef __cplusplus
}
#endif

#endif /* HWA_VPAC_FC_H_ */