9. Frequently Asked Questions

• 9.1. FAQ - Common
  • 9.1.1. Generic
    • 9.1.1.1. What does PDK stand for?
    • 9.1.1.2. What do I get with PDK, and how do I get started?
  • 9.1.2. Build
    • 9.1.2.1. What are the common issues faced during the build?
  • 9.1.3. Code Composer Studio
    • 9.1.3.1. Unable to connect to MCU 11 or MCU21
    • 9.1.3.2. CCS cannot resolve source or variables
  • 9.1.4. BoardCfg RM
    • 9.1.4.1. How to integrate updated RM BoardCfg in PDK?
• 9.2. FAQ - CAN
  • 9.2.1. What is CAN?
  • 9.2.2. How is bit-rate calculated?
  • 9.2.3. What is CAN bus termination?
  • 9.2.4. What is Transceiver Delay Compensation Value(TDCV) and how is it calculated?
  • 9.2.5. Things to consider/check before sending a message over CAN bus
  • 9.2.6. CAN communication failed, where to start debug?
• 9.3. FAQ - FVID2
  • 9.3.1. Data Formats Support on Video IPs/ISP on Jacinto-7 Devices
    • 9.3.1.1. Data Format Support on CSIRX, CSITX, VISS, and DSS Modules:
    • 9.3.1.2. Data Format Compatibility on CSIRX, CSITX, VISS, and DSS Modules:
• 9.4. FAQ - Supported Cores by example applications
  • 9.4.1. Introduction
• 9.5. FAQ - Used Resources - Interrupt
  • 9.5.1. J721S2
    • 9.5.1.1. MPU
    • 9.5.1.2. MCU 10 (MCU Domain)
    • 9.5.1.3. MCU 11 (MCU Domain)
    • 9.5.1.4. MCU 20 (Main Domain)
    • 9.5.1.5. MCU 21 (Main Domain)
    • 9.5.1.6. MCU 30 (Main Domain)
    • 9.5.1.7. MCU 31 (Main Domain)
    • 9.5.1.8. C7x 1 (Main Domain)
    • 9.5.1.9. C7x 2 (Main Domain)
• 9.6. FAQ - How to set the clock for a given module and clock
  • 9.6.1. Introduction
  • 9.6.2. Default clock state of the system
  • 9.6.3. Setting the clock for a device
• 9.7. FAQ - CSI2RX
  • 9.7.1. What is CSI2?
  • 9.7.2. How is Lane Speed Band selected?
  • 9.7.3. Things to consider/check before sending a frame over CSI2RX bus
  • 9.7.4. CSI2RX communication failed, where to start debug?
    • 9.7.4.1. Errors detected during reception: