5.8. BIST Safety Example¶
5.8.1. Introduction¶
This example demonstrates usage of the SDL PBIST and LBIST APIs to check the status of the Power-On Self Test (POST), as well as to perform software-initiated PBIST and LBIST tests for the varoius controllers on the device. The example shows performing the BIST checks in stages, similar to how a boot application might perform PBIST and LBIST while booting the cores at startup. The test is executed from the MCU R5F core and does not use an OS.
The following controllers are tested in the associated phases.
Pre-stage:
HWPOST results are checked and reported
PBIST Negative and positive tests for Main Infra and MSMC are executed
Phase #0:
PBIST Negative and positive tests for Main Pulsar 0
LBIST test for Main Pulsar 0
Phase #1:
PBIST Negative and positive tests for Main Pulsar 1, C7x, C66x, VPAC and DMPAC
LBIST test for Main Pulsar 1, C7x, VPAC, DMPAC
Phase #2:
PBIST Negative and positive tests for A72, HC, Encoder and Decoder
LBIST test for A72
When executing PBIST in the example application, the test-for-diagnostic (negative test) is executed first, followed by the PBIST test itself. At the end of the test, the result for each test is printed.
5.8.2. Example Details¶
The example should be loaded to the hardware using the Secondary Boot Loader (SBL) from the SDK.
Example Name |
Location |
Build Command |
|---|---|---|
bist_example |
[sdl_install_dir]/examples/bist/ |
make bist_example PROFILE=release |
5.8.3. Expected Output¶
bist_example:
BIST Example Application
Starting PBIST failure insertion test on PBIST HWPOST MCU, index 0...
Starting PBIST failure insertion test on Main Infra PBIST, index 12...
Starting PBIST failure insertion test on MSMC PBIST, index 13...
Starting PBIST test on PBIST HWPOST MCU, index 0...
HW POST MCU Status : SDL_PBIST_POST_COMPLETED_SUCCESS
Starting PBIST test on Main Infra PBIST, index 12...
Starting PBIST test on MSMC PBIST, index 13...
HW POST MCU Status : SDL_LBIST_POST_COMPLETED_SUCCESS
HW POST DMSC Status : SDL_LBIST_POST_COMPLETED_SUCCESS
HW POST MCU Status : SDL_LBIST_POST_COMPLETED_SUCCESS
HW POST DMSC Status : SDL_LBIST_POST_COMPLETED_SUCCESS
Starting PBIST failure insertion test on Main R5F 0 PBIST, index 2...
Starting PBIST test on Main R5F 0 PBIST, index 2...
*** Boot stage 0 is complete, cores for this stage may now be loaded ***
Starting PBIST failure insertion test on Main R5F 1 PBIST, index 3...
Starting PBIST failure insertion test on C7X PBIST, index 4...
Starting PBIST failure insertion test on C6x core 0 PBIST
, index 10...
Starting PBIST failure insertion test on C6x core 1 PBIST, index 11...
Starting PBIST failure insertion test on VPAC PBIST, index 6...
Starting PBIST failure insertion test on DMPAC PBIST, index 7...
Starting PBIST test on Main R5F 1 PBIST, index 3...
Starting PBIST test on C7X PBIST, index 4...
Starting PBIST test on C6x core 0 PBIST
, index 10...
Starting PBIST test on C6x core 1 PBIST, index 11...
Starting PBIST test on VPAC PBIST, index 6...
Starting PBIST test on DMPAC PBIST, index 7...
*** Boot stage 1 is complete, cores for this stage may now be loaded ***
Starting PBIST failure insertion test on A72 PBIST, index 5...
Starting PBIST failure insertion test on HC PBIST, index 9...
Starting PBIST failure insertion test on Encoder PBIST, index 14...
Starting PBIST failure insertion test on Decoder PBIST, index 15...
Starting PBIST test on A72 PBIST, index 5...
Starting PBIST test on HC PBIST, index 9...
Starting PBIST test on Encoder PBIST, index 14...
Starting PBIST test on Decoder PBIST, index 15...
*** Boot stage 2 is complete, cores for this stage may now be loaded ***
==========================
BIST: Example App Summary:
==========================
BIST: Pre-boot Stage - Ran negative PBIST ID - PBIST_HWPOST_MCU_INDEX, Result = PASS
BIST: Pre-boot Stage - Ran negative PBIST ID - PBIST_INSTANCE_MAIN_INFRA, Result = PASS
BIST: Pre-boot Stage - Ran negative PBIST ID - PBIST_INSTANCE_MSMC, Result = PASS
Pre-boot stage - Ran 3 negative PBIST total sections
BIST: Pre-boot Stage - Ran PBIST ID - PBIST_HWPOST_MCU_INDEX, Result = PASS
BIST: Pre-boot Stage - Ran PBIST ID - PBIST_INSTANCE_MAIN_INFRA, Result = PASS
BIST: Pre-boot Stage - Ran PBIST ID - PBIST_INSTANCE_MSMC, Result = PASS
Pre-boot stage - Ran 3 PBIST total sections
BIST: Pre-boot Stage - Ran LBIST ID - LBIST_HWPOST_DMSC_INDEX, Result = LBIST_POST_COMPLETED_SUCCESS
BIST: Pre-boot Stage - Ran LBIST ID - LBIST_HWPOST_MCU_INDEX, Result = LBIST_POST_COMPLETED_SUCCESS
Pre-boot stage - Ran 2 LBIST total sections
BIST: Stage 0 - Ran negative PBIST ID - PBIST_INSTANCE_MAIN_PULSAR_0, Result = PASS
BIST: Stage 0 - Ran 1 negative PBIST total sections
BIST: Stage 0 - Ran PBIST ID - PBIST_INSTANCE_MAIN_PULSAR_0, Result = PASS
BIST: Stage 0 - Ran 1 PBIST total sections
BIST: Stage 0 - Ran LBIST ID - LBIST_MAIN_MCU0_INDEX, Result = PASS
BIST: Stage 0 - Ran 1 LBIST sections
BIST: Stage 1 - Ran negative PBIST ID - PBIST_INSTANCE_MAIN_PULSAR_1, Result = PASS
BIST: Stage 1 - Ran negative PBIST ID - PBIST_INSTANCE_C7X, Result = PASS
BIST: Stage 1 - Ran negative PBIST ID - PBIST_INSTANCE_C66X_0, Result = PASS
BIST: Stage 1 - Ran negative PBIST ID - PBIST_INSTANCE_C66X_1, Result = PASS
BIST: Stage 1 - Ran negative PBIST ID - PBIST_INSTANCE_VPAC, Result = PASS
BIST: Stage 1 - Ran negative PBIST ID - PBIST_INSTANCE_DMPAC, Result = PASS
BIST: Stage 1 - Ran 6 negative PBIST total sections
BIST: Stage 1 - Ran PBIST ID - PBIST_INSTANCE_MAIN_PULSAR_1, Result = PASS
BIST: Stage 1 - Ran PBIST ID - PBIST_INSTANCE_C7X, Result = PASS
BIST: Stage 1 - Ran PBIST ID - PBIST_INSTANCE_C66X_0, Result = PASS
BIST: Stage 1 - Ran PBIST ID - PBIST_INSTANCE_C66X_1, Result = PASS
BIST: Stage 1 - Ran PBIST ID - PBIST_INSTANCE_VPAC, Result = PASS
BIST: Stage 1 - Ran PBIST ID - PBIST_INSTANCE_DMPAC, Result = PASS
BIST: Stage 1 - Ran 6 PBIST total sections
BIST: Stage 1 - Ran LBIST ID - LBIST_MAIN_MCU1_INDEX, Result = PASS
BIST: Stage 1 - Ran LBIST ID - LBIST_C7X_CORE_INDEX, Result = PASS
BIST: Stage 1 - Ran LBIST ID - LBIST_VPAC_INDEX, Result = PASS
BIST: Stage 1 - Ran LBIST ID - LBIST_DMPAC_INDEX, Result = PASS
BIST: Stage 1 - Ran 4 LBIST sections
BIST: Stage 2 - Ran negative PBIST ID - PBIST_INSTANCE_A72, Result = PASS
BIST: Stage 2 - Ran negative PBIST ID - PBIST_INSTANCE_HC, Result = PASS
BIST: Stage 2 - Ran negative PBIST ID - PBIST_INSTANCE_ENCODER, Result = PASS
BIST: Stage 2 - Ran negative PBIST ID - PBIST_INSTANCE_DECODER, Result = PASS
BIST: Stage 2 - Ran 4 negative PBIST total sections
BIST: Stage 2 - Ran PBIST ID - PBIST_INSTANCE_A72, Result = PASS
BIST: Stage 2 - Ran PBIST ID - PBIST_INSTANCE_HC, Result = PASS
BIST: Stage 2 - Ran PBIST ID - PBIST_INSTANCE_ENCODER, Result = PASS
BIST: Stage 2 - Ran PBIST ID - PBIST_INSTANCE_DECODER, Result = PASS
BIST: Stage 2 - Ran 4 PBIST total sections
BIST: Stage 2 - Ran LBIST ID - LBIST_A72_CORE_INDEX, Result = PASS
BIST: Stage 2 - Ran 1 LBIST sections
main.c:185:bist_example:PASS
-----------------------
1 Tests 0 Failures 0 Ignored
OK