SDL API Guide for J7200
VIM API

Introduction

The Vectored Interrupt Manager (VIM) aggregates interrupts to a CPU. It is intended for use with a Cortex R5 from ARM in either split or lockstep configuration. The VIM has up to 1024 interrupt inputs per CPU, which may be either level or pulse. Each interrupt has a programmable priority (0- highestthrough 15-lowest). Each interrupt may also be mapped as an IRQ or FIQ (FIQ is also often denoted as Non-Maskable Interrupt, or NMI).

Sub Modules

 VIM Data Structures
 
 VIM Functions
 
 VIM Macros