2.1. Release Notes - 08_04_00

2.1.1. Introduction

This release notes provides important information that will assist you in using the PDK software package for the Jacinto family of devices. This document provides the product information and known issues that are specific to the PDK software package.

New features added / supported is listed below and defects fixed are highlighted in Fixed Issues. Also please check Upgrade and Compatibility for backward compatibility

2.1.2. What’s New

ID Description Module Supported Platforms
PDK-10132 J7VCL DDR Init Time Further Optimizations BOARD J7200
PDK-12191 SafeRTOS Support on R5F for CPU OSAL J7200

2.1.3. Upgrade and Compatibility

2.1.3.1. SBL

  • We have modified the CPU IDs for all cores due to an increase in the number of cores in latest Jacinto device. E.g. CPU Id of mcu1_0 has been updated from 4 to 8.
  • Hence user needs to generate the new app image with the current release to use the latest SBL.
  • CPU IDs corresponding to each core can be found here: <pdk_base>/packages/ti/build/makerules/platform.mk.

2.1.3.2. SPI

  • Previously SPI_open supported only 5 instances of McSPI(3 MCU instances and 2 Main Instances). Now separate APIs are implemented for McSPI and OSPI in order to support all the instances, user needs to use specific APIs as per the peripheral. E.g. User should use SPI_open() for McSPI and OSPI_open() for OSPI.

2.1.3.3. FreeRTOS

  • On C66x CPU, interrupt router configurations for OS ticks is now handled in the OS_init() by FreeRTOS OSAL layer. Previously this configuration was done by application which is no longer needed.

2.1.4. Device Support

  • J7200 GP SR1.0 and SR2.0, J7200-HS SR1.0 and SR 2.0 (BOARD=j7200_evm)

  • Associated TIFS versions:

    TIFS name J7200 SR revision
    tifs.bin SR1.0 GP & SR 2.0 GP
    tifs-hs-enc.bin SR1.0 HS
    tifs_sr2-hs-enc.bin SR2.0 HS

2.1.5. Validation Information

For details on the validated examples refer to the platform specific test report available here.

2.1.6. Tool Chain Information

Component Version
FreeRTOS Kernel 10.4.3
lwIP stack 2.1.2
lwIP-contrib 2.1.0
TI ARM CLANG 1.3.0.LTS
PRU code generation tools 2.3.3
GCC ARM code generation tools ARCH64 9.2-2019.12
CGT XML Processing Scripts 2.61.00
System Analyzer (UIA Target) 2_30_01_02

2.1.7. Change Request

ID Head Line Original Fix Version New Fix Version
NA NA NA NA

2.1.8. Fixed Issues

ID Head Line Module Affected Versions Affected Platforms
PDK-10139 J7200 App load on MCU R5_1 core may fail with CCS boot flow COMMON 08.00.00 J7200
PDK-11152 SPI driver does not support all instances with SPI_open McSPI 08.02.00 J721E, J7200
PDK-11388 [SBL] SBL should not copy build folder contents to board folder during packaging SBL 08.01.00 J721E, J7200
PDK-11093 ACK/NACK is send for TISCI messages without AOP flag Sciclient 08.01.00 J721E, J7200
PDK-11227 UART instances 3-9 does not work on MAIN R5 in interrupt mode UART 08.01.00 J721E, J7200, J721S2
PDK-11861 Unable to program PVU CSL 08.02.00 J721E, J7200
PDK-11975 OCMC RAM used by Sciserver FreeRTOS Testapp may cause memory conflict SCICLIENT 08.02.00 J721E, J7200, J721S2

2.1.9. Known Issues

ID Head Line Module Reported in Release Affected Platforms Impact Workaround in this release
PDK-6975 Pulsar (R5F) : High priority interrupt is missed by VIM CSL, OSAL 07.00.00 J721E, J7200 Baremetal implementation is pending Use RTOS instead of baremetal
PDK-9676 UART : Potential interrupt storm UART 07.02.00 J721E, J7200 Error interrupt resulting in hang. None
PDK-8601 CSL ECC test application fails on J7200/J721S2 CSL 07.01.00 J7200, J721S2 None None
PDK-10128 Spi_AsyncTransmit can not transmit more than 32 bytes McSPI 07.03.00 J7200 None None
PDK-10925 IPC Performance Test hangs after loading the binary IPC 08.01.00 J721E, J7200 The app won’t work for this release None
PDK-11085 SPI instance should be decided by SPI driver and not Board Module OSPI 08.01.00 J721E, J7200 None None
PDK-11240 keywriter: smek gets generated even when argument not specified Security 08.01.00 J721E, J7200 None None
PDK-11854 USART: Spurious DMA Interrupts UART 08.04.00 J721E, J7200, J721S2 None None
PDK-11973 USART: Erroneous clear/trigger of timeout interrupt UART 08.02.00 J721E, J7200, J721S2 None None
PDK-12060 Main Domain GPIO does not service interrupts GPIO 08.04.00 J721E, J7200 None None
PDK-12107 DM: UART Traces are not working with Linux SDK PM 08.02.00 J721E, J7200 None None
PDK-12164 Incorrect DDR End Address with ECC enabled BOARD 08.02.00 J721E, J7200 None None
PDK-12153 DDR ECC example: returned error address incorrectly shifted CSL 08.02.00 J7200 None None

2.1.10. Limitations

2.1.10.1. PDK

  • PDK examples do not support SMP mode. Some of examples still support build in SMP mode but these binaries are not supported or validated.
  • TI Clang compiler does not enable O3 optimization level and Thumb2 mode which were enabled by default with TI ARM CGT compiler. This has an impact on driver throughput. E.g. Ethernet performance has reduced by ~20% on J7200

2.1.10.2. ENET

  • lwIP stack integration doesn’t support checksum hardware-offload feature.