CMI Instrumentation Library API Reference Guide
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Enumerations
PCMI_Omap4430.h File Reference

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Enumerations

enum  eCMI_DataClasses { eCMI_CLOCK_DOMAIN_STATE_CHANGE, eCMI_CLOCK_DIVIDER_RATIO_CHANGE, eCMI_CLOCK_SOURCE_SELECTION_CHANGE, eCMI_DLPP_SETTINGS_CHANGE }
 
enum  eCMI_ClockDomainStateChange {
  eCMI_CDSC_MPU_DPLL, eCMI_CDSC_TESALA_ROOT, eCMI_CDSC_ABE_24M_GFCLK, eCMI_CDSC_ABE_ALWON_32K,
  eCMI_CDSC_ABE_SYSCLK, eCMI_CDSC_FUNC_24M_GFCK, eCMI_CDSC_ABE_OCP_GICLK, eCMI_CDSC_ABE_X2_CLK,
  eCMI_CDSC_L4_ALWON_ICLK, eCMI_CDSC_L3_1, eCMI_CDSC_L3_2, eCMI_CDSC_DUCATI,
  eCMI_CDSC_L3_DMA, eCMI_CDSC_ASYNC_PHY2, eCMI_CDSC_ASYNC_PHY1, eCMI_CDSC_ASYNC_DLL,
  eCMI_CDSC_PHY_ROOT, eCMI_CDSC_DLL, eCMI_CDSCL3_EMIF, eCMI_CDSC_L4_D2D,
  eCMI_CDSC_L3_D2D, eCMI_CDSC_L4_CONFIG, eCMI_CDSC_IVAHD_ROOT, eCMI_CDSC_FDIF,
  eCMI_CDSC_ISS, eCMI_CDSC_DSS_ALWON_SYS, eCMI_CDSC_DSS, eCMI_CDSC_L3_DSS,
  eCMI_CDSC_SGX, eCMI_CDSC_L3_GFX, eCMI_CDSC_UTMI_ROOT, eCMI_CDSC_INIT_HSMMC_6,
  eCMI_CDSC_INIT_HSMMC_2, eCMI_CDSC_INIT_HSMMC_1, eCMI_CDSC_INIT_HSI, eCMI_CDSC_USB_DPLL_HS,
  eCMI_CDSC_USB_DPLL, eCMI_CDSC_INIT_48MC, eCMI_CDSC_INIT_48M, eCMI_CDSC_INIT_96M,
  eCMI_CDSC_EMAC_50MHZ, eCMI_CDSC_INIT_L4, eCMI_CDSC_INIT_L3, eCMI_CDSC_PER_ABE_24M,
  eCMI_CDSC_PER_SYS, eCMI_CDSC_PER_96M, eCMI_CDSC_PER_48M, eCMI_CDSC_FUNC_24MC,
  eCMI_CDSC_FUNC_12M, eCMI_CDSC_PER_L4, eCMI_CDSC_UNIPRO_DPLL, eCMI_CDSC_EndEl
}
 
enum  eCMI_clkState { eCMI_ClkDomainGated, eCMI_ClkDomainActive }
 
enum  eCMI_ClockDividerRatioChange {
  eCMI_CDRC_CLKSEL_OPP, eCMI_CDRC_BYPCLK_DPLL_MPU, eCMI_CDRC_BYPCLK_DPLL_IVA, eCMI_CDRC_ABE_AESS,
  eCMI_CDRC_SCALE_FCLK, eCMI_CDRC_CAM_FDIF, eCMI_CDRC_GFX_PER_192M
}
 
enum  eCMI_divState {
  eCMI_DivideBy_dummy, eCMI_DivideBy_1, eCMI_DivideBy_2, eCMI_DivideBy_3,
  eCMI_DivideBy_4, eCMI_DivideBy_EndEl
}
 
enum  eCMI_ClockSource {
  eCMI_CSS_CORE_L4, eCMI_CSS_CORE_L3, eCMI_CSS_CORE, eCMI_CSS_DPLL_CORE,
  eCMI_CSS_DUCATI_ISS_ROOT, eCMI_CSS_USB_60MHZ, eCMI_CSS_PER_DPLL_BYP, eCMI_CSS_USB_DPLL_BYP,
  eCMI_CSS_GFX, eCMI_CSS_MMC1, eCMI_CSS_MMC2, eCMI_CSS_HSI
}
 
enum  eCMI_DPLLSrc {
  eCMI_DLPP_UPDATE_CORE, eCMI_DLPP_UPDATE_MPU, eCMI_DLPP_UPDATE_IVA, eCMI_DLPP_UPDATE_ABE,
  eCMI_DLPP_UPDATE_DDRPHY, eCMI_DLPP_UPDATE_PER, eCMI_DLPP_UPDATE_USB, eCMI_DLPP_UPDATE_UNIPRO
}
 

Detailed Description

PMI OMAP4430 specific definitions

Enumeration Type Documentation

eCMI_DataClasses
CMI_ExportMsg data class parameter
Enumerator
eCMI_CLOCK_DOMAIN_STATE_CHANGE 

Clock domain state change class

eCMI_CLOCK_DIVIDER_RATIO_CHANGE 

Clock divider ratio change class

eCMI_CLOCK_SOURCE_SELECTION_CHANGE 

Clock source selection chnage class

eCMI_DLPP_SETTINGS_CHANGE 

DLPP settings change class

eCMI_ClockDomainStateChange
CM1 & CM2 clock domain state change members
Enumerator
eCMI_CDSC_MPU_DPLL 

MPU DPLL CM1 Clock Domain State Change ID

eCMI_CDSC_TESALA_ROOT 

TESLA ROOT CM1 Clock Domain State Change ID

eCMI_CDSC_ABE_24M_GFCLK 

ABE 24M GFCLK CM1 Clock Domain State Change ID

eCMI_CDSC_ABE_ALWON_32K 

BE ALWON 32K CM1 Clock Domain State Change ID

eCMI_CDSC_ABE_SYSCLK 

ABE SYSCLK CM1 Clock Domain State Change ID

eCMI_CDSC_FUNC_24M_GFCK 

FUNC 24M GFCK CM1 Clock Domain State Change ID

eCMI_CDSC_ABE_OCP_GICLK 

ABE OCP GICLK CM1 Clock Domain State Change ID

eCMI_CDSC_ABE_X2_CLK 

ABE X2 CLK CM1 Clock Domain State Change ID

eCMI_CDSC_L4_ALWON_ICLK 

L4 ALWON ICLK CM1 Clock Domain State Change ID

eCMI_CDSC_L3_1 

L3 1 CM2 Clock Domain State Change ID

eCMI_CDSC_L3_2 

L3 2 CM2 Clock Domain State Change ID

eCMI_CDSC_DUCATI 

DUCATI CM2 Clock Domain State Change ID

eCMI_CDSC_L3_DMA 

L3 DMA CM2 Clock Domain State Change ID

eCMI_CDSC_ASYNC_PHY2 

ASYNC PHY2 CM2 Clock Domain State Change ID

eCMI_CDSC_ASYNC_PHY1 

ASYNC PHY1 CM2 Clock Domain State Change ID

eCMI_CDSC_ASYNC_DLL 

ASYNC DLL CM2 Clock Domain State Change ID

eCMI_CDSC_PHY_ROOT 

PHY ROOT CM2 Clock Domain State Change ID

eCMI_CDSC_DLL 

DLL CM2 Clock Domain State Change ID

eCMI_CDSCL3_EMIF 

EMIF CM2 Clock Domain State Change ID

eCMI_CDSC_L4_D2D 

L4 D2D CM2 Clock Domain State Change ID

eCMI_CDSC_L3_D2D 

L3 D2D CM2 Clock Domain State Change ID

eCMI_CDSC_L4_CONFIG 

L4 CONFIG CM2 Clock Domain State Change ID

eCMI_CDSC_IVAHD_ROOT 

IVAHD ROOT CM2 Clock Domain State Change ID

eCMI_CDSC_FDIF 

FDIF CM2 Clock Domain State Change ID

eCMI_CDSC_ISS 

ISS CM2 Clock Domain State Change ID

eCMI_CDSC_DSS_ALWON_SYS 

DSS ALWON SYS CM2 Clock Domain State Change ID

eCMI_CDSC_DSS 

DSS CM2 Clock Domain State Change ID

eCMI_CDSC_L3_DSS 

L3 DSS CM2 Clock Domain State Change ID

eCMI_CDSC_SGX 

SGX CM2 Clock Domain State Change ID

eCMI_CDSC_L3_GFX 

L3 GFX CM2 Clock Domain State Change ID

eCMI_CDSC_UTMI_ROOT 

UTMI ROOT CM2 Clock Domain State Change ID

eCMI_CDSC_INIT_HSMMC_6 

INIT HSMMC 6 CM2 Clock Domain State Change ID

eCMI_CDSC_INIT_HSMMC_2 

INIT HSMMC 2 CM2 Clock Domain State Change ID

eCMI_CDSC_INIT_HSMMC_1 

INIT HSMMC 1 CM2 Clock Domain State Change ID

eCMI_CDSC_INIT_HSI 

INIT HSI CM2 Clock Domain State Change ID

eCMI_CDSC_USB_DPLL_HS 

USB DPLL HS CM2 Clock Domain State Change ID

eCMI_CDSC_USB_DPLL 

USB DPLL CM2 Clock Domain State Change ID

eCMI_CDSC_INIT_48MC 

INIT 48MC CM2 Clock Domain State Change ID

eCMI_CDSC_INIT_48M 

INIT 48M CM2 Clock Domain State Change ID

eCMI_CDSC_INIT_96M 

INIT 96M CM2 Clock Domain State Change ID

eCMI_CDSC_EMAC_50MHZ 

EMAC 50MHZ CM2 Clock Domain State Change ID

eCMI_CDSC_INIT_L4 

INIT L4 CM2 Clock Domain State Change ID

eCMI_CDSC_INIT_L3 

INIT L3 CM2 Clock Domain State Change ID

eCMI_CDSC_PER_ABE_24M 

PER ABE 24M CM2 Clock Domain State Change ID

eCMI_CDSC_PER_SYS 

PER SYS CM2 Clock Domain State Change ID

eCMI_CDSC_PER_96M 

PER 96M CM2 Clock Domain State Change ID

eCMI_CDSC_PER_48M 

PER 48M CM2 Clock Domain State Change ID

eCMI_CDSC_FUNC_24MC 

FUNC 24MC CM2 Clock Domain State Change ID

eCMI_CDSC_FUNC_12M 

FUNC 12M CM2 Clock Domain State Change ID

eCMI_CDSC_PER_L4 

PER L4 CM2 Clock Domain State Change ID

eCMI_CDSC_UNIPRO_DPLL 

UNIPRO DPLL CM2 Clock Domain State Change ID

eCMI_clkState
CM1 & CM2 clock domain state parameters
Enumerator
eCMI_ClkDomainGated 

Domain clock gated - off

eCMI_ClkDomainActive 

Domain clock active - on

eCMI_clkState
CM1 & CM2 divide ratio change members
Enumerator
eCMI_CDRC_CLKSEL_OPP 

CLKSEL OPP CM1 Clock Divider Ratio Change

eCMI_CDRC_BYPCLK_DPLL_MPU 

BYPCLK DPLL MPU CM1 Clock Divider Ratio Change

eCMI_CDRC_BYPCLK_DPLL_IVA 

BYPCLK DPLL IVA CM1 Clock Divider Ratio Change

eCMI_CDRC_ABE_AESS 

ABE AESS CM1 Clock Divider Ratio Change

eCMI_CDRC_SCALE_FCLK 

SCALE FCLK CM2 Clock Divider Ratio Change

eCMI_CDRC_CAM_FDIF 

CAM FDIF CM2 Clock Divider Ratio Change

eCMI_CDRC_GFX_PER_192M 

GFX PER 192M CM2 Clock Divider Ratio Change

eCMI_divState
CM1 & CM2 divide ratio change parameters
Enumerator
eCMI_DivideBy_1 

Clock Divider Ratio Change State - divide by 1

eCMI_DivideBy_2 

Clock Divider Ratio Change State - divide by 2

eCMI_DivideBy_3 

Clock Divider Ratio Change State - divide by 3

eCMI_DivideBy_4 

Clock Divider Ratio Change State - divide by 4

eCMI_divState
CM1 & CM2 clock source selection change members
Enumerator
eCMI_CSS_CORE_L4 

Core L4 CM1 Clock Source Selection Changed

eCMI_CSS_CORE_L3 

Core L3 CM1 Clock Source Selection Changed

eCMI_CSS_CORE 

Core CM1 Clock Source Selection Changed

eCMI_CSS_DPLL_CORE 

DPLL Core CM1 Clock Source Selection Changed

eCMI_CSS_DUCATI_ISS_ROOT 

DUCATI ISS ROOT CM2 Clock Source Selection Changed

eCMI_CSS_USB_60MHZ 

USB 60MHZ CM2 Clock Source Selection Changed

eCMI_CSS_PER_DPLL_BYP 

PER DPLL BYP CM2 Clock Source Selection Changed

eCMI_CSS_USB_DPLL_BYP 

USB DPLL BYP CM2 Clock Source Selection Changed

eCMI_CSS_GFX 

GFX CM2 Clock Source Selection Changed

eCMI_CSS_MMC1 

MMC1 CM2 Clock Source Selection Changed

eCMI_CSS_MMC2 

MMC2 CM2 Clock Source Selection Changed

eCMI_CSS_HSI 

HSI CM2 Clock Source Selection Changed

eCMI_DPLLSrc
CM1 & CM2 DLPP settings update members
Enumerator
eCMI_DLPP_UPDATE_CORE 

CM1 CORE DPLL setting update

eCMI_DLPP_UPDATE_MPU 

CM1 MPU DPLL setting update

eCMI_DLPP_UPDATE_IVA 

CM1 IVA DPLL setting update

eCMI_DLPP_UPDATE_ABE 

CM1 ABE DPLL setting update

eCMI_DLPP_UPDATE_DDRPHY 

CM1 DDRPHY DPLL setting update

eCMI_DLPP_UPDATE_PER 

CM2 PER DPLL setting update

eCMI_DLPP_UPDATE_USB 

CM2 USB DPLLsetting update

eCMI_DLPP_UPDATE_UNIPRO 

CM2 UNIPRO DPLLsetting update