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Go to the documentation of this file. 34 #ifndef __HW_CPU_DWT_H__ 35 #define __HW_CPU_DWT_H__ 44 #define CPU_DWT_O_CTRL 0x00000000 47 #define CPU_DWT_O_CYCCNT 0x00000004 50 #define CPU_DWT_O_CPICNT 0x00000008 53 #define CPU_DWT_O_EXCCNT 0x0000000C 56 #define CPU_DWT_O_SLEEPCNT 0x00000010 59 #define CPU_DWT_O_LSUCNT 0x00000014 62 #define CPU_DWT_O_FOLDCNT 0x00000018 65 #define CPU_DWT_O_PCSR 0x0000001C 68 #define CPU_DWT_O_COMP0 0x00000020 71 #define CPU_DWT_O_MASK0 0x00000024 74 #define CPU_DWT_O_FUNCTION0 0x00000028 77 #define CPU_DWT_O_COMP1 0x00000030 80 #define CPU_DWT_O_MASK1 0x00000034 83 #define CPU_DWT_O_FUNCTION1 0x00000038 86 #define CPU_DWT_O_COMP2 0x00000040 89 #define CPU_DWT_O_MASK2 0x00000044 92 #define CPU_DWT_O_FUNCTION2 0x00000048 95 #define CPU_DWT_O_COMP3 0x00000050 98 #define CPU_DWT_O_MASK3 0x00000054 101 #define CPU_DWT_O_FUNCTION3 0x00000058 104 #define CPU_DWT_O_LAR 0x00000FB0 116 #define CPU_DWT_CTRL_NUMCOMP 0xF0000000 117 #define CPU_DWT_CTRL_NUMCOMP_BITN 28 118 #define CPU_DWT_CTRL_NUMCOMP_M 0xF0000000 119 #define CPU_DWT_CTRL_NUMCOMP_S 28 124 #define CPU_DWT_CTRL_NOCYCCNT 0x02000000 125 #define CPU_DWT_CTRL_NOCYCCNT_BITN 25 126 #define CPU_DWT_CTRL_NOCYCCNT_M 0x02000000 127 #define CPU_DWT_CTRL_NOCYCCNT_S 25 132 #define CPU_DWT_CTRL_NOPRFCNT 0x01000000 133 #define CPU_DWT_CTRL_NOPRFCNT_BITN 24 134 #define CPU_DWT_CTRL_NOPRFCNT_M 0x01000000 135 #define CPU_DWT_CTRL_NOPRFCNT_S 24 145 #define CPU_DWT_CTRL_CYCEVTENA 0x00400000 146 #define CPU_DWT_CTRL_CYCEVTENA_BITN 22 147 #define CPU_DWT_CTRL_CYCEVTENA_M 0x00400000 148 #define CPU_DWT_CTRL_CYCEVTENA_S 22 159 #define CPU_DWT_CTRL_FOLDEVTENA 0x00200000 160 #define CPU_DWT_CTRL_FOLDEVTENA_BITN 21 161 #define CPU_DWT_CTRL_FOLDEVTENA_M 0x00200000 162 #define CPU_DWT_CTRL_FOLDEVTENA_S 21 172 #define CPU_DWT_CTRL_LSUEVTENA 0x00100000 173 #define CPU_DWT_CTRL_LSUEVTENA_BITN 20 174 #define CPU_DWT_CTRL_LSUEVTENA_M 0x00100000 175 #define CPU_DWT_CTRL_LSUEVTENA_S 20 184 #define CPU_DWT_CTRL_SLEEPEVTENA 0x00080000 185 #define CPU_DWT_CTRL_SLEEPEVTENA_BITN 19 186 #define CPU_DWT_CTRL_SLEEPEVTENA_M 0x00080000 187 #define CPU_DWT_CTRL_SLEEPEVTENA_S 19 196 #define CPU_DWT_CTRL_EXCEVTENA 0x00040000 197 #define CPU_DWT_CTRL_EXCEVTENA_BITN 18 198 #define CPU_DWT_CTRL_EXCEVTENA_M 0x00040000 199 #define CPU_DWT_CTRL_EXCEVTENA_S 18 208 #define CPU_DWT_CTRL_CPIEVTENA 0x00020000 209 #define CPU_DWT_CTRL_CPIEVTENA_BITN 17 210 #define CPU_DWT_CTRL_CPIEVTENA_M 0x00020000 211 #define CPU_DWT_CTRL_CPIEVTENA_S 17 219 #define CPU_DWT_CTRL_EXCTRCENA 0x00010000 220 #define CPU_DWT_CTRL_EXCTRCENA_BITN 16 221 #define CPU_DWT_CTRL_EXCTRCENA_M 0x00010000 222 #define CPU_DWT_CTRL_EXCTRCENA_S 16 232 #define CPU_DWT_CTRL_PCSAMPLEENA 0x00001000 233 #define CPU_DWT_CTRL_PCSAMPLEENA_BITN 12 234 #define CPU_DWT_CTRL_PCSAMPLEENA_M 0x00001000 235 #define CPU_DWT_CTRL_PCSAMPLEENA_S 12 248 #define CPU_DWT_CTRL_SYNCTAP_W 2 249 #define CPU_DWT_CTRL_SYNCTAP_M 0x00000C00 250 #define CPU_DWT_CTRL_SYNCTAP_S 10 251 #define CPU_DWT_CTRL_SYNCTAP_BIT28 0x00000C00 252 #define CPU_DWT_CTRL_SYNCTAP_BIT26 0x00000800 253 #define CPU_DWT_CTRL_SYNCTAP_BIT24 0x00000400 254 #define CPU_DWT_CTRL_SYNCTAP_DIS 0x00000000 266 #define CPU_DWT_CTRL_CYCTAP 0x00000200 267 #define CPU_DWT_CTRL_CYCTAP_BITN 9 268 #define CPU_DWT_CTRL_CYCTAP_M 0x00000200 269 #define CPU_DWT_CTRL_CYCTAP_S 9 270 #define CPU_DWT_CTRL_CYCTAP_BIT10 0x00000200 271 #define CPU_DWT_CTRL_CYCTAP_BIT6 0x00000000 279 #define CPU_DWT_CTRL_POSTCNT_W 4 280 #define CPU_DWT_CTRL_POSTCNT_M 0x000001E0 281 #define CPU_DWT_CTRL_POSTCNT_S 5 290 #define CPU_DWT_CTRL_POSTPRESET_W 4 291 #define CPU_DWT_CTRL_POSTPRESET_M 0x0000001E 292 #define CPU_DWT_CTRL_POSTPRESET_S 1 298 #define CPU_DWT_CTRL_CYCCNTENA 0x00000001 299 #define CPU_DWT_CTRL_CYCCNTENA_BITN 0 300 #define CPU_DWT_CTRL_CYCCNTENA_M 0x00000001 301 #define CPU_DWT_CTRL_CYCCNTENA_S 0 316 #define CPU_DWT_CYCCNT_CYCCNT_W 32 317 #define CPU_DWT_CYCCNT_CYCCNT_M 0xFFFFFFFF 318 #define CPU_DWT_CYCCNT_CYCCNT_S 0 333 #define CPU_DWT_CPICNT_CPICNT_W 8 334 #define CPU_DWT_CPICNT_CPICNT_M 0x000000FF 335 #define CPU_DWT_CPICNT_CPICNT_S 0 348 #define CPU_DWT_EXCCNT_EXCCNT_W 8 349 #define CPU_DWT_EXCCNT_EXCCNT_M 0x000000FF 350 #define CPU_DWT_EXCCNT_EXCCNT_S 0 366 #define CPU_DWT_SLEEPCNT_SLEEPCNT_W 8 367 #define CPU_DWT_SLEEPCNT_SLEEPCNT_M 0x000000FF 368 #define CPU_DWT_SLEEPCNT_SLEEPCNT_S 0 384 #define CPU_DWT_LSUCNT_LSUCNT_W 8 385 #define CPU_DWT_LSUCNT_LSUCNT_M 0x000000FF 386 #define CPU_DWT_LSUCNT_LSUCNT_S 0 397 #define CPU_DWT_FOLDCNT_FOLDCNT_W 8 398 #define CPU_DWT_FOLDCNT_FOLDCNT_M 0x000000FF 399 #define CPU_DWT_FOLDCNT_FOLDCNT_S 0 409 #define CPU_DWT_PCSR_EIASAMPLE_W 32 410 #define CPU_DWT_PCSR_EIASAMPLE_M 0xFFFFFFFF 411 #define CPU_DWT_PCSR_EIASAMPLE_S 0 423 #define CPU_DWT_COMP0_COMP_W 32 424 #define CPU_DWT_COMP0_COMP_M 0xFFFFFFFF 425 #define CPU_DWT_COMP0_COMP_S 0 440 #define CPU_DWT_MASK0_MASK_W 4 441 #define CPU_DWT_MASK0_MASK_M 0x0000000F 442 #define CPU_DWT_MASK0_MASK_S 0 454 #define CPU_DWT_FUNCTION0_MATCHED 0x01000000 455 #define CPU_DWT_FUNCTION0_MATCHED_BITN 24 456 #define CPU_DWT_FUNCTION0_MATCHED_M 0x01000000 457 #define CPU_DWT_FUNCTION0_MATCHED_S 24 463 #define CPU_DWT_FUNCTION0_CYCMATCH 0x00000080 464 #define CPU_DWT_FUNCTION0_CYCMATCH_BITN 7 465 #define CPU_DWT_FUNCTION0_CYCMATCH_M 0x00000080 466 #define CPU_DWT_FUNCTION0_CYCMATCH_S 7 473 #define CPU_DWT_FUNCTION0_EMITRANGE 0x00000020 474 #define CPU_DWT_FUNCTION0_EMITRANGE_BITN 5 475 #define CPU_DWT_FUNCTION0_EMITRANGE_M 0x00000020 476 #define CPU_DWT_FUNCTION0_EMITRANGE_S 5 513 #define CPU_DWT_FUNCTION0_FUNCTION_W 4 514 #define CPU_DWT_FUNCTION0_FUNCTION_M 0x0000000F 515 #define CPU_DWT_FUNCTION0_FUNCTION_S 0 528 #define CPU_DWT_COMP1_COMP_W 32 529 #define CPU_DWT_COMP1_COMP_M 0xFFFFFFFF 530 #define CPU_DWT_COMP1_COMP_S 0 545 #define CPU_DWT_MASK1_MASK_W 4 546 #define CPU_DWT_MASK1_MASK_M 0x0000000F 547 #define CPU_DWT_MASK1_MASK_S 0 559 #define CPU_DWT_FUNCTION1_MATCHED 0x01000000 560 #define CPU_DWT_FUNCTION1_MATCHED_BITN 24 561 #define CPU_DWT_FUNCTION1_MATCHED_M 0x01000000 562 #define CPU_DWT_FUNCTION1_MATCHED_S 24 568 #define CPU_DWT_FUNCTION1_DATAVADDR1_W 4 569 #define CPU_DWT_FUNCTION1_DATAVADDR1_M 0x000F0000 570 #define CPU_DWT_FUNCTION1_DATAVADDR1_S 16 576 #define CPU_DWT_FUNCTION1_DATAVADDR0_W 4 577 #define CPU_DWT_FUNCTION1_DATAVADDR0_M 0x0000F000 578 #define CPU_DWT_FUNCTION1_DATAVADDR0_S 12 588 #define CPU_DWT_FUNCTION1_DATAVSIZE_W 2 589 #define CPU_DWT_FUNCTION1_DATAVSIZE_M 0x00000C00 590 #define CPU_DWT_FUNCTION1_DATAVSIZE_S 10 598 #define CPU_DWT_FUNCTION1_LNK1ENA 0x00000200 599 #define CPU_DWT_FUNCTION1_LNK1ENA_BITN 9 600 #define CPU_DWT_FUNCTION1_LNK1ENA_M 0x00000200 601 #define CPU_DWT_FUNCTION1_LNK1ENA_S 9 614 #define CPU_DWT_FUNCTION1_DATAVMATCH 0x00000100 615 #define CPU_DWT_FUNCTION1_DATAVMATCH_BITN 8 616 #define CPU_DWT_FUNCTION1_DATAVMATCH_M 0x00000100 617 #define CPU_DWT_FUNCTION1_DATAVMATCH_S 8 624 #define CPU_DWT_FUNCTION1_EMITRANGE 0x00000020 625 #define CPU_DWT_FUNCTION1_EMITRANGE_BITN 5 626 #define CPU_DWT_FUNCTION1_EMITRANGE_M 0x00000020 627 #define CPU_DWT_FUNCTION1_EMITRANGE_S 5 673 #define CPU_DWT_FUNCTION1_FUNCTION_W 4 674 #define CPU_DWT_FUNCTION1_FUNCTION_M 0x0000000F 675 #define CPU_DWT_FUNCTION1_FUNCTION_S 0 686 #define CPU_DWT_COMP2_COMP_W 32 687 #define CPU_DWT_COMP2_COMP_M 0xFFFFFFFF 688 #define CPU_DWT_COMP2_COMP_S 0 703 #define CPU_DWT_MASK2_MASK_W 4 704 #define CPU_DWT_MASK2_MASK_M 0x0000000F 705 #define CPU_DWT_MASK2_MASK_S 0 717 #define CPU_DWT_FUNCTION2_MATCHED 0x01000000 718 #define CPU_DWT_FUNCTION2_MATCHED_BITN 24 719 #define CPU_DWT_FUNCTION2_MATCHED_M 0x01000000 720 #define CPU_DWT_FUNCTION2_MATCHED_S 24 727 #define CPU_DWT_FUNCTION2_EMITRANGE 0x00000020 728 #define CPU_DWT_FUNCTION2_EMITRANGE_BITN 5 729 #define CPU_DWT_FUNCTION2_EMITRANGE_M 0x00000020 730 #define CPU_DWT_FUNCTION2_EMITRANGE_S 5 767 #define CPU_DWT_FUNCTION2_FUNCTION_W 4 768 #define CPU_DWT_FUNCTION2_FUNCTION_M 0x0000000F 769 #define CPU_DWT_FUNCTION2_FUNCTION_S 0 780 #define CPU_DWT_COMP3_COMP_W 32 781 #define CPU_DWT_COMP3_COMP_M 0xFFFFFFFF 782 #define CPU_DWT_COMP3_COMP_S 0 797 #define CPU_DWT_MASK3_MASK_W 4 798 #define CPU_DWT_MASK3_MASK_M 0x0000000F 799 #define CPU_DWT_MASK3_MASK_S 0 811 #define CPU_DWT_FUNCTION3_MATCHED 0x01000000 812 #define CPU_DWT_FUNCTION3_MATCHED_BITN 24 813 #define CPU_DWT_FUNCTION3_MATCHED_M 0x01000000 814 #define CPU_DWT_FUNCTION3_MATCHED_S 24 821 #define CPU_DWT_FUNCTION3_EMITRANGE 0x00000020 822 #define CPU_DWT_FUNCTION3_EMITRANGE_BITN 5 823 #define CPU_DWT_FUNCTION3_EMITRANGE_M 0x00000020 824 #define CPU_DWT_FUNCTION3_EMITRANGE_S 5 861 #define CPU_DWT_FUNCTION3_FUNCTION_W 4 862 #define CPU_DWT_FUNCTION3_FUNCTION_M 0x0000000F 863 #define CPU_DWT_FUNCTION3_FUNCTION_S 0 866 #endif // __CPU_DWT__
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