Target Platform: ti.platforms.tiva:TM4C123GH6PM:1
Tool Chain Version: 15.12.2
BIOS Version: bios_6_46_00_22_eng
XDCTools Version: xdctools_3_32_01_11_eng
Benchmark | Cycles |
---|---|
Interrupt Latency | 135 |
Hwi_restore() | 1 |
Hwi_disable() | 3 |
Hwi dispatcher prolog | 114 |
Hwi dispatcher epilog | 209 |
Hwi dispatcher | 313 |
Hardware Interrupt to Blocked Task | 504 |
Hardware Interrupt to Software Interrupt | 327 |
Swi_enable() | 59 |
Swi_disable() | 10 |
Post Software Interrupt Again | 28 |
Post Software Interrupt without Context Switch | 86 |
Post Software Interrupt with Context Switch | 160 |
Create a New Task without Context Switch | 1598 |
Set a Task Priority without a Context Switch | 135 |
Task_yield() | 207 |
Post Semaphore No Waiting Task | 42 |
Post Semaphore No Task Switch | 163 |
Post Semaphore with Task Switch | 252 |
Pend on Semaphore No Context Switch | 61 |
Pend on Semaphore with Task Switch | 259 |
Clock_getTicks() | 8 |
POSIX Create a New Task without Context Switch | 3099 |
POSIX Set a Task Priority without a Context Switch | 249 |
POSIX Post Semaphore No Waiting Task | 52 |
POSIX Post Semaphore No Task Switch | 172 |
POSIX Post Semaphore with Task Switch | 261 |
POSIX Pend on Semaphore No Context Switch | 74 |
POSIX Pend on Semaphore with Task Switch | 269 |
The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “–endian=little -mv7M4 –abi=eabi –float_support=fpv4spd16 -ms –opt_for_speed=2 –program_level_compile -o3”.
The M4F target also supports zero latency interrupts. See ti.sysbios.family.arm.m3.Hwi cdocs for details.
See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.