AUX_EVCTL

Instance: AUX_EVCTL
Component: AUX_EVCTL
Base address: 0x400C5000


AUX Event Controller

TOP:AUX_EVCTL Register Summary

Register Name

Type

Register Width (Bits)

Register Reset

Address Offset

Physical Address

VECCFG0

RW

32

0x0000 0000

0x0000 0000

0x400C 5000

VECCFG1

RW

32

0x0000 0000

0x0000 0004

0x400C 5004

SCEWEVSEL

RW

32

0x0000 0000

0x0000 0008

0x400C 5008

EVTOAONFLAGS

RW

32

0x0000 0000

0x0000 000C

0x400C 500C

EVTOAONPOL

RW

32

0x0000 0000

0x0000 0010

0x400C 5010

DMACTL

RW

32

0x0000 0000

0x0000 0014

0x400C 5014

SWEVSET

RW

32

0x0000 0000

0x0000 0018

0x400C 5018

EVSTAT0

RO

32

0x0000 0000

0x0000 001C

0x400C 501C

EVSTAT1

RO

32

0x0000 0000

0x0000 0020

0x400C 5020

EVTOMCUPOL

RW

32

0x0000 0000

0x0000 0024

0x400C 5024

EVTOMCUFLAGS

RW

32

0x0000 0000

0x0000 0028

0x400C 5028

COMBEVTOMCUMASK

RW

32

0x0000 0000

0x0000 002C

0x400C 502C

VECFLAGS

RW

32

0x0000 0000

0x0000 0034

0x400C 5034

EVTOMCUFLAGSCLR

RW

32

0x0000 0000

0x0000 0038

0x400C 5038

EVTOAONFLAGSCLR

RW

32

0x0000 0000

0x0000 003C

0x400C 503C

VECFLAGSCLR

RW

32

0x0000 0000

0x0000 0040

0x400C 5040

TOP:AUX_EVCTL Register Descriptions

TOP:AUX_EVCTL:VECCFG0

Address Offset 0x0000 0000
Physical Address 0x400C 5000 Instance 0x400C 5000
Description Vector Configuration 0

AUX_SCE event vectors 0 and 1 configuration
Type RW
Bits Field Name Description Type Reset
31:15 RESERVED15 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000
14 VEC1_POL Selects vector 1 trigger event polarity.

To manually trigger vector 1 execution, set VEC1_EV to a known static value, and toggle VEC1_POL twice.
Value ENUM Name Description
0x0 RISE Rising edge triggers execution.
0x1 FALL Falling edge triggers execution.
RW 0
13 VEC1_EN Enables (1) or disables (0) triggering of vector 1 execution.

When enabled, the edge selected by VEC1_POL on the event selected by VEC1_EV will set VECFLAGS.VEC1, which in turn triggers vector 1 execution.

Note: Lower vectors (0) have priority.
Value ENUM Name Description
0x0 DIS Event detection is disabled
0x1 EN An event selected by VEC1_EV with polarity from VEC1_POL triggers a jump to vector # 1 when AUX_SCE is in sleep
RW 0
12:8 VEC1_EV Selects vector 1 trigger source event.
Value ENUM Name Description
0x0 AON_RTC_CH2 AON_RTC_CH2 event
0x1 AUX_COMPA AUX_COMPA event
0x2 AUX_COMPB AUX_COMPB event
0x3 TDC_DONE TDC_DONE event
0x4 TIMER0_EV TIMER0_EV event
0x5 TIMER1_EV TIMER1_EV event
0x6 SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event
0x7 ADC_DONE ADC_DONE event
0x8 ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event
0x9 OBSMUX0 OBSMUX0 event
0xA OBSMUX1 OBSMUX1 event
0xB AON_SW AON_SW event
0xC AON_PROG_WU AON_PROG_WU event
0xD AUXIO0 AUXIO0 input data
0xE AUXIO1 AUXIO1 input data
0xF AUXIO2 AUXIO2 input data
0x10 AUXIO3 AUXIO3 input data
0x11 AUXIO4 AUXIO4 input data
0x12 AUXIO5 AUXIO5 input data
0x13 AUXIO6 AUXIO6 input data
0x14 AUXIO7 AUXIO7 input data
0x15 AUXIO8 AUXIO8 input data
0x16 AUXIO9 AUXIO9 input data
0x17 AUXIO10 AUXIO10 input data
0x18 AUXIO11 AUXIO11 input data
0x19 AUXIO12 AUXIO12 input data
0x1A AUXIO13 AUXIO13 input data
0x1B AUXIO14 AUXIO14 input data
0x1C AUXIO15 AUXIO15 input data
0x1D ACLK_REF ACLK_REF event
0x1E MCU_EV MCU_EV event
0x1F ADC_IRQ ADC_IRQ event
RW 0b0 0000
7 RESERVED7 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0
6 VEC0_POL Selects vector 0 trigger event polarity.

To manually trigger vector 0 execution, set VEC0_EV to a known static value, and toggle VEC0_POL twice.
Value ENUM Name Description
0x0 RISE Rising edge triggers execution.
0x1 FALL Falling edge triggers execution.
RW 0
5 VEC0_EN Enables (1) or disables (0) triggering of vector 0 execution.

When enabled, the edge selected by VEC0_POL on the event selected by VEC0_EV will set VECFLAGS.VEC0, which in turn triggers vector 0 execution.
Value ENUM Name Description
0x0 DIS Event detection is disabled
0x1 EN An event selected by VEC0_EV with polarity from VEC0_POL triggers a jump to vector #0 when AUX_SCE is in sleep
RW 0
4:0 VEC0_EV Selects vector 0 trigger source event.
Value ENUM Name Description
0x0 AON_RTC_CH2 AON_RTC_CH2 event
0x1 AUX_COMPA AUX_COMPA event
0x2 AUX_COMPB AUX_COMPB event
0x3 TDC_DONE TDC_DONE event
0x4 TIMER0_EV TIMER0_EV event
0x5 TIMER1_EV TIMER1_EV event
0x6 SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event
0x7 ADC_DONE ADC_DONE event
0x8 ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event
0x9 OBSMUX0 OBSMUX0 event
0xA OBSMUX1 OBSMUX1 event
0xB AON_SW AON_SW event
0xC AON_PROG_WU AON_PROG_WU event
0xD AUXIO0 AUXIO0 input data
0xE AUXIO1 AUXIO1 input data
0xF AUXIO2 AUXIO2 input data
0x10 AUXIO3 AUXIO3 input data
0x11 AUXIO4 AUXIO4 input data
0x12 AUXIO5 AUXIO5 input data
0x13 AUXIO6 AUXIO6 input data
0x14 AUXIO7 AUXIO7 input data
0x15 AUXIO8 AUXIO8 input data
0x16 AUXIO9 AUXIO9 input data
0x17 AUXIO10 AUXIO10 input data
0x18 AUXIO11 AUXIO11 input data
0x19 AUXIO12 AUXIO12 input data
0x1A AUXIO13 AUXIO13 input data
0x1B AUXIO14 AUXIO14 input data
0x1C AUXIO15 AUXIO15 input data
0x1D ACLK_REF ACLK_REF event
0x1E MCU_EV MCU_EV event
0x1F ADC_IRQ ADC_IRQ event
RW 0b0 0000

TOP:AUX_EVCTL:VECCFG1

Address Offset 0x0000 0004
Physical Address 0x400C 5004 Instance 0x400C 5004
Description Vector Configuration 1

AUX_SCE event vectors 2 and 3 configuration
Type RW
Bits Field Name Description Type Reset
31:15 RESERVED15 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000
14 VEC3_POL Selects vector 3 trigger event polarity.

To manually trigger vector 3 execution, set VEC3_EV to a known static value, and toggle VEC3_POL twice.
Value ENUM Name Description
0x0 RISE Rising edge triggers execution.
0x1 FALL Falling edge triggers execution.
RW 0
13 VEC3_EN Enables (1) or disables (0) triggering of vector 3 execution.

When enabled, the edge selected by VEC3_POL on the event selected by VEC3_EV will set VECFLAGS.VEC3, which in turn triggers vector 3 execution.

Note: Lower vectors (0, 1 and 2) have priority.
Value ENUM Name Description
0x0 DIS Event detection is disabled
0x1 EN An event selected by VEC3_EV with polarity from VEC3_POL triggers a jump to vector # 3 when AUX_SCE is in sleep
RW 0
12:8 VEC3_EV Selects vector 3 trigger source event.
Value ENUM Name Description
0x0 AON_RTC_CH2 AON_RTC_CH2 event
0x1 AUX_COMPA AUX_COMPA event
0x2 AUX_COMPB AUX_COMPB event
0x3 TDC_DONE TDC_DONE event
0x4 TIMER0_EV TIMER0_EV event
0x5 TIMER1_EV TIMER1_EV event
0x6 SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event
0x7 ADC_DONE ADC_DONE event
0x8 ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event
0x9 OBSMUX0 OBSMUX0 event
0xA OBSMUX1 OBSMUX1 event
0xB AON_SW AON_SW event
0xC AON_PROG_WU AON_PROG_WU event
0xD AUXIO0 AUXIO0 input data
0xE AUXIO1 AUXIO1 input data
0xF AUXIO2 AUXIO2 input data
0x10 AUXIO3 AUXIO3 input data
0x11 AUXIO4 AUXIO4 input data
0x12 AUXIO5 AUXIO5 input data
0x13 AUXIO6 AUXIO6 input data
0x14 AUXIO7 AUXIO7 input data
0x15 AUXIO8 AUXIO8 input data
0x16 AUXIO9 AUXIO9 input data
0x17 AUXIO10 AUXIO10 input data
0x18 AUXIO11 AUXIO11 input data
0x19 AUXIO12 AUXIO12 input data
0x1A AUXIO13 AUXIO13 input data
0x1B AUXIO14 AUXIO14 input data
0x1C AUXIO15 AUXIO15 input data
0x1D ACLK_REF ACLK_REF event
0x1E MCU_EV MCU_EV event
0x1F ADC_IRQ ADC_IRQ event
RW 0b0 0000
7 RESERVED7 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0
6 VEC2_POL Selects vector 2 trigger event polarity.

To manually trigger vector 2 execution, set VEC2_EV to a known static value, and toggle VEC2_POL twice.
Value ENUM Name Description
0x0 RISE Rising edge triggers execution.
0x1 FALL Falling edge triggers execution.
RW 0
5 VEC2_EN Enables (1) or disables (0) triggering of vector 2 execution.

When enabled, the edge selected by VEC2_POL on the event selected by VEC2_EV will set VECFLAGS.VEC2, which in turn triggers vector 2 execution.

Note: Lower vectors (0 and 1) have priority.
Value ENUM Name Description
0x0 DIS Event detection is disabled
0x1 EN An event selected by VEC2_EV with polarity from VEC2_POL triggers a jump to vector # 2 when AUX_SCE is in sleep
RW 0
4:0 VEC2_EV Selects vector 2 trigger source event.
Value ENUM Name Description
0x0 AON_RTC_CH2 AON_RTC_CH2 event
0x1 AUX_COMPA AUX_COMPA event
0x2 AUX_COMPB AUX_COMPB event
0x3 TDC_DONE TDC_DONE event
0x4 TIMER0_EV TIMER0_EV event
0x5 TIMER1_EV TIMER1_EV event
0x6 SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event
0x7 ADC_DONE ADC_DONE event
0x8 ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event
0x9 OBSMUX0 OBSMUX0 event
0xA OBSMUX1 OBSMUX1 event
0xB AON_SW AON_SW event
0xC AON_PROG_WU AON_PROG_WU event
0xD AUXIO0 AUXIO0 input data
0xE AUXIO1 AUXIO1 input data
0xF AUXIO2 AUXIO2 input data
0x10 AUXIO3 AUXIO3 input data
0x11 AUXIO4 AUXIO4 input data
0x12 AUXIO5 AUXIO5 input data
0x13 AUXIO6 AUXIO6 input data
0x14 AUXIO7 AUXIO7 input data
0x15 AUXIO8 AUXIO8 input data
0x16 AUXIO9 AUXIO9 input data
0x17 AUXIO10 AUXIO10 input data
0x18 AUXIO11 AUXIO11 input data
0x19 AUXIO12 AUXIO12 input data
0x1A AUXIO13 AUXIO13 input data
0x1B AUXIO14 AUXIO14 input data
0x1C AUXIO15 AUXIO15 input data
0x1D ACLK_REF ACLK_REF event
0x1E MCU_EV MCU_EV event
0x1F ADC_IRQ ADC_IRQ event
RW 0b0 0000

TOP:AUX_EVCTL:SCEWEVSEL

Address Offset 0x0000 0008
Physical Address 0x400C 5008 Instance 0x400C 5008
Description Sensor Controller Engine Wait Event Selection

Event selection for the AUX_SCE WEV0, WEV1, BEV0 and BEV1 instructions
Type RW
Bits Field Name Description Type Reset
31:5 RESERVED5 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000 0000 0000 0000
4:0 WEV7_EV Selects the event source to be mapped to AUX_SCE:WUSTAT.EV_SIGNALS bit 7.
Value ENUM Name Description
0x0 AON_RTC_CH2 AON_RTC_CH2 event
0x1 AUX_COMPA AUX_COMPA event
0x2 AUX_COMPB AUX_COMPB event
0x3 TDC_DONE TDC_DONE event
0x4 TIMER0_EV TIMER0_EV event
0x5 TIMER1_EV TIMER1_EV event
0x6 SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event
0x7 ADC_DONE ADC_DONE event
0x8 ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event
0x9 OBSMUX0 OBSMUX0 event
0xA OBSMUX1 OBSMUX1 event
0xB AON_SW AON_SW event
0xC AON_PROG_WU AON_PROG_WU event
0xD AUXIO0 AUXIO0 input data
0xE AUXIO1 AUXIO1 input data
0xF AUXIO2 AUXIO2 input data
0x10 AUXIO3 AUXIO3 input data
0x11 AUXIO4 AUXIO4 input data
0x12 AUXIO5 AUXIO5 input data
0x13 AUXIO6 AUXIO6 input data
0x14 AUXIO7 AUXIO7 input data
0x15 AUXIO8 AUXIO8 input data
0x16 AUXIO9 AUXIO9 input data
0x17 AUXIO10 AUXIO10 input data
0x18 AUXIO11 AUXIO11 input data
0x19 AUXIO12 AUXIO12 input data
0x1A AUXIO13 AUXIO13 input data
0x1B AUXIO14 AUXIO14 input data
0x1C AUXIO15 AUXIO15 input data
0x1D ACLK_REF ACLK_REF event
0x1E MCU_EV MCU_EV event
0x1F ADC_IRQ ADC_IRQ event
RW 0b0 0000

TOP:AUX_EVCTL:EVTOAONFLAGS

Address Offset 0x0000 000C
Physical Address 0x400C 500C Instance 0x400C 500C
Description Events To AON Domain Flags

AUX event flags going to/through the AON domain

These events may be used to wake up the MCU domain.

The flags may be cleared by writing 0 to these bits or writing 1 to the corresponding bits in EVTOAONFLAGSCLR.
Type RW
Bits Field Name Description Type Reset
31:9 RESERVED9 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000 0000 0000
8 TIMER1_EV TIMER1_EV event flag. RW 0
7 TIMER0_EV TIMER0_EV event flag. RW 0
6 TDC_DONE TDC_DONE event flag. RW 0
5 ADC_DONE ADC_DONE event flag. RW 0
4 AUX_COMPB AUX_COMPB event flag. RW 0
3 AUX_COMPA AUX_COMPA event flag. RW 0
2 SWEV2 SWEV2 event flag. RW 0
1 SWEV1 SWEV1 event flag. RW 0
0 SWEV0 SWEV0 event flag. RW 0

TOP:AUX_EVCTL:EVTOAONPOL

Address Offset 0x0000 0010
Physical Address 0x400C 5010 Instance 0x400C 5010
Description Events To AON Domain Polarity

AUX event source polarity for the event flags going to/through the AON domain

Note the inverse polarity (0 = high, 1 = low).
Type RW
Bits Field Name Description Type Reset
31:9 RESERVED9 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000 0000 0000
8 TIMER1_EV Selects the event source level that sets EVTOAONFLAGS.TIMER1_EV.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
7 TIMER0_EV Selects the event source level that sets EVTOAONFLAGS.TIMER0_EV.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
6 TDC_DONE Selects the event source level that sets EVTOAONFLAGS.TDC_DONE.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
5 ADC_DONE Selects the event source level that sets EVTOAONFLAGS.ADC_DONE.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
4 AUX_COMPB Selects the event source level that sets EVTOAONFLAGS.AUX_COMPB.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
3 AUX_COMPA Selects the event source level that sets EVTOAONFLAGS.AUX_COMPA.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
2:0 RESERVED2 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000

TOP:AUX_EVCTL:DMACTL

Address Offset 0x0000 0014
Physical Address 0x400C 5014 Instance 0x400C 5014
Description Direct Memory Access Control
Type RW
Bits Field Name Description Type Reset
31:3 RESERVED3 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000 0000 0000
2 REQ_MODE DMA Request mode
Value ENUM Name Description
0x0 BURST Burst requests are generated on DMA channel 7 when the condition configured in SEL is met
0x1 SINGLE Single requests are generated on DMA channel 7 when the condition configured in SEL is met
RW 0
1 EN 0: DMA interface is disabled
1: DMA interface is enabled		 RW 0
0 SEL Selection of FIFO watermark level required to trigger an ADC_DMA transfer
Value ENUM Name Description
0x0 FIFO_NOT_EMPTY ADC_DMA event will be generated when there are valid samples in the ADC FIFO
0x1 FIFO_ALMOST_FULL ADC_DMA event will be generated when the ADC FIFO is almost full (3/4 full)
RW 0

TOP:AUX_EVCTL:SWEVSET

Address Offset 0x0000 0018
Physical Address 0x400C 5018 Instance 0x400C 5018
Description Software Event Set

Strobes for setting software events from the AUX domain to the AON/MCU Domains

The use of these events is software-defined.
Type RW
Bits Field Name Description Type Reset
31:3 RESERVED3 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000 0000 0000
2 SWEV2 Writing 1 sets software event 2.

For the MCU domain, the event flag can be read from EVTOAONFLAGS.SWEV2 and cleared using EVTOAONFLAGSCLR.SWEV2.		 WO 0
1 SWEV1 Writing 1 sets software event 1.

For the MCU domain, the event flag can be read from EVTOAONFLAGS.SWEV1 and cleared using EVTOAONFLAGSCLR.SWEV1.		 WO 0
0 SWEV0 Writing 1 sets software event 0.

For the MCU domain, the event flag can be read from EVTOAONFLAGS.SWEV0 and cleared using EVTOAONFLAGSCLR.SWEV0.		 WO 0

TOP:AUX_EVCTL:EVSTAT0

Address Offset 0x0000 001C
Physical Address 0x400C 501C Instance 0x400C 501C
Description Event Status 0

Current event source levels, 15:0
Type RO
Bits Field Name Description Type Reset
31:16 RESERVED Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0x0000
15 AUXIO2 Current value of AUXIO2 input data line RO 0
14 AUXIO1 Current value of AUXIO1 input data line RO 0
13 AUXIO0 Current value of AUXIO0 input data line RO 0
12 AON_PROG_WU Current value of OBSMUX3 event line RO 0
11 AON_SW Current value of OBSMUX2 event line RO 0
10 OBSMUX1 Current value of OBSMUX1 event line RO 0
9 OBSMUX0 Current value of OBSMUX0 event line RO 0
8 ADC_FIFO_ALMOST_FULL Current value of ADC_FIFO_ALMOST_FULL event line RO 0
7 ADC_DONE Current value of ADC_DONE event line RO 0
6 SMPH_AUTOTAKE_DONE Current value of SMPH_AUTOTAKE_DONE event line RO 0
5 TIMER1_EV Current value of TIMER1_EV event line RO 0
4 TIMER0_EV Current value of TIMER0_EV event line RO 0
3 TDC_DONE Current value of TDC_DONE event line RO 0
2 AUX_COMPB Current value of AUX_COMPB event line RO 0
1 AUX_COMPA Current value of AUX_COMPA event line RO 0
0 AON_RTC_CH2 Current value of AON_RTC_CH2 event line RO 0

TOP:AUX_EVCTL:EVSTAT1

Address Offset 0x0000 0020
Physical Address 0x400C 5020 Instance 0x400C 5020
Description Event Status 1

Current event source levels, 31:16
Type RO
Bits Field Name Description Type Reset
31:16 RESERVED16 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0x0000
15 ADC_IRQ Current value of ADC_IRQ event line RO 0
14 MCU_EV Current value of MCU_EV event line RO 0
13 ACLK_REF Current value of ACLK_REF event line RO 0
12 AUXIO15 Current value of AUXIO15 input data line RO 0
11 AUXIO14 Current value of AUXIO14 input data line RO 0
10 AUXIO13 Current value of AUXIO13 input data line RO 0
9 AUXIO12 Current value of AUXIO12 input data line RO 0
8 AUXIO11 Current value of AUXIO11 input data line RO 0
7 AUXIO10 Current value of AUXIO10 input data line RO 0
6 AUXIO9 Current value of AUXIO9 input data line RO 0
5 AUXIO8 Current value of AUXIO8 input data line RO 0
4 AUXIO7 Current value of AUXIO7 input data line RO 0
3 AUXIO6 Current value of AUXIO6 input data line RO 0
2 AUXIO5 Current value of AUXIO5 input data line RO 0
1 AUXIO4 Current value of AUXIO4 input data line RO 0
0 AUXIO3 Current value of AUXIO3 input data line RO 0

TOP:AUX_EVCTL:EVTOMCUPOL

Address Offset 0x0000 0024
Physical Address 0x400C 5024 Instance 0x400C 5024
Description Event To MCU Domain Polarity

AUX event source polarity for the event flags to the MCU domain

Note the inverse polarity (0 = high, 1 = low).
Type RW
Bits Field Name Description Type Reset
31:11 RESERVED11 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000
10 ADC_IRQ Selects the event source level that sets EVTOMCUFLAGS.ADC_IRQ.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
9 OBSMUX0 Selects the event source level that sets EVTOMCUFLAGS.OBSMUX0.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
8 ADC_FIFO_ALMOST_FULL Selects the event source level that sets EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
7 ADC_DONE Selects the event source level that sets EVTOMCUFLAGS.ADC_DONE.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
6 SMPH_AUTOTAKE_DONE Selects the event source level that sets EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
5 TIMER1_EV Selects the event source level that sets EVTOMCUFLAGS.TIMER1_EV.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
4 TIMER0_EV Selects the event source level that sets EVTOMCUFLAGS.TIMER0_EV.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
3 TDC_DONE Selects the event source level that sets EVTOMCUFLAGS.TDC_DONE.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
2 AUX_COMPB Selects the event source level that sets EVTOMCUFLAGS.AUX_COMPB.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
1 AUX_COMPA Selects the event source level that sets EVTOMCUFLAGS.AUX_COMPA.
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0
0 AON_WU_EV Selects the event source level that sets EVTOMCUFLAGS.AON_WU_EV
Value ENUM Name Description
0x0 HIGH High level
0x1 LOW Low level
RW 0

TOP:AUX_EVCTL:EVTOMCUFLAGS

Address Offset 0x0000 0028
Physical Address 0x400C 5028 Instance 0x400C 5028
Description Events to MCU Domain Flags

AUX event flags going to the MCU domain

The flags may be cleared by writing 0 to these bits or writing 1 to the corresponding bits in EVTOMCUFLAGSCLR.
Type RW
Bits Field Name Description Type Reset
31:11 RESERVED11 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000
10 ADC_IRQ ADC_IRQ event flag. RW 0
9 OBSMUX0 OBSMUX0 event flag. RW 0
8 ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event flag. RW 0
7 ADC_DONE ADC_DONE event flag. RW 0
6 SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event flag. RW 0
5 TIMER1_EV TIMER1_EV event flag. RW 0
4 TIMER0_EV TIMER0_EV event flag. RW 0
3 TDC_DONE TDC_DONE event flag. RW 0
2 AUX_COMPB AUX_COMPB event flag. RW 0
1 AUX_COMPA AUX_COMPA event flag. RW 0
0 AON_WU_EV AON_WU_EV event flag.

This is an OR of the AON_RTC_CH2, AON_PROG_WU and AON_SW events. These event sources must be cleared before clearing AON_WU_EV.		 RW 0

TOP:AUX_EVCTL:COMBEVTOMCUMASK

Address Offset 0x0000 002C
Physical Address 0x400C 502C Instance 0x400C 502C
Description Combined Event To MCU Domain Mask

Selects which of the flags In EVTOMCUFLAGS that contribute to the AUX_COMB event to the MCU domain

The AUX_COMB event is asserted as long as one or more of the included event flags are set.
Type RW
Bits Field Name Description Type Reset
31:11 RESERVED11 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000
10 ADC_IRQ Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_IRQ contribution to the AUX_COMB event. RW 0
9 OBSMUX0 Includes (1) or excludes (0) EVTOMCUFLAGS.OBSMUX0 contribution to the AUX_COMB event. RW 0
8 ADC_FIFO_ALMOST_FULL Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL contribution to the AUX_COMB event. RW 0
7 ADC_DONE Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_DONE contribution to the AUX_COMB event. RW 0
6 SMPH_AUTOTAKE_DONE Includes (1) or excludes (0) EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE contribution to the AUX_COMB event. RW 0
5 TIMER1_EV Includes (1) or excludes (0) EVTOMCUFLAGS.TIMER1_EV contribution to the AUX_COMB event. RW 0
4 TIMER0_EV Includes (1) or excludes (0) EVTOMCUFLAGS.TIMER0_EV contribution to the AUX_COMB event. RW 0
3 TDC_DONE Includes (1) or excludes (0) EVTOMCUFLAGS.TDC_DONE contribution to the AUX_COMB event. RW 0
2 AUX_COMPB Includes (1) or excludes (0) EVTOMCUFLAGS.AUX_COMPB contribution to the AUX_COMB event. RW 0
1 AUX_COMPA Includes (1) or excludes (0) EVTOMCUFLAGS.AUX_COMPA contribution to the AUX_COMB event. RW 0
0 AON_WU_EV Includes (1) or excludes (0) EVTOMCUFLAGS.AON_WU_EV contribution to the AUX_COMB event. RW 0

TOP:AUX_EVCTL:VECFLAGS

Address Offset 0x0000 0034
Physical Address 0x400C 5034 Instance 0x400C 5034
Description Vector Flags

If a vector flag has been set and AUX_SCE is sleeping, it will wake up and execute the vector. If multiple vectors have been set, the one with the lowest index will execute first, and the next after returning to sleep.

During execution of a vector, the flag must be cleared, by writing a 1 to the corresponding bit in VECFLAGSCLR.
Type RW
Bits Field Name Description Type Reset
31:4 RESERVED4 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0x000 0000
3 VEC3 The vector flag is set if the edge selected VECCFG1.VEC3_POL occurs on the event selected in VECCFG1.VEC3_EV.

The flag is cleared by writing a 0 to this bit, or (preferably) a 1 to VECFLAGSCLR.VEC3.		 RW 0
2 VEC2 The vector flag is set if the edge selected VECCFG1.VEC2_POL occurs on the event selected in VECCFG1.VEC2_EV.

The flag is cleared by writing a 0 to this bit, or (preferably) a 1 to VECFLAGSCLR.VEC2.		 RW 0
1 VEC1 The vector flag is set if the edge selected VECCFG0.VEC1_POL occurs on the event selected in VECCFG0.VEC1_EV.

The flag is cleared by writing a 0 to this bit, or (preferably) a 1 to VECFLAGSCLR.VEC1.		 RW 0
0 VEC0 The vector flag is set if the edge selected VECCFG0.VEC0_POL occurs on the event selected in VECCFG0.VEC0_EV.

The flag is cleared by writing a 0 to this bit, or (preferably) a 1 to VECFLAGSCLR.VEC0.		 RW 0

TOP:AUX_EVCTL:EVTOMCUFLAGSCLR

Address Offset 0x0000 0038
Physical Address 0x400C 5038 Instance 0x400C 5038
Description Events To MCU Domain Flags Clear

Strobes for clearing flags in EVTOMCUFLAGS.
Type RW
Bits Field Name Description Type Reset
31:11 RESERVED11 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000
10 ADC_IRQ Writing 1 clears EVTOMCUFLAGS.ADC_IRQ.

Read value is 0.		 WO 0
9 OBSMUX0 Writing 1 clears EVTOMCUFLAGS.OBSMUX0.

Read value is 0.		 WO 0
8 ADC_FIFO_ALMOST_FULL Writing 1 clears EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL.

Read value is 0.		 WO 0
7 ADC_DONE Writing 1 clears EVTOMCUFLAGS.ADC_DONE.

Read value is 0.		 WO 0
6 SMPH_AUTOTAKE_DONE Writing 1 clears [EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE.

Read value is 0.		 WO 0
5 TIMER1_EV Writing 1 clears EVTOMCUFLAGS.TIMER1_EV.

Read value is 0.		 WO 0
4 TIMER0_EV Writing 1 clears EVTOMCUFLAGS.TIMER0_EV.

Read value is 0.		 WO 0
3 TDC_DONE Writing 1 clears EVTOMCUFLAGS.TDC_DONE.

Read value is 0.		 WO 0
2 AUX_COMPB Writing 1 clears EVTOMCUFLAGS.AUX_COMPB.

Read value is 0.		 WO 0
1 AUX_COMPA Writing 1 clears EVTOMCUFLAGS.AUX_COMPA.

Read value is 0.		 WO 0
0 AON_WU_EV Writing 1 clears EVTOMCUFLAGS.AON_WU_EV.

Read value is 0.		 WO 0

TOP:AUX_EVCTL:EVTOAONFLAGSCLR

Address Offset 0x0000 003C
Physical Address 0x400C 503C Instance 0x400C 503C
Description Events To AON Domain Clear

Strobes for clearing flags in EVTOAONFLAGS.
Type RW
Bits Field Name Description Type Reset
31:9 RESERVED9 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000 0000 0000
8 TIMER1_EV Writing 1 clears EVTOAONFLAGS.TIMER1_EV.

Read value is 0.		 WO 0
7 TIMER0_EV Writing 1 clears EVTOAONFLAGS.TIMER0_EV.

Read value is 0.		 WO 0
6 TDC_DONE Writing 1 clears EVTOAONFLAGS.TDC_DONE.

Read value is 0.		 WO 0
5 ADC_DONE Writing 1 clears EVTOAONFLAGS.ADC_DONE.

Read value is 0.		 WO 0
4 AUX_COMPB Writing 1 clears EVTOAONFLAGS.AUX_COMPB.

Read value is 0.		 WO 0
3 AUX_COMPA Writing 1 clears EVTOAONFLAGS.AUX_COMPA.

Read value is 0.		 WO 0
2 SWEV2 Writing 1 clears EVTOAONFLAGS.SWEV2.

Read value is 0.		 WO 0
1 SWEV1 Writing 1 clears EVTOAONFLAGS.SWEV1.

Read value is 0.		 WO 0
0 SWEV0 Writing 1 clears EVTOAONFLAGS.SWEV0.

Read value is 0.		 WO 0

TOP:AUX_EVCTL:VECFLAGSCLR

Address Offset 0x0000 0040
Physical Address 0x400C 5040 Instance 0x400C 5040
Description Vector Flags Clear

Strobes for clearing flags in VECFLAGS.
Type RW
Bits Field Name Description Type Reset
31:4 RESERVED4 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0x000 0000
3 VEC3 Writing 1 clears VECFLAGS.VEC3.

Read value is 0.		 WO 0
2 VEC2 Writing 1 clears VECFLAGS.VEC2.

Read value is 0.		 WO 0
1 VEC1 Writing 1 clears VECFLAGS.VEC1.

Read value is 0.		 WO 0
0 VEC0 Writing 1 clears VECFLAGS.VEC0.

Read value is 0.		 WO 0


© 2015. Texas Instruments | All Rights Reserved