C28x large model Timing Benchmarks

Target Platform: ti.platforms.tms320x28:TMS320F280049M

Tool Chain Version: 20.2.0

BIOS Version: bios_6_83_00_16_eng

XDCTools Version: xdctools_3_61_04_30_core_eng

Benchmark	Cycles
Interrupt Latency	242
Hwi_restore()	19
Hwi_disable()	13
Hwi dispatcher prolog	202
Hwi dispatcher epilog	157
Hwi dispatcher	362
Hardware Interrupt to Blocked Task	579
Hardware Interrupt to Software Interrupt	416
Swi_enable()	86
Swi_disable()	11
Post Software Interrupt Again	33
Post Software Interrupt without Context Switch	116
Post Software Interrupt with Context Switch	227
Create a New Task without Context Switch	3559
Set a Task Priority without a Context Switch	185
Task_yield()	228
Post Semaphore No Waiting Task	89
Post Semaphore No Task Switch	205
Post Semaphore with Task Switch	282
Pend on Semaphore No Context Switch	61
Pend on Semaphore with Task Switch	321
Clock_getTicks()	10
POSIX Create a New Task without Context Switch	6454
POSIX Set a Task Priority without a Context Switch	236
POSIX Post Semaphore No Waiting Task	98
POSIX Post Semaphore No Task Switch	215
POSIX Post Semaphore with Task Switch	291
POSIX Pend on Semaphore No Context Switch	71
POSIX Pend on Semaphore with Task Switch	330

The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “-v28 -DLARGE_MODEL=1 -ml -mo –program_level_compile -o3”.

Runtime performance was optimized by reducing CPU clock speed to eliminate flash wait states.

The C28x targets also supports zero latency interrupts. See ti.sysbios.family.c28.Hwi cdocs for details.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.