GCC Cortex-A9 with hard FP Timing Benchmarks

Target Platform: ti.platforms.evmAM437X

Tool Chain Version: 9.2.1

BIOS Version: bios_6_83_00_16_eng

XDCTools Version: xdctools_3_61_04_30_core_eng

Benchmark	Cycles
Interrupt Latency	321
Hwi_restore()	8
Hwi_disable()	4
Hwi dispatcher prolog	190
Hwi dispatcher epilog	162
Hwi dispatcher	352
Hardware Interrupt to Blocked Task	561
Hardware Interrupt to Software Interrupt	373
Swi_enable()	61
Swi_disable()	12
Post Software Interrupt Again	24
Post Software Interrupt without Context Switch	81
Post Software Interrupt with Context Switch	151
Create a New Task without Context Switch	1398
Set a Task Priority without a Context Switch	103
Task_yield()	251
Post Semaphore No Waiting Task	81
Post Semaphore No Task Switch	172
Post Semaphore with Task Switch	266
Pend on Semaphore No Context Switch	40
Pend on Semaphore with Task Switch	275
Clock_getTicks()	15
POSIX Create a New Task without Context Switch	2550
POSIX Set a Task Priority without a Context Switch	88
POSIX Post Semaphore No Waiting Task	84
POSIX Post Semaphore No Task Switch	172
POSIX Post Semaphore with Task Switch	300
POSIX Pend on Semaphore No Context Switch	43
POSIX Pend on Semaphore with Task Switch	290

As the timer used to run these benchmarks is run at 1/2 the CPU frequency, an deviation of +-2 cycles is to be expected.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.