C28x large model Timing Benchmarks
Target Platform: ti.platforms.tms320x28:TMS320F280049M_regresstest:1
Tool Chain Version: 18.12.2
BIOS Version: bios_6_76_01_11_eng_k3
XDCTools Version: xdctools_3_55_01_20_core_eng
Benchmark | Cycles |
---|---|
Interrupt Latency | 234 |
Hwi_restore() | 19 |
Hwi_disable() | 13 |
Hwi dispatcher prolog | 201 |
Hwi dispatcher epilog | 155 |
Hwi dispatcher | 359 |
Hardware Interrupt to Blocked Task | 581 |
Hardware Interrupt to Software Interrupt | 416 |
Swi_enable() | 86 |
Swi_disable() | 11 |
Post Software Interrupt Again | 33 |
Post Software Interrupt without Context Switch | 116 |
Post Software Interrupt with Context Switch | 227 |
Create a New Task without Context Switch | 3582 |
Set a Task Priority without a Context Switch | 185 |
Task_yield() | 233 |
Post Semaphore No Waiting Task | 89 |
Post Semaphore No Task Switch | 205 |
Post Semaphore with Task Switch | 287 |
Pend on Semaphore No Context Switch | 70 |
Pend on Semaphore with Task Switch | 323 |
Clock_getTicks() | 10 |
POSIX Create a New Task without Context Switch | 6486 |
POSIX Set a Task Priority without a Context Switch | 236 |
POSIX Post Semaphore No Waiting Task | 98 |
POSIX Post Semaphore No Task Switch | 215 |
POSIX Post Semaphore with Task Switch | 297 |
POSIX Pend on Semaphore No Context Switch | 80 |
POSIX Pend on Semaphore with Task Switch | 333 |
The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “-v28 -DLARGE_MODEL=1 -ml -mo –program_level_compile -o3”.
Runtime performance was optimized by reducing CPU clock speed to eliminate flash wait states.
The C28x targets also supports zero latency interrupts. See ti.sysbios.family.c28.Hwi cdocs for details.
See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.