IAR Cortex-M3 Object Size Benchmarks
Target Platform: ti.platforms.simplelink:CC1350:1
Tool Chain Version: 8.11.1.47
BIOS Version: bios_6_52_00_11_eng
XDCTools Version: xdctools_3_50_03_33_core
Object Name | Size |
---|---|
Hwi | 48 |
Swi | 56 |
Task | 88 |
Semaphore | 32 |
GateMutex | 40 |
Clock | 40 |
POSIX Pthread | 168 |
POSIX Semaphore | 28 |
POSIX Mutex | 40 |
POSIX Timer | 64 |
The M3 target also supports zero latency interrupts. See ti.sysbios.family.arm.m3.Hwi cdocs for details.
See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.