module ti.sysbios.family.arm.v7r.tms570.Boot

TMS570DCxx/RM57Dxx Boot Support

//TODO Document this module [ more ... ]
C synopsis target-domain sourced in ti/sysbios/family/arm/v7r/tms570/Boot.xdc
DETAILS
//TODO Document this module
This Boot module supports boot initialization for the Cortex-R5F cores. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing).
The code to support the boot module is placed in a separate section named ".text:.bootCodeSection" to allow placement of this section in the linker .cmd file if necessary. This section is a subsection of the ".text" section so this code will be placed into the .text section unless explicitly placed, either through Program.sectMap or through a linker command file.
CLOCK CONFIGURATION
Using this Boot module will automatically enable clock configuration. As part of the clock configuration, this module will setup the PLL based on the multiplier and divider values configured. Once the PLL is setup, the CPU clock source (GCLK) is changed from OSCIN to PLL1. In addition, this module also sets up the VCLK to equal GCLK/2 and selects the VCLK as the source for the RTI timer.
The formula for PLL output frequency is shown below. The multiplier and the various dividers can be configured to achieve different CPU frequencies. By default, this module will configure the PLL to run the CPU at 100MHz and the RTI Timer is clocked at 50MHz.
  Formula for PLL output frequency:

          Foscin       NF
  Fpll = -------- X --------
            NR       OD x R

  where, Foscin is frequency of PLL input clock from oscillator
         NR     is prescale divider for the input clock
         NF     is multiplier
         OD,R   is postscale divider

  NF = PLLMUL + 1
  NR = REFCLKDIV + 1 (max 62)
  R  = PLLDIV + 1
  OD = ODPLL + 1
FLASH CONFIGURATION
If flash configuration is enabled, this module will compute the number of flash wait states required at the current CPU frequency and will program the respective flash registers. This module also allows the user to enable/disable flash prefetching on flash ports A and B.
 
config Boot_configureClocks  // module-wide

Clock configuration flag, default is true

C synopsis target-domain
extern const Bool Boot_configureClocks;
 
DETAILS
Set to false to disable clock configuration.
Clock configuration will setup the CPU (and RTI) clock source, configure the PLL and system clock dividers.
Module-Wide Built-Ins

C synopsis target-domain
Types_ModuleId Boot_Module_id();
// Get this module's unique id
 
Bool Boot_Module_startupDone();
// Test if this module has completed startup
 
IHeap_Handle Boot_Module_heap();
// The heap from which this module allocates memory
 
Bool Boot_Module_hasMask();
// Test whether this module has a diagnostics mask
 
Bits16 Boot_Module_getMask();
// Returns the diagnostics mask for this module
 
Void Boot_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
 
Configuration settings sourced in ti/sysbios/family/arm/v7r/tms570/Boot.xdc
var Boot = xdc.useModule('ti.sysbios.family.arm.v7r.tms570.Boot');
module-wide constants & types
    var obj = new Boot.ModuleView// ;
        obj.configureClocks = Bool  ...
        obj.frequencyModulationEnable = Bool  ...
        obj.OSCIN = UInt  ...
        obj.PLLMUL = UInt  ...
        obj.PLLDIV = UInt  ...
        obj.REFCLKDIV = UInt  ...
        obj.ODPLL = UInt  ...
        obj.SPREADINGRATE = UInt  ...
        obj.MULMOD = UInt  ...
        obj.SPR_AMOUNT = UInt  ...
module-wide config parameters
 
 
 
metaonly struct Boot.ModuleView
Configuration settings
var obj = new Boot.ModuleView;
 
    obj.configureClocks = Bool  ...
    obj.frequencyModulationEnable = Bool  ...
    obj.OSCIN = UInt  ...
    obj.PLLMUL = UInt  ...
    obj.PLLDIV = UInt  ...
    obj.REFCLKDIV = UInt  ...
    obj.ODPLL = UInt  ...
    obj.SPREADINGRATE = UInt  ...
    obj.MULMOD = UInt  ...
    obj.SPR_AMOUNT = UInt  ...
 
 
config Boot.configureClocks  // module-wide

Clock configuration flag, default is true

Configuration settings
Boot.configureClocks = Bool true;
 
DETAILS
Set to false to disable clock configuration.
Clock configuration will setup the CPU (and RTI) clock source, configure the PLL and system clock dividers.
C SYNOPSIS
 
metaonly config Boot.MULMOD  // module-wide

Multiplier correction when modulation enabled (valid range from 0 to 511)

Configuration settings
Boot.MULMOD = UInt 0;
 
 
metaonly config Boot.ODPLL  // module-wide

Internal PLL Output divider (valid range from 0 to 7)

Configuration settings
Boot.ODPLL = UInt 1;
 
DETAILS
PLL postscale divider, OD = ODPLL + 1
 
metaonly config Boot.OSCIN  // module-wide

Input frequency to PLL, in MHz. Default is 16 MHz

Configuration settings
Boot.OSCIN = UInt 16;
 
DETAILS
This is the frequency of the oscillator clock (OSCIN) input to the PLL.
 
metaonly config Boot.PLLDIV  // module-wide

PLL Output clock divider (valid range from 0 to 31)

Configuration settings
Boot.PLLDIV = UInt 0;
 
DETAILS
PLL postscale divider, R = PLLDIV + 1
 
metaonly config Boot.PLLMUL  // module-wide

PLL Multiplication factor value (valid range from 0 to 255)

Configuration settings
Boot.PLLMUL = UInt 0x4A;
 
DETAILS
PLL Multiplier, NF = PLLMUL + 1
 
metaonly config Boot.REFCLKDIV  // module-wide

PLL Reference clock divider value (valid range from 0 to 62)

Configuration settings
Boot.REFCLKDIV = UInt 0x5;
 
DETAILS
PLL Prescale divider, NR = REFCLKDIV + 1 (max 62)
 
metaonly config Boot.SPREADINGRATE  // module-wide

Spreading rate (valid range from 0 to 511)

Configuration settings
Boot.SPREADINGRATE = UInt 0x1FF;
 
 
metaonly config Boot.SPR_AMOUNT  // module-wide

Spreading amount (valid range from 0 to 511)

Configuration settings
Boot.SPR_AMOUNT = UInt 0;
 
 
metaonly config Boot.common$  // module-wide

Common module configuration parameters

Configuration settings
Boot.common$ = Types.Common$ undefined;
 
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
 
metaonly config Boot.configureFlashController  // module-wide

Flash controller configuration flag, default is true

Configuration settings
Boot.configureFlashController = Bool true;
 
DETAILS
Set to true to enable the configuration of the Flash controller wait states and prefetch mode.
 
metaonly config Boot.configureFlashWaitStates  // module-wide

Flash controller wait states configuration flag, default is true

Configuration settings
Boot.configureFlashWaitStates = Bool true;
 
DETAILS
Set to true to configure the Flash controller wait states. The number of wait states is computed based upon the CPU frequency.
 
metaonly config Boot.flashPortAPrefetchEnable  // module-wide

Flash controller port A prefetch enable flag, default is true

Configuration settings
Boot.flashPortAPrefetchEnable = Bool true;
 
 
metaonly config Boot.flashPortBPrefetchEnable  // module-wide

Flash controller port B prefetch enable flag, default is true

Configuration settings
Boot.flashPortBPrefetchEnable = Bool true;
 
 
metaonly config Boot.frequencyModulationEnable  // module-wide

Enable frequency modulation. Default is false

Configuration settings
Boot.frequencyModulationEnable = Bool false;
 
 
metaonly config Boot.rovViewInfo  // module-wide
Configuration settings
Boot.rovViewInfo = ViewInfo.Instance ViewInfo.create;
 
generated on Fri, 10 Jun 2016 23:29:27 GMT