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32
33 import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
34 import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
35 import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
36
37 /*!
38 * ======== GPIO for MSP430F21x2 ========
39 * MSP430 General Purpose Input Output Ports
40 */
41 metaonly module GPIO_MSP430F21x2 inherits IGPIO {
42 /*!
43 * ======== create ========
44 * Create an instance of this peripheral. Use a customized
45 * init function so that we can get access to the ADC10,
46 * Comparator_A, and BCS+ instances.
47 */
48 create(ADC10.Instance adc10, Comparator.Instance comparator,
49 BCSplus.Instance clock);
50
51 instance:
52 /*! @_nodoc */
53 config ADC10.Instance adc10;
54
55 /*! @_nodoc */
56 config Comparator.Instance comparator;
57
58 /*! @_nodoc */
59 config BCSplus.Instance clock;
60
61 /*! Define an array to describe all device pins. The 1st dimension
62 * denotes the port, the second the pin on that port. On an
63 * MSP430F21x2 device, there are 3 x 8 = 24 pins total.
64 */
65
66 67
68 69
70 config DevicePin_t devicePins[3][8];
71
72 /*! Implementation of Device Pin Functional Configuration */
73 override config DevicePinFunctionSetting_t devicePinSetting[3][8];
74
75 /*! Determine if each Register needs to be forced set or not */
76 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
77 [
78 { register : "P1OUT" , regForceSet : true },
79 { register : "P1SEL" , regForceSet : false },
80 { register : "P1SEL2", regForceSet : false },
81 { register : "P1DIR" , regForceSet : true },
82 { register : "P1REN" , regForceSet : false },
83 { register : "P1IES" , regForceSet : true },
84 { register : "P1IFG" , regForceSet : true },
85 { register : "P1IE" , regForceSet : false },
86 { register : "P2OUT" , regForceSet : true },
87 { register : "P2SEL" , regForceSet : false },
88 { register : "P2SEL2", regForceSet : false },
89 { register : "P2DIR" , regForceSet : true },
90 { register : "P2REN" , regForceSet : false },
91 { register : "P2IES" , regForceSet : true },
92 { register : "P2IFG" , regForceSet : true },
93 { register : "P2IE" , regForceSet : false },
94 { register : "P3OUT" , regForceSet : true },
95 { register : "P3SEL" , regForceSet : false },
96 { register : "P3DIR" , regForceSet : true },
97 { register : "P3REN" , regForceSet : false },
98 ];
99
100 101 102 103 104 105
106
107 /*! Port 1 Output Register */
108 config GpioBits8PxOut_t P1OUT = {
109 Bit0 : BIT0_OFF,
110 Bit1 : BIT1_OFF,
111 Bit2 : BIT2_OFF,
112 Bit3 : BIT3_OFF,
113 Bit4 : BIT4_OFF,
114 Bit5 : BIT5_OFF,
115 Bit6 : BIT6_OFF,
116 Bit7 : BIT7_OFF
117 };
118
119 /*! Port 1 Port Select Register */
120 config GpioBits8PxSel_t P1SEL = {
121 Bit0 : BIT0_OFF,
122 Bit1 : BIT1_OFF,
123 Bit2 : BIT2_OFF,
124 Bit3 : BIT3_OFF,
125 Bit4 : BIT4_OFF,
126 Bit5 : BIT5_OFF,
127 Bit6 : BIT6_OFF,
128 Bit7 : BIT7_OFF
129 };
130
131 /*! Port 1 Port Select 2 Register */
132 config GpioBits8PxSel_t P1SEL2 = {
133 Bit0 : BIT0_OFF,
134 Bit1 : BIT1_OFF,
135 Bit2 : BIT2_OFF,
136 Bit3 : BIT3_OFF,
137 Bit4 : BIT4_OFF,
138 Bit5 : BIT5_OFF,
139 Bit6 : BIT6_OFF,
140 Bit7 : BIT7_OFF
141 };
142
143 /*! Port 1 Direction Register */
144 config GpioBits8PxDir_t P1DIR = {
145 Bit0 : BIT0_OFF,
146 Bit1 : BIT1_OFF,
147 Bit2 : BIT2_OFF,
148 Bit3 : BIT3_OFF,
149 Bit4 : BIT4_OFF,
150 Bit5 : BIT5_OFF,
151 Bit6 : BIT6_OFF,
152 Bit7 : BIT7_OFF
153 };
154
155 /*! Port 1 Resistor Enable Register */
156 config GpioBits8PxRen_t P1REN = {
157 Bit0 : BIT0_OFF,
158 Bit1 : BIT1_OFF,
159 Bit2 : BIT2_OFF,
160 Bit3 : BIT3_OFF,
161 Bit4 : BIT4_OFF,
162 Bit5 : BIT5_OFF,
163 Bit6 : BIT6_OFF,
164 Bit7 : BIT7_OFF
165 };
166
167 /*! Port 2 Output Register */
168 config GpioBits8PxOut_t P2OUT = {
169 Bit0 : BIT0_OFF,
170 Bit1 : BIT1_OFF,
171 Bit2 : BIT2_OFF,
172 Bit3 : BIT3_OFF,
173 Bit4 : BIT4_OFF,
174 Bit5 : BIT5_OFF,
175 Bit6 : BIT6_OFF,
176 Bit7 : BIT7_OFF
177 };
178
179 /*! Port 2 Port Select Register */
180 config GpioBits8PxSel_t P2SEL = {
181 Bit0 : BIT0_OFF,
182 Bit1 : BIT1_OFF,
183 Bit2 : BIT2_OFF,
184 Bit3 : BIT3_OFF,
185 Bit4 : BIT4_OFF,
186 Bit5 : BIT5_OFF,
187 Bit6 : BIT6,
188 Bit7 : BIT7
189 };
190
191 /*! Port 2 Port Select 2 Register */
192 config GpioBits8PxSel2_t P2SEL2 = {
193 Bit0 : BIT0_OFF,
194 Bit1 : BIT1_OFF,
195 Bit2 : BIT2_OFF,
196 Bit3 : BIT3_OFF,
197 Bit4 : BIT4_OFF,
198 Bit5 : BIT5_OFF,
199 Bit6 : BIT6_OFF,
200 Bit7 : BIT7_OFF
201 };
202
203 /*! Port 2 Direction Register */
204 config GpioBits8PxDir_t P2DIR = {
205 Bit0 : BIT0_OFF,
206 Bit1 : BIT1_OFF,
207 Bit2 : BIT2_OFF,
208 Bit3 : BIT3_OFF,
209 Bit4 : BIT4_OFF,
210 Bit5 : BIT5_OFF,
211 Bit6 : BIT6_OFF,
212 Bit7 : BIT7_OFF
213 };
214
215 /*! Port 2 Resistor Enable Register */
216 config GpioBits8PxRen_t P2REN = {
217 Bit0 : BIT0_OFF,
218 Bit1 : BIT1_OFF,
219 Bit2 : BIT2_OFF,
220 Bit3 : BIT3_OFF,
221 Bit4 : BIT4_OFF,
222 Bit5 : BIT5_OFF,
223 Bit6 : BIT6_OFF,
224 Bit7 : BIT7_OFF
225 };
226
227 /*! Port 3 Output Register */
228 config GpioBits8PxOut_t P3OUT = {
229 Bit0 : BIT0_OFF,
230 Bit1 : BIT1_OFF,
231 Bit2 : BIT2_OFF,
232 Bit3 : BIT3_OFF,
233 Bit4 : BIT4_OFF,
234 Bit5 : BIT5_OFF,
235 Bit6 : BIT6_OFF,
236 Bit7 : BIT7_OFF
237 };
238
239 /*! Port 3 Port Select Register */
240 config GpioBits8PxSel_t P3SEL = {
241 Bit0 : BIT0_OFF,
242 Bit1 : BIT1_OFF,
243 Bit2 : BIT2_OFF,
244 Bit3 : BIT3_OFF,
245 Bit4 : BIT4_OFF,
246 Bit5 : BIT5_OFF,
247 Bit6 : BIT6_OFF,
248 Bit7 : BIT7_OFF
249 };
250
251 /*! Port 3 Direction Register */
252 config GpioBits8PxDir_t P3DIR = {
253 Bit0 : BIT0_OFF,
254 Bit1 : BIT1_OFF,
255 Bit2 : BIT2_OFF,
256 Bit3 : BIT3_OFF,
257 Bit4 : BIT4_OFF,
258 Bit5 : BIT5_OFF,
259 Bit6 : BIT6_OFF,
260 Bit7 : BIT7_OFF
261 };
262
263 /*! Port 3 Resistor Enable Register */
264 config GpioBits8PxRen_t P3REN = {
265 Bit0 : BIT0_OFF,
266 Bit1 : BIT1_OFF,
267 Bit2 : BIT2_OFF,
268 Bit3 : BIT3_OFF,
269 Bit4 : BIT4_OFF,
270 Bit5 : BIT5_OFF,
271 Bit6 : BIT6_OFF,
272 Bit7 : BIT7_OFF
273 };
274 }