1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    
    33    /*!
    34     *  ======== ITimer_A ========
    35     *  MSP430 ITimer_A interface
    36     */
    37    metaonly interface ITimer_A inherits ITimer {
    38    
    39        enum TASSEL_t {
    40            TASSEL_0 = (0*0x100u),              /*! TACLK */
    41            TASSEL_1 = (1*0x100u),              /*! ACLK  */
    42            TASSEL_2 = (2*0x100u),              /*! SMCLK */
    43            TASSEL_3 = 3*0x100u                 /*! INCLK */
    44        };
    45    
    46        enum TACLR_t {
    47            TACLR_OFF = (0x0000),               /* Timer A counter clear */
    48            TACLR = 0x0004                      /* Timer A counter clear */
    49        };
    50    
    51        enum TAIE_t {
    52            TAIE_OFF = (0x0000),                /* Timer A counter interrupt enable */
    53            TAIE     = 0x0002                   /* Timer A counter interrupt enable */
    54        };
    55    
    56        enum TAIFG_t {
    57            TAIFG_OFF = (0x000),                /* Timer A counter interrupt flag */
    58            TAIFG     = (0x0001)                /* Timer A counter interrupt flag */
    59        };
    60    
    61        enum MC_t {
    62            MC_0 = (0*0x10u),                   /*! Stop Mode */
    63            MC_1 = (1*0x10u),                   /*! Up Mode */
    64            MC_2 = (2*0x10u),                   /*! Continuous Mode */
    65            MC_3 = 3*0x10u                      /*! Up/Down Mode */
    66        };
    67    
    68        enum ID_t {
    69            ID_0 = (0*0x40u),                   /*! Divider - /1 */
    70            ID_1 = (1*0x40u),                   /*! Divider - /2 */
    71            ID_2 = (2*0x40u),                   /*! Divider - /4 */
    72            ID_3 = 3*0x40u                      /*! Divider - /8 */
    73        };
    74    
    75        enum CM_t {
    76            CM_0 = (0*0x4000u),                 /*! No Capture */
    77            CM_1 = (1*0x4000u),                 /*! Rising Edge */
    78            CM_2 = (2*0x4000u),                 /*! Falling Edge */
    79            CM_3 = 3*0x4000u                    /*! Both Edges */
    80        };
    81    
    82        enum CCIS_t {
    83            CCIS_0 = (0*0x1000u),               /*! CCIxA */
    84            CCIS_1 = (1*0x1000u),               /*! CCIxB */
    85            CCIS_2 = (2*0x1000u),               /*! GND */
    86            CCIS_3 = 3*0x1000u                  /*! Vcc */
    87        };
    88    
    89        enum SCS_t {
    90            SCS_OFF = (0x0000),                 /*! Asynchronous Capture */
    91            SCS = 0x0800                        /*! Sychronous Capture  */
    92        };
    93    
    94        enum SCCI_t {
    95            SCCI_OFF = (0x0000),                /*! Latched capture signal (read) */
    96            SCCI = 0x0400                       /*! Latched capture signal (read) */
    97        };
    98    
    99        enum CAP_t {
   100            CAP_OFF = (0x0000),                 /*! Compare mode */
   101            CAP = 0x0100                        /*! Capture mode */
   102        };
   103    
   104        enum CCIE_t {
   105            CCIE_OFF = (0x0000),                /* Capture/compare interrupt disable */
   106            CCIE = (0x0010)                     /* Capture/compare interrupt enable */
   107        };
   108    
   109        enum CCI_t {
   110            CCI_OFF = (0x0008),                 /* Capture input signal (read) */
   111            CCI = (0x0008)                      /* Capture input signal (read) */
   112        };
   113    
   114        enum OUT_t {
   115            OUT_OFF = (0x0000),                 /* PWM Output signal if output mode 0 */
   116            OUT = (0x0004)                      /* PWM Output signal if output mode 0 */
   117        };
   118    
   119        enum COV_t {
   120            COV_OFF = (0x0000),                 /* Capture/compare overflow flag */
   121            COV = (0x0002)                      /* Capture/compare overflow flag */
   122        };
   123    
   124        enum CCIFG_t {
   125            CCIFG_OFF = (0x0000),               /* Capture/compare interrupt flag */
   126            CCIFG = (0x0001)                    /* Capture/compare interrupt flag */
   127        };
   128    
   129        enum OUTMOD_t {
   130            OUTMOD_0 = (0*0x20u),               /*! PWM output mode: 0 - OUT bit value */
   131            OUTMOD_1 = (1*0x20u),               /*! PWM output mode: 1 - Set */
   132            OUTMOD_2 = (2*0x20u),               /*! PWM output mode: 2 - PWM toggle/reset */
   133            OUTMOD_3 = (3*0x20u),               /*! PWM output mode: 3 - PWM set/reset */
   134            OUTMOD_4 = (4*0x20u),               /*! PWM output mode: 4 - Toggle */
   135            OUTMOD_5 = (5*0x20u),               /*! PWM output mode: 5 - Reset */
   136            OUTMOD_6 = (6*0x20u),               /*! PWM output mode: 6 - PWM toggle/set */
   137            OUTMOD_7 = 7*0x20u                  /*! PWM output mode: 7 - PWM reset/set */
   138        };
   139    
   140        /*! TA3IV Definitions */
   141        enum IVValues {
   142            TAIV_NONE = 0x0000,                 /*! No Interrupt pending */
   143            TAIV_TACCR1 = 0x0002,               /*! TACCR1_CCIFG */
   144            TAIV_TACCR2 = 0x0004,               /*! TACCR2_CCIFG */
   145            TAIV_6 = 0x0006,                    /*! Reserved */
   146            TAIV_8 = 0x0008,                    /*! Reserved */
   147            TAIV_TAIFG = 0x000A                 /*! TAIFG */
   148        };
   149    
   150       /*!
   151        *  ======== TACTL_t ========
   152        *  Timer_A Control Register
   153        *
   154        *  @see #TACTL_t
   155        */
   156        struct TACTL_t {
   157            TASSEL_t    TASSEL;     /*! Timer_A clock source select
   158                                      *  00  TACLK
   159                                      *  01  ACLK
   160                                      *  10  SMCLK
   161                                      *  11  INCLK */
   162            ID_t        ID;         /*! Input divider. These bits select the divider for the input clock.
   163                                      *  00 /1
   164                                      *  01 /2
   165                                      *  10 /4
   166                                      *  11 /8 */
   167            MC_t        MC;         /*! Mode control. Setting MCx = 00h when Timer_A is not in use conserves
   168                                      * power.
   169                                      *  00  Stop mode: the timer is halted.
   170                                      *  01  Up mode: the timer counts up to TACCR0.
   171                                      *  10  Continuous mode: the timer counts up to 0FFFFh.
   172                                      *  11  Up/down mode: the timer counts up to TACCR0 then down to 0000h. */
   173            TACLR_t     TACLR;      /*! Timer_A clear. Setting this bit resets TAR, the clock divider, and the count
   174                                      * direction. The TACLR bit is automatically reset and is always read as zero. */
   175            TAIE_t      TAIE;       /*! Timer_A interrupt enable. This bit enables the TAIFG interrupt request.
   176                                      *  0  Interrupt disabled
   177                                      *  1  Interrupt enabled */
   178            TAIFG_t     TAIFG;      /*! Timer_A interrupt flag
   179                                      *  0  No interrupt pending
   180                                      *  1  Interrupt pending */
   181        }
   182    
   183       /*!
   184        *  ======== TACCTLx_t ========
   185        *  Capture/Compare Control Register
   186        *
   187        *  @see #TACCTLx_t
   188        */
   189        struct TACCTLx_t {
   190            CM_t       CM;          /*! Capture mode
   191                                      *  00 No capture
   192                                      *  01 Capture on rising edge
   193                                      *  10 Capture on falling edge
   194                                      *  11 Capture on both rising and falling edges */
   195            CCIS_t     CCIS;        /*! Capture/compare input select. These bits select the TACCRx input signal.
   196                                      * See the device-specific data sheet for specific signal connections.
   197                                      *  00  CCIxA
   198                                      *  01  CCIxB
   199                                      *  10  GND
   200                                      *  11  VCC */
   201            SCS_t      SCS;         /*! Synchronize capture source. This bit is used to synchronize the capture input
   202                                      * signal with the timer clock.
   203                                      *  0  Asynchronous capture
   204                                      *  1  Synchronous capture */
   205            SCCI_t     SCCI;        /*! Synchronized capture/compare input. The selected CCI input signal is
   206                                      * latched with the EQUx signal and can be read via this bit */
   207            CAP_t      CAP;         /*! Capture mode
   208                                      *  0  Compare mode
   209                                      *  1  Capture mode */
   210            OUTMOD_t   OUTMOD;      /*! Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because
   211                                      * EQUx = EQU0.
   212                                      *  000  OUT bit value
   213                                      *  001  Set
   214                                      *  010  Toggle/reset
   215                                      *  011  Set/reset
   216                                      *  100  Toggle
   217                                      *  101  Reset
   218                                      *  110  Toggle/set
   219                                      *  111  Reset/set */
   220            CCIE_t     CCIE;        /*! Capture/compare interrupt enable. This bit enables the interrupt request of
   221                                      * the corresponding CCIFG flag.
   222                                      *  0  Interrupt disabled
   223                                      *  1  Interrupt enabled */
   224            CCI_t      CCI;         /*! Capture/compare input. The selected input signal can be read by this bit. */
   225            OUT_t      OUT;         /*! Output. For output mode 0, this bit directly controls the state of the output.
   226                                      *  0   Output low
   227                                      *  1   Output high */
   228            COV_t      COV;         /*! Capture overflow. This bit indicates a capture overflow occurred. COV must
   229                                      *  be reset with software.
   230                                      *  0  No capture overflow occurred
   231                                      *  1  Capture overflow occurred */
   232            CCIFG_t    CCIFG;       /*! Capture/compare interrupt flag
   233                                      *  0  No interrupt pending
   234                                      *  1  Interrupt pending */
   235        }
   236    
   237    instance:
   238        /*! Timer_A TACLK */
   239        config float TACLK = 0;
   240    
   241        /*! Timer_A INCLK */
   242        config float INCLK = 0;
   243    }