1 /* 2 * Copyright (c) 2016, Texas Instruments Incorporated 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * * Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * * Neither the name of Texas Instruments Incorporated nor the names of 17 * its contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*! 34 * ======== IEUSCI ======== 35 * Enhanced Universal Serial Communication Interface 36 */ 37 metaonly interface IEUSCI inherits xdc.platform.IPeripheral { 38 39 /*! 40 * ======== regIntVect_t ======== 41 * Interrupt vector description 42 * 43 * Type to describe a single interrupt vector pin and all its possible 44 * configurations. 45 * 46 * @see #regIntVect_t 47 */ 48 struct regIntVect_t { 49 String registerName; 50 String registerDescription; 51 String isrToggleString; 52 String priorityName; 53 Bool interruptEnable; 54 Bool interruptHandler; 55 Int priority; 56 } 57 58 /*! 59 * ======== ForceSetDefaultRegister_t ======== 60 * Force Set Default Register 61 * 62 * Type to store if each register needs to be forced initialized 63 * even if the register is in default state. 64 * 65 * @see #ForceSetDefaultRegister_t 66 */ 67 struct ForceSetDefaultRegister_t { 68 String register; 69 Bool regForceSet; 70 } 71 72 instance: 73 74 }