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32
33 /*!
34 * ======== IGPIO ========
35 * MSP430 General Purpose Input Output Ports
36 */
37 metaonly interface IGPIO inherits xdc.platform.IPeripheral {
38
39 /*! Pull-up/down resistor enables drop down list */
40 enum ResEnable_t {
41 PUDRE_OFF = 0x00u, /*! Disabled */
42 PUDRE_UP = 0x01u, /*! Pull-Up Resistor */
43 PUDRE_DOWN = 0x02u /*! Pull-Down Resistor */
44 }
45
46 /*! Interrupt enables drop down list */
47 enum InterruptEnable_t {
48 IE_OFF = 0x00u, /*! Disabled */
49 IE_FALLING = 0x01u, /*! Interrupt Enabled Falling Edge */
50 IE_RISING = 0x02u /*! Interrupt Enabled Rising Edge */
51 }
52
53 /*! Output high or low drop down list */
54 enum OutputState_t {
55 OUTSTATE_LOW = 0x00u, /*! Output Set Low (Default) */
56 OUTSTATE_HIGH = 0x01u /*! Output Set High */
57 }
58
59 /*! GPIO Bit 0 Definitions */
60 enum Bit0_t {
61 BIT0_OFF = 0x00u,
62 BIT0 = 0x01u
63 };
64
65 enum Bit1_t {
66 BIT1_OFF = 0x00u,
67 BIT1 = 0x02u
68 };
69
70 enum Bit2_t {
71 BIT2_OFF = 0x00u,
72 BIT2 = 0x04u
73 };
74
75 enum Bit3_t {
76 BIT3_OFF = 0x00u,
77 BIT3 = 0x08u
78 };
79
80 enum Bit4_t {
81 BIT4_OFF = 0x00u,
82 BIT4 = 0x10u
83 };
84
85 enum Bit5_t {
86 BIT5_OFF = 0x00u,
87 BIT5 = 0x20u
88 };
89
90 enum Bit6_t {
91 BIT6_OFF = 0x00u,
92 BIT6 = 0x20u
93 };
94
95 enum Bit7_t {
96 BIT7_OFF = 0x00u,
97 BIT7 = 0x80u
98 };
99
100 /*!
101 * ======== GpioBits8_t ========
102 * Generic GPIO 8-bit Register
103 *
104 * @see #GpioBits8_t
105 */
106 struct GpioBits8PxIn_t {
107 Bit0_t Bit0; /*! GPIO Input Signal Bit 0 */
108 Bit1_t Bit1; /*! GPIO Input Signal Bit 1 */
109 Bit2_t Bit2; /*! GPIO Input Signal Bit 2 */
110 Bit3_t Bit3; /*! GPIO Input Signal Bit 3 */
111 Bit4_t Bit4; /*! GPIO Input Signal Bit 4 */
112 Bit5_t Bit5; /*! GPIO Input Signal Bit 5 */
113 Bit6_t Bit6; /*! GPIO Input Signal Bit 6 */
114 Bit7_t Bit7; /*! GPIO Input Signal Bit 7 */
115 }
116
117 /*!
118 * ======== GpioBits8PxOut_t ========
119 * Generic GPIO 8-bit PxOUT Register
120 *
121 * @see #GpioBits8PxOut_t
122 */
123 struct GpioBits8PxOut_t {
124 Bit0_t Bit0; /*! GPIO Output Signal Bit 0 */
125 Bit1_t Bit1; /*! GPIO Output Signal Bit 1 */
126 Bit2_t Bit2; /*! GPIO Output Signal Bit 2 */
127 Bit3_t Bit3; /*! GPIO Output Signal Bit 3 */
128 Bit4_t Bit4; /*! GPIO Output Signal Bit 4 */
129 Bit5_t Bit5; /*! GPIO Output Signal Bit 5 */
130 Bit6_t Bit6; /*! GPIO Output Signal Bit 6 */
131 Bit7_t Bit7; /*! GPIO Output Signal Bit 7 */
132 }
133
134 /*!
135 * ======== GpioBits8PxDir_t ========
136 * Generic GPIO 8-bit PxDIR Register
137 *
138 * @see #GpioBits8PxDir_t
139 */
140 struct GpioBits8PxDir_t {
141 Bit0_t Bit0; /*! GPIO Select Direction Bit 0
142 * Bit = 0: The port pin is switched to input direction
143 * Bit = 1: The port pin is switched to output direction */
144 Bit1_t Bit1; /*! GPIO Select Direction Bit 1
145 * Bit = 0: The port pin is switched to input direction
146 * Bit = 1: The port pin is switched to output direction */
147 Bit2_t Bit2; /*! GPIO Select Direction Bit 2
148 * Bit = 0: The port pin is switched to input direction
149 * Bit = 1: The port pin is switched to output direction */
150 Bit3_t Bit3; /*! GPIO Select Direction Bit 3
151 * Bit = 0: The port pin is switched to input direction
152 * Bit = 1: The port pin is switched to output direction */
153 Bit4_t Bit4; /*! GPIO Select Direction Bit 4
154 * Bit = 0: The port pin is switched to input direction
155 * Bit = 1: The port pin is switched to output direction */
156 Bit5_t Bit5; /*! GPIO Select Direction Bit 5
157 * Bit = 0: The port pin is switched to input direction
158 * Bit = 1: The port pin is switched to output direction */
159 Bit6_t Bit6; /*! GPIO Select Direction Bit 6
160 * Bit = 0: The port pin is switched to input direction
161 * Bit = 1: The port pin is switched to output direction */
162 Bit7_t Bit7; /*! GPIO Select Direction Bit 7
163 * Bit = 0: The port pin is switched to input direction
164 * Bit = 1: The port pin is switched to output direction */
165 }
166
167 /*!
168 * ======== GpioBits8PxRen_t ========
169 * Generic GPIO 8-bit PxREN Register
170 *
171 * @see #GpioBits8PxRen_t
172 */
173 struct GpioBits8PxRen_t {
174 Bit0_t Bit0; /*! GPIO Enables or Disables Pullup/Pulldown Bit 0
175 * Bit = 0: Pullup/pulldown resistor disabled
176 * Bit = 1: Pullup/pulldown resistor enabled
177 * Set Pullup/down via PxOUT 0 = Down; 1 = Up */
178 Bit1_t Bit1; /*! GPIO Enables or Disables Pullup/Pulldown Bit 1
179 * Bit = 0: Pullup/pulldown resistor disabled
180 * Bit = 1: Pullup/pulldown resistor enabled
181 * Set Pullup/down via PxOUT 0 = Down; 1 = Up */
182 Bit2_t Bit2; /*! GPIO Enables or Disables Pullup/Pulldown Bit 2
183 * Bit = 0: Pullup/pulldown resistor disabled
184 * Bit = 1: Pullup/pulldown resistor enabled
185 * Set Pullup/down via PxOUT 0 = Down; 1 = Up */
186 Bit3_t Bit3; /*! GPIO Enables or Disables Pullup/Pulldown Bit 3
187 * Bit = 0: Pullup/pulldown resistor disabled
188 * Bit = 1: Pullup/pulldown resistor enabled
189 * Set Pullup/down via PxOUT 0 = Down; 1 = Up */
190 Bit4_t Bit4; /*! GPIO Enables or Disables Pullup/Pulldown Bit 4
191 * Bit = 0: Pullup/pulldown resistor disabled
192 * Bit = 1: Pullup/pulldown resistor enabled
193 * Set Pullup/down via PxOUT 0 = Down; 1 = Up */
194 Bit5_t Bit5; /*! GPIO Enables or Disables Pullup/Pulldown Bit 5
195 * Bit = 0: Pullup/pulldown resistor disabled
196 * Bit = 1: Pullup/pulldown resistor enabled
197 * Set Pullup/down via PxOUT 0 = Down; 1 = Up */
198 Bit6_t Bit6; /*! GPIO Enables or Disables Pullup/Pulldown Bit 6
199 * Bit = 0: Pullup/pulldown resistor disabled
200 * Bit = 1: Pullup/pulldown resistor enabled
201 * Set Pullup/down via PxOUT 0 = Down; 1 = Up */
202 Bit7_t Bit7; /*! GPIO Enables or Disables Pullup/Pulldown Bit 7
203 * Bit = 0: Pullup/pulldown resistor disabled
204 * Bit = 1: Pullup/pulldown resistor enabled
205 * Set Pullup/down via PxOUT 0 = Down; 1 = Up */
206 }
207
208 /*!
209 * ======== GpioBits8PxSel_t ========
210 * Generic GPIO 8-bit PxSEL Register
211 *
212 * @see #GpioBits8PxSel_t
213 */
214 struct GpioBits8PxSel_t {
215 Bit0_t Bit0; /*! GPIO Select Pin Function Bit 0
216 *See the device-specific data sheet to determine pin functions. */
217 Bit1_t Bit1; /*! GPIO Select Pin Function Bit 1
218 *See the device-specific data sheet to determine pin functions. */
219 Bit2_t Bit2; /*! GPIO Select Pin Function Bit 2
220 *See the device-specific data sheet to determine pin functions. */
221 Bit3_t Bit3; /*! GPIO Select Pin Function Bit 3
222 *See the device-specific data sheet to determine pin functions. */
223 Bit4_t Bit4; /*! GPIO Select Pin Function Bit 4
224 *See the device-specific data sheet to determine pin functions. */
225 Bit5_t Bit5; /*! GPIO Select Pin Function Bit 5
226 *See the device-specific data sheet to determine pin functions. */
227 Bit6_t Bit6; /*! GPIO Select Pin Function Bit 6
228 *See the device-specific data sheet to determine pin functions. */
229 Bit7_t Bit7; /*! GPIO Select Pin Function Bit 7
230 *See the device-specific data sheet to determine pin functions. */
231 }
232
233 /*!
234 * ======== GpioBits8PxSel2_t ========
235 * Generic GPIO 8-bit PxSEL2 Register
236 *
237 * @see #GpioBits8PxSel2_t
238 */
239 struct GpioBits8PxSel2_t {
240 Bit0_t Bit0; /*! GPIO Select Pin Function Bit 0
241 *See the device-specific data sheet to determine pin functions. */
242 Bit1_t Bit1; /*! GPIO Select Pin Function Bit 1
243 *See the device-specific data sheet to determine pin functions. */
244 Bit2_t Bit2; /*! GPIO Select Pin Function Bit 2
245 *See the device-specific data sheet to determine pin functions. */
246 Bit3_t Bit3; /*! GPIO Select Pin Function Bit 3
247 *See the device-specific data sheet to determine pin functions. */
248 Bit4_t Bit4; /*! GPIO Select Pin Function Bit 4
249 *See the device-specific data sheet to determine pin functions. */
250 Bit5_t Bit5; /*! GPIO Select Pin Function Bit 5
251 *See the device-specific data sheet to determine pin functions. */
252 Bit6_t Bit6; /*! GPIO Select Pin Function Bit 6
253 *See the device-specific data sheet to determine pin functions. */
254 Bit7_t Bit7; /*! GPIO Select Pin Function Bit 7
255 *See the device-specific data sheet to determine pin functions. */
256 }
257
258 /*!
259 * ======== GpioBits8PxIe_t ========
260 * Generic GPIO 8-bit PxIE Register
261 *
262 * @see #GpioBits8PxIe_t
263 */
264 struct GpioBits8PxIe_t {
265 Bit0_t Bit0; /*! GPIO Interrupt Enable Bit 0
266 * Bit = 0: The interrupt is disabled.
267 * Bit = 1: The interrupt is enabled. */
268 Bit1_t Bit1; /*! GPIO Interrupt Enable Bit 1
269 * Bit = 0: The interrupt is disabled.
270 * Bit = 1: The interrupt is enabled. */
271 Bit2_t Bit2; /*! GPIO Interrupt Enable Bit 2
272 * Bit = 0: The interrupt is disabled.
273 * Bit = 1: The interrupt is enabled. */
274 Bit3_t Bit3; /*! GPIO Interrupt Enable Bit 3
275 * Bit = 0: The interrupt is disabled.
276 * Bit = 1: The interrupt is enabled. */
277 Bit4_t Bit4; /*! GPIO Interrupt Enable Bit 4
278 * Bit = 0: The interrupt is disabled.
279 * Bit = 1: The interrupt is enabled. */
280 Bit5_t Bit5; /*! GPIO Interrupt Enable Bit 5
281 * Bit = 0: The interrupt is disabled.
282 * Bit = 1: The interrupt is enabled. */
283 Bit6_t Bit6; /*! GPIO Interrupt Enable Bit 6
284 * Bit = 0: The interrupt is disabled.
285 * Bit = 1: The interrupt is enabled. */
286 Bit7_t Bit7; /*! GPIO Interrupt Enable Bit 7
287 * Bit = 0: The interrupt is disabled.
288 * Bit = 1: The interrupt is enabled. */
289 }
290
291 /*!
292 * ======== GpioBits8PxIes_t ========
293 * Generic GPIO 8-bit PxIES Register
294 *
295 * @see #GpioBits8PxIes_t
296 */
297 struct GpioBits8PxIes_t {
298 Bit0_t Bit0; /*! GPIO Select Interrupt Edge Bit 0
299 * Bit = 0: The PxIFGx flag is set with a low-to-high transition
300 * Bit = 1: The PxIFGx flag is set with a high-to-low transition */
301 Bit1_t Bit1; /*! GPIO Select Interrupt Edge Bit 1
302 * Bit = 0: The PxIFGx flag is set with a low-to-high transition
303 * Bit = 1: The PxIFGx flag is set with a high-to-low transition */
304 Bit2_t Bit2; /*! GPIO Select Interrupt Edge Bit 2
305 * Bit = 0: The PxIFGx flag is set with a low-to-high transition
306 * Bit = 1: The PxIFGx flag is set with a high-to-low transition */
307 Bit3_t Bit3; /*! GPIO Select Interrupt Edge Bit 3
308 * Bit = 0: The PxIFGx flag is set with a low-to-high transition
309 * Bit = 1: The PxIFGx flag is set with a high-to-low transition */
310 Bit4_t Bit4; /*! GPIO Select Interrupt Edge Bit 4
311 * Bit = 0: The PxIFGx flag is set with a low-to-high transition
312 * Bit = 1: The PxIFGx flag is set with a high-to-low transition */
313 Bit5_t Bit5; /*! GPIO Select Interrupt Edge Bit 5
314 * Bit = 0: The PxIFGx flag is set with a low-to-high transition
315 * Bit = 1: The PxIFGx flag is set with a high-to-low transition */
316 Bit6_t Bit6; /*! GPIO Select Interrupt Edge Bit 6
317 * Bit = 0: The PxIFGx flag is set with a low-to-high transition
318 * Bit = 1: The PxIFGx flag is set with a high-to-low transition */
319 Bit7_t Bit7; /*! GPIO Select Interrupt Edge Bit 7
320 * Bit = 0: The PxIFGx flag is set with a low-to-high transition
321 * Bit = 1: The PxIFGx flag is set with a high-to-low transition */
322 }
323
324 /*!
325 * ======== GpioBits8PxIfg_t ========
326 * Generic GPIO 8-bit PxIFG Register
327 *
328 * @see #GpioBits8PxIfg_t
329 */
330 struct GpioBits8PxIfg_t {
331 Bit0_t Bit0; /*! GPIO Interrupt Flag Bit 0
332 * Bit = 0: No interrupt is pending
333 * Bit = 1: An interrupt is pending */
334 Bit1_t Bit1; /*! GPIO Interrupt Flag Bit 1
335 * Bit = 0: No interrupt is pending
336 * Bit = 1: An interrupt is pending */
337 Bit2_t Bit2; /*! GPIO Interrupt Flag Bit 2
338 * Bit = 0: No interrupt is pending
339 * Bit = 1: An interrupt is pending */
340 Bit3_t Bit3; /*! GPIO Interrupt Flag Bit 3
341 * Bit = 0: No interrupt is pending
342 * Bit = 1: An interrupt is pending */
343 Bit4_t Bit4; /*! GPIO Interrupt Flag Bit 4
344 * Bit = 0: No interrupt is pending
345 * Bit = 1: An interrupt is pending */
346 Bit5_t Bit5; /*! GPIO Interrupt Flag Bit 5
347 * Bit = 0: No interrupt is pending
348 * Bit = 1: An interrupt is pending */
349 Bit6_t Bit6; /*! GPIO Interrupt Flag Bit 6
350 * Bit = 0: No interrupt is pending
351 * Bit = 1: An interrupt is pending */
352 Bit7_t Bit7; /*! GPIO Interrupt Flag Bit 7
353 * Bit = 0: No interrupt is pending
354 * Bit = 1: An interrupt is pending */
355 }
356
357 /*!
358 * ======== DeviceRegisterConfig_t ========
359 * Device Register Configuration Descriptor
360 *
361 * Type to describe how a register is configured for a particular
362 * use. The type allows setting and clearing of an arbitrary bit
363 * pattern inside the specified register.
364 *
365 * @see #DeviceRegisterConfig_t
366 */
367 struct DeviceRegisterConfig_t {
368 String register;
369 UInt bitSetMask;
370 UInt bitClearMask;
371 }
372
373 /*!
374 * ======== DevicePinFunction_t ========
375 * Device Pin Functional Descriptor
376 *
377 * Type to describe how a device pin is configured for all its
378 * different uses that are possible. The function names are consolidated
379 * in one String array rather than located together with the function-
380 * specific data to allow easier access by Grace widgets. The functionConfig
381 * member contains an arbitrary-length array describing all register
382 * settings that need to be performed to configure a certain function.
383 *
384 * @see #DevicePinFunction_t
385 */
386 struct DevicePinFunction_t {
387 String functionName[];
388 DeviceRegisterConfig_t functionConfig[][];
389 }
390
391 /*!
392 * ======== DevicePin_t ========
393 * Device Pin Descriptor
394 *
395 * Type to describe a single device pin and all its possible
396 * configurations.
397 *
398 * @see #DevicePin_t
399 */
400 struct DevicePin_t {
401 String pinName;
402 DevicePinFunction_t pinFunction;
403 }
404
405 /*!
406 * ======== MatchedPortFunction_t ========
407 * Port Function Enumeration Type
408 *
409 * This type is used to store a list of applicable pins based on the
410 * search criteria when using the function findPinsForFunction().
411 *
412 * @see #MatchedPortFunction_t
413 */
414 struct MatchedPortFunction_t {
415 UInt port[];
416 UInt pin[];
417 String pinName[];
418 UInt functionIndex[];
419 String functionName[];
420 }
421
422 /*!
423 * ======== DevicePinFunctionSetting_t ========
424 * Device Pin Functional Setting Descriptor
425 *
426 * Type to store the selected pin configuration and a reference
427 * to the object that last modified the configuration.
428 *
429 * @see #DevicePinFunctionSetting_t
430 */
431 struct DevicePinFunctionSetting_t {
432 UInt functionIndex; /*! Device Pin Functional Selection */
433 Any owner; /*! Current Device Pin Owner */
434 ResEnable_t resistorEnable; /*! Pull-up/down Resistor Enable Selection */
435 OutputState_t outputDirState; /*! Output Direction State Selection */
436 InterruptEnable_t interruptEnable; /*! Interrupt Enable State Selection */
437 Bool outputDirStateEnabled;/*! Enable state for output direction state selection */
438 Bool inputDirStateEnabled;/*! Enable state for input direction state selection */
439 }
440
441 /*!
442 * ======== ForceSetDefaultRegister_t ========
443 * Force Set Default Register
444 *
445 * Type to store if each register needs to be forced initialized
446 * even if the register is in default state.
447 *
448 * @see #ForceSetDefaultRegister_t
449 */
450 struct ForceSetDefaultRegister_t {
451 String register;
452 Bool regForceSet;
453 }
454
455 /*!
456 * ======== regIntVect_t ========
457 * Interrupt vector description
458 *
459 * Type to describe a single interrupt vector pin and all its possible
460 * configurations.
461 *
462 * @see #regIntVect_t
463 */
464 struct regIntVect_t {
465 String registerName;
466 String registerDescription;
467 String isrToggleString;
468 String priorityName;
469 Bool interruptEnable;
470 Bool interruptHandler;
471 Int priority;
472 }
473
474 instance:
475 /*! Port 1 Interrupt Edge Select Register */
476 config GpioBits8PxIes_t P1IES = {
477 Bit0 : BIT0_OFF,
478 Bit1 : BIT1_OFF,
479 Bit2 : BIT2_OFF,
480 Bit3 : BIT3_OFF,
481 Bit4 : BIT4_OFF,
482 Bit5 : BIT5_OFF,
483 Bit6 : BIT6_OFF,
484 Bit7 : BIT7_OFF
485 };
486
487 /*! Port 1 Interrupt Flag Register */
488 config GpioBits8PxIfg_t P1IFG = {
489 Bit0 : BIT0_OFF,
490 Bit1 : BIT1_OFF,
491 Bit2 : BIT2_OFF,
492 Bit3 : BIT3_OFF,
493 Bit4 : BIT4_OFF,
494 Bit5 : BIT5_OFF,
495 Bit6 : BIT6_OFF,
496 Bit7 : BIT7_OFF
497 };
498
499 /*! Port 1 Interrupt Enable Register */
500 config GpioBits8PxIe_t P1IE = {
501 Bit0 : BIT0_OFF,
502 Bit1 : BIT1_OFF,
503 Bit2 : BIT2_OFF,
504 Bit3 : BIT3_OFF,
505 Bit4 : BIT4_OFF,
506 Bit5 : BIT5_OFF,
507 Bit6 : BIT6_OFF,
508 Bit7 : BIT7_OFF
509 };
510
511 /*! Port 2 Interrupt Edge Select Register */
512 config GpioBits8PxIes_t P2IES = {
513 Bit0 : BIT0_OFF,
514 Bit1 : BIT1_OFF,
515 Bit2 : BIT2_OFF,
516 Bit3 : BIT3_OFF,
517 Bit4 : BIT4_OFF,
518 Bit5 : BIT5_OFF,
519 Bit6 : BIT6_OFF,
520 Bit7 : BIT7_OFF
521 };
522
523 /*! Port 2 Interrupt Flag Register */
524 config GpioBits8PxIfg_t P2IFG = {
525 Bit0 : BIT0_OFF,
526 Bit1 : BIT1_OFF,
527 Bit2 : BIT2_OFF,
528 Bit3 : BIT3_OFF,
529 Bit4 : BIT4_OFF,
530 Bit5 : BIT5_OFF,
531 Bit6 : BIT6_OFF,
532 Bit7 : BIT7_OFF
533 };
534
535 /*! Port 2 Interrupt Enable Register */
536 config GpioBits8PxIe_t P2IE = {
537 Bit0 : BIT0_OFF,
538 Bit1 : BIT1_OFF,
539 Bit2 : BIT2_OFF,
540 Bit3 : BIT3_OFF,
541 Bit4 : BIT4_OFF,
542 Bit5 : BIT5_OFF,
543 Bit6 : BIT6_OFF,
544 Bit7 : BIT7_OFF
545 };
546
547 /*! Port 3 Interrupt Edge Select Register */
548 config GpioBits8PxIes_t P3IES = {
549 Bit0 : BIT0_OFF,
550 Bit1 : BIT1_OFF,
551 Bit2 : BIT2_OFF,
552 Bit3 : BIT3_OFF,
553 Bit4 : BIT4_OFF,
554 Bit5 : BIT5_OFF,
555 Bit6 : BIT6_OFF,
556 Bit7 : BIT7_OFF
557 };
558
559 /*! Port 3 Interrupt Flag Register */
560 config GpioBits8PxIfg_t P3IFG = {
561 Bit0 : BIT0_OFF,
562 Bit1 : BIT1_OFF,
563 Bit2 : BIT2_OFF,
564 Bit3 : BIT3_OFF,
565 Bit4 : BIT4_OFF,
566 Bit5 : BIT5_OFF,
567 Bit6 : BIT6_OFF,
568 Bit7 : BIT7_OFF
569 };
570
571 /*! Port 3 Interrupt Enable Register */
572 config GpioBits8PxIe_t P3IE = {
573 Bit0 : BIT0_OFF,
574 Bit1 : BIT1_OFF,
575 Bit2 : BIT2_OFF,
576 Bit3 : BIT3_OFF,
577 Bit4 : BIT4_OFF,
578 Bit5 : BIT5_OFF,
579 Bit6 : BIT6_OFF,
580 Bit7 : BIT7_OFF
581 };
582
583 /*! Port 4 Interrupt Edge Select Register */
584 config GpioBits8PxIes_t P4IES = {
585 Bit0 : BIT0_OFF,
586 Bit1 : BIT1_OFF,
587 Bit2 : BIT2_OFF,
588 Bit3 : BIT3_OFF,
589 Bit4 : BIT4_OFF,
590 Bit5 : BIT5_OFF,
591 Bit6 : BIT6_OFF,
592 Bit7 : BIT7_OFF
593 };
594
595 /*! Port 4 Interrupt Flag Register */
596 config GpioBits8PxIfg_t P4IFG = {
597 Bit0 : BIT0_OFF,
598 Bit1 : BIT1_OFF,
599 Bit2 : BIT2_OFF,
600 Bit3 : BIT3_OFF,
601 Bit4 : BIT4_OFF,
602 Bit5 : BIT5_OFF,
603 Bit6 : BIT6_OFF,
604 Bit7 : BIT7_OFF
605 };
606
607 /*! Port 4 Interrupt Enable Register */
608 config GpioBits8PxIe_t P4IE = {
609 Bit0 : BIT0_OFF,
610 Bit1 : BIT1_OFF,
611 Bit2 : BIT2_OFF,
612 Bit3 : BIT3_OFF,
613 Bit4 : BIT4_OFF,
614 Bit5 : BIT5_OFF,
615 Bit6 : BIT6_OFF,
616 Bit7 : BIT7_OFF
617 };
618
619 /*! GPIO interrupt source */
620 config regIntVect_t interruptSource[32];
621
622 /*! Forward Declaration of Device Pin Functional Configuration */
623 config DevicePinFunctionSetting_t devicePinSetting[][];
624
625 /*!
626 * ======== findPinsForFunction ========
627 * Identify all device pins that can be used to serve a certain purpose
628 *
629 * Function to scan through the pin configuration database to identify
630 * a list of device pins matching a regular expression.
631 */
632 MatchedPortFunction_t findPinsForFunction(String regExp);
633
634 /*!
635 * ======== pinFunctionIsActive ========
636 * Check if a pin is enabled for a certain function
637 *
638 * This function is used to check if a certain functionality is enabled
639 * on a given device pins (returns 'true' in that case).
640 */
641 Bool pinFunctionIsActive(UInt port, UInt pin, String regExp);
642
643 /*!
644 * ======== getPinFunctionIndex ========
645 * Get a pin's current functional configuration
646 *
647 * This function is used to obtain the current configuration of a given
648 * device pin. The returned value can be used as an index to obtain further
649 * information from the pin configuration database.
650 */
651 UInt getPinFunctionIndex(UInt port, UInt pin);
652
653 /*!
654 * ======== getPinOwner ========
655 * This function returns the current owner of the specified device pin.
656 */
657 Any getPinOwner(UInt port, UInt pin);
658
659 /*!
660 * ======== setPinFunctionUsingIndex ========
661 * Configure a device pin to a specific peripheral function
662 *
663 * This function is used to configure a device pin to a specific peripheral
664 * function that is identified by an index. The index corresponds to an
665 * associated set of configuration parameters stored in the pin configuration
666 * database. The owner parameter can be used to protect a pin from being
667 * used by somebody else. A pin configuration can only be changed if the
668 * current owner is undefined, or of the current owner matches the
669 * owner specified as function parameter.
670 */
671 Void setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner);
672
673 /*!
674 * ======== setDefaultPinFunction ========
675 * Configure a device pin to its default state
676 *
677 * This function is used to configure a device pin to its default state
678 * and is typically used when a peripheral module relinquishes ownership
679 * of a pin so that it can be used by other peripheral modules.
680 */
681 Void setDefaultPinFunction(UInt port, UInt pin, Any owner);
682 }