1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
32
33 import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
34
35 /*!
36 * ======== GPIO for MSP430G2x13 ========
37 * MSP430 General Purpose Input Output Ports
38 */
39 metaonly module GPIO_MSP430G2x13 inherits IGPIO {
40 /*!
41 * ======== create ========
42 * Create an instance of this peripheral. Use a customized
43 * init function so that we can get access to the Comparator
44 * instance.
45 */
46 create(Comparator.Instance comparator);
47
48 instance:
49 /*! @_nodoc */
50 config Comparator.Instance comparator;
51
52 /*! Define an array to describe all device pins. The 1st dimension
53 * denotes the port, the second the pin on that port. On an
54 * MSP430G2x13 device, there are 3 x 8 = 24 pins total.
55 */
56
57 58
59 60
61 config DevicePin_t devicePins[3][8];
62
63 /*! Implementation of Device Pin Functional Configuration */
64 override config DevicePinFunctionSetting_t devicePinSetting[3][8];
65
66 /*! Determine if each Register needs to be forced set or not */
67 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
68 [
69 { register : "P1OUT" , regForceSet : true },
70 { register : "P1SEL" , regForceSet : false },
71 { register : "P1SEL2", regForceSet : false },
72 { register : "P1DIR" , regForceSet : true },
73 { register : "P1REN" , regForceSet : false },
74 { register : "P1IES" , regForceSet : true },
75 { register : "P1IFG" , regForceSet : true },
76 { register : "P1IE" , regForceSet : false },
77 { register : "P2OUT" , regForceSet : true },
78 { register : "P2SEL" , regForceSet : false },
79 { register : "P2SEL2", regForceSet : false },
80 { register : "P2DIR" , regForceSet : true },
81 { register : "P2REN" , regForceSet : false },
82 { register : "P2IES" , regForceSet : true },
83 { register : "P2IFG" , regForceSet : true },
84 { register : "P2IE" , regForceSet : false },
85 { register : "P3OUT" , regForceSet : true },
86 { register : "P3SEL" , regForceSet : false },
87 { register : "P3SEL2", regForceSet : false },
88 { register : "P3DIR" , regForceSet : true },
89 { register : "P3REN" , regForceSet : false },
90 ];
91
92 93 94 95 96 97
98
99 /*! Port 1 Output Register */
100 config GpioBits8PxOut_t P1OUT = {
101 Bit0 : BIT0_OFF,
102 Bit1 : BIT1_OFF,
103 Bit2 : BIT2_OFF,
104 Bit3 : BIT3_OFF,
105 Bit4 : BIT4_OFF,
106 Bit5 : BIT5_OFF,
107 Bit6 : BIT6_OFF,
108 Bit7 : BIT7_OFF
109 };
110
111 /*! Port 1 Port Select Register */
112 config GpioBits8PxSel_t P1SEL = {
113 Bit0 : BIT0_OFF,
114 Bit1 : BIT1_OFF,
115 Bit2 : BIT2_OFF,
116 Bit3 : BIT3_OFF,
117 Bit4 : BIT4_OFF,
118 Bit5 : BIT5_OFF,
119 Bit6 : BIT6_OFF,
120 Bit7 : BIT7_OFF
121 };
122
123 /*! Port 1 Port Select 2 Register */
124 config GpioBits8PxSel_t P1SEL2 = {
125 Bit0 : BIT0_OFF,
126 Bit1 : BIT1_OFF,
127 Bit2 : BIT2_OFF,
128 Bit3 : BIT3_OFF,
129 Bit4 : BIT4_OFF,
130 Bit5 : BIT5_OFF,
131 Bit6 : BIT6_OFF,
132 Bit7 : BIT7_OFF
133 };
134
135 /*! Port 1 Direction Register */
136 config GpioBits8PxDir_t P1DIR = {
137 Bit0 : BIT0_OFF,
138 Bit1 : BIT1_OFF,
139 Bit2 : BIT2_OFF,
140 Bit3 : BIT3_OFF,
141 Bit4 : BIT4_OFF,
142 Bit5 : BIT5_OFF,
143 Bit6 : BIT6_OFF,
144 Bit7 : BIT7_OFF
145 };
146
147 /*! Port 1 Resistor Enable Register */
148 config GpioBits8PxRen_t P1REN = {
149 Bit0 : BIT0_OFF,
150 Bit1 : BIT1_OFF,
151 Bit2 : BIT2_OFF,
152 Bit3 : BIT3_OFF,
153 Bit4 : BIT4_OFF,
154 Bit5 : BIT5_OFF,
155 Bit6 : BIT6_OFF,
156 Bit7 : BIT7_OFF
157 };
158
159 /*! Port 2 Output Register */
160 config GpioBits8PxOut_t P2OUT = {
161 Bit0 : BIT0_OFF,
162 Bit1 : BIT1_OFF,
163 Bit2 : BIT2_OFF,
164 Bit3 : BIT3_OFF,
165 Bit4 : BIT4_OFF,
166 Bit5 : BIT5_OFF,
167 Bit6 : BIT6_OFF,
168 Bit7 : BIT7_OFF
169 };
170
171 /*! Port 2 Port Select Register */
172 config GpioBits8PxSel_t P2SEL = {
173 Bit0 : BIT0_OFF,
174 Bit1 : BIT1_OFF,
175 Bit2 : BIT2_OFF,
176 Bit3 : BIT3_OFF,
177 Bit4 : BIT4_OFF,
178 Bit5 : BIT5_OFF,
179 Bit6 : BIT6,
180 Bit7 : BIT7
181 };
182
183 /*! Port 2 Port Select 2 Register */
184 config GpioBits8PxSel2_t P2SEL2 = {
185 Bit0 : BIT0_OFF,
186 Bit1 : BIT1_OFF,
187 Bit2 : BIT2_OFF,
188 Bit3 : BIT3_OFF,
189 Bit4 : BIT4_OFF,
190 Bit5 : BIT5_OFF,
191 Bit6 : BIT6_OFF,
192 Bit7 : BIT7_OFF
193 };
194
195 /*! Port 2 Direction Register */
196 config GpioBits8PxDir_t P2DIR = {
197 Bit0 : BIT0_OFF,
198 Bit1 : BIT1_OFF,
199 Bit2 : BIT2_OFF,
200 Bit3 : BIT3_OFF,
201 Bit4 : BIT4_OFF,
202 Bit5 : BIT5_OFF,
203 Bit6 : BIT6_OFF,
204 Bit7 : BIT7_OFF
205 };
206
207 /*! Port 2 Resistor Enable Register */
208 config GpioBits8PxRen_t P2REN = {
209 Bit0 : BIT0_OFF,
210 Bit1 : BIT1_OFF,
211 Bit2 : BIT2_OFF,
212 Bit3 : BIT3_OFF,
213 Bit4 : BIT4_OFF,
214 Bit5 : BIT5_OFF,
215 Bit6 : BIT6_OFF,
216 Bit7 : BIT7_OFF
217 };
218
219 /*! Port 3 Output Register */
220 config GpioBits8PxOut_t P3OUT = {
221 Bit0 : BIT0_OFF,
222 Bit1 : BIT1_OFF,
223 Bit2 : BIT2_OFF,
224 Bit3 : BIT3_OFF,
225 Bit4 : BIT4_OFF,
226 Bit5 : BIT5_OFF,
227 Bit6 : BIT6_OFF,
228 Bit7 : BIT7_OFF
229 };
230
231 /*! Port 3 Port Select Register */
232 config GpioBits8PxSel_t P3SEL = {
233 Bit0 : BIT0_OFF,
234 Bit1 : BIT1_OFF,
235 Bit2 : BIT2_OFF,
236 Bit3 : BIT3_OFF,
237 Bit4 : BIT4_OFF,
238 Bit5 : BIT5_OFF,
239 Bit6 : BIT6_OFF,
240 Bit7 : BIT7_OFF
241 };
242
243 /*! Port 3 Port Select 2 Register */
244 config GpioBits8PxSel2_t P3SEL2 = {
245 Bit0 : BIT0_OFF,
246 Bit1 : BIT1_OFF,
247 Bit2 : BIT2_OFF,
248 Bit3 : BIT3_OFF,
249 Bit4 : BIT4_OFF,
250 Bit5 : BIT5_OFF,
251 Bit6 : BIT6_OFF,
252 Bit7 : BIT7_OFF
253 };
254
255 /*! Port 3 Direction Register */
256 config GpioBits8PxDir_t P3DIR = {
257 Bit0 : BIT0_OFF,
258 Bit1 : BIT1_OFF,
259 Bit2 : BIT2_OFF,
260 Bit3 : BIT3_OFF,
261 Bit4 : BIT4_OFF,
262 Bit5 : BIT5_OFF,
263 Bit6 : BIT6_OFF,
264 Bit7 : BIT7_OFF
265 };
266
267 /*! Port 3 Resistor Enable Register */
268 config GpioBits8PxRen_t P3REN = {
269 Bit0 : BIT0_OFF,
270 Bit1 : BIT1_OFF,
271 Bit2 : BIT2_OFF,
272 Bit3 : BIT3_OFF,
273 Bit4 : BIT4_OFF,
274 Bit5 : BIT5_OFF,
275 Bit6 : BIT6_OFF,
276 Bit7 : BIT7_OFF
277 };
278 }