1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
32
33 /*!
34 * Universal Serial Communication Interface A0 UART 2xx
35 */
36 metaonly interface IUSCI_A0_UART inherits IUSCI_UART {
37
38 instance:
39 /*! Control Register 0 */
40 config UCxCTL0_t UCA0CTL0 = {
41 UCPEN : UCPEN_OFF,
42 UCPAR : UCPAR_OFF,
43 UCMSB : UCMSB_OFF,
44 UC7BIT : UC7BIT_OFF,
45 UCSPB : UCSPB_OFF,
46 UCMODE : UCMODE_0,
47 UCSYNC : UCSYNC_OFF,
48 };
49
50 /*! Control Register 1 */
51 config UCxCTL1_t UCA0CTL1 = {
52 UCSSEL : UCSSEL_0,
53 UCRXEIE : UCRXEIE_OFF,
54 UCBRKIE : UCBRKIE_OFF,
55 UCDORM : UCDORM_OFF,
56 UCTXADDR : UCTXADDR_OFF,
57 UCTXBRK : UCTXBRK_OFF,
58 UCSWRST : UCSWRST,
59 };
60
61 /*! Modulation Control Register */
62 config UCxMCTL_t UCA0MCTL = {
63 UCBRF : UCBRF_0,
64 UCBRS : UCBRS_0,
65 UCOS16 : UCOS16_OFF,
66 };
67
68 /*! Status Register */
69 config UCxSTAT_t UCA0STAT = {
70 UCLISTEN : UCLISTEN_OFF,
71 UCFE : UCFE_OFF,
72 UCOE : UCOE_OFF,
73 UCPE : UCPE_OFF,
74 UCBRK : UCBRK_OFF,
75 UCRXERR : UCRXERR_OFF,
76 UCADDR : UCADDR_OFF,
77 UCIDLE : UCIDLE_OFF,
78 UCBUSY : UCBUSY,
79 };
80
81 /*! IrDA Transmit Control Register */
82 config UCxIRTCTL_t UCA0IRTCTL = {
83 UCIRTXPL5 : UCIRTXPL5_OFF,
84 UCIRTXPL4 : UCIRTXPL4_OFF,
85 UCIRTXPL3 : UCIRTXPL3_OFF,
86 UCIRTXPL2 : UCIRTXPL2_OFF,
87 UCIRTXPL1 : UCIRTXPL1_OFF,
88 UCIRTXPL0 : UCIRTXPL0_OFF,
89 UCIRTXCLK : UCIRTXCLK_OFF,
90 UCIREN : UCIREN_OFF,
91 };
92
93 /*! IrDA Receive Control Register */
94 config UCxIRRCTL_t UCA0IRRCTL = {
95 UCIRRXFL5 : UCIRRXFL5_OFF,
96 UCIRRXFL4 : UCIRRXFL4_OFF,
97 UCIRRXFL3 : UCIRRXFL3_OFF,
98 UCIRRXFL2 : UCIRRXFL2_OFF,
99 UCIRRXFL1 : UCIRRXFL1_OFF,
100 UCIRRXFL0 : UCIRRXFL0_OFF,
101 UCIRRXPL : UCIRRXPL_OFF,
102 UCIRRXFE : UCIRRXFE_OFF,
103 };
104
105 /*! Auto Baud Rate Control Register */
106 config UCxABCTL_t UCA0ABCTL = {
107 UCDELIM1 : UCDELIM1_OFF,
108 UCDELIM0 : UCDELIM0_OFF,
109 UCSTOE : UCSTOE_OFF,
110 UCBTOE : UCBTOE_OFF,
111 UCABDEN : UCABDEN_OFF,
112 };
113
114 /*! Receive Buffer Register */
115 config Bits8 UCA0RXBUF = 0;
116
117 /*! Transmit Buffer Register */
118 config Bits8 UCA0TXBUF = 0;
119
120 /*! Baud rate control register 0 */
121 config Bits8 UCA0BR0 = 0;
122
123 /*! Baud rate control register 1 */
124 config Bits8 UCA0BR1 = 0;
125 }