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32
33 /*!
34 * ======== Svs ========
35 * MSP430F2xx Family SVS Module
36 */
37 metaonly module SVS inherits ISVS {
38
39 /*! SVSCTL Register */
40 struct SVSCTL_t {
41 VLD3_t VLD3; /*! Voltage level detect. These bits turn on the SVS and select
42 * the nominal SVS threshold voltage level. See the device specific
43 * data sheet for parameters.
44 * 0000 SVS is off
45 * 0001 1.9 V
46 * 0010 2.1 V
47 * 0011 2.2 V
48 * 0100 2.3 V
49 * 0101 2.4 V
50 * 0110 2.5 V
51 * 0111 2.65 V
52 * 1000 2.8 V
53 * 1001 2.9 V
54 * 1010 3.05
55 * 1011 3.2 V
56 * 1100 3.35 V
57 * 1101 3.5 V
58 * 1110 3.7 V
59 * 1111 Compares external input voltage SVSIN to 1.25 V. */
60 VLD2_t VLD2; /*! Voltage level detect. These bits turn on the SVS and select
61 * the nominal SVS threshold voltage level. See the device specific
62 * data sheet for parameters.
63 * 0000 SVS is off
64 * 0001 1.9 V
65 * 0010 2.1 V
66 * 0011 2.2 V
67 * 0100 2.3 V
68 * 0101 2.4 V
69 * 0110 2.5 V
70 * 0111 2.65 V
71 * 1000 2.8 V
72 * 1001 2.9 V
73 * 1010 3.05
74 * 1011 3.2 V
75 * 1100 3.35 V
76 * 1101 3.5 V
77 * 1110 3.7 V
78 * 1111 Compares external input voltage SVSIN to 1.25 V. */
79 VLD1_t VLD1; /*! Voltage level detect. These bits turn on the SVS and select
80 * the nominal SVS threshold voltage level. See the device specific
81 * data sheet for parameters.
82 * 0000 SVS is off
83 * 0001 1.9 V
84 * 0010 2.1 V
85 * 0011 2.2 V
86 * 0100 2.3 V
87 * 0101 2.4 V
88 * 0110 2.5 V
89 * 0111 2.65 V
90 * 1000 2.8 V
91 * 1001 2.9 V
92 * 1010 3.05
93 * 1011 3.2 V
94 * 1100 3.35 V
95 * 1101 3.5 V
96 * 1110 3.7 V
97 * 1111 Compares external input voltage SVSIN to 1.25 V. */
98 VLD0_t VLD0; /*! Voltage level detect. These bits turn on the SVS and select
99 * the nominal SVS threshold voltage level. See the device specific
100 * data sheet for parameters.
101 * 0000 SVS is off
102 * 0001 1.9 V
103 * 0010 2.1 V
104 * 0011 2.2 V
105 * 0100 2.3 V
106 * 0101 2.4 V
107 * 0110 2.5 V
108 * 0111 2.65 V
109 * 1000 2.8 V
110 * 1001 2.9 V
111 * 1010 3.05
112 * 1011 3.2 V
113 * 1100 3.35 V
114 * 1101 3.5 V
115 * 1110 3.7 V
116 * 1111 Compares external input voltage SVSIN to 1.25 V. */
117 PORON_t PORON; /*! POR on. This bit enables the SVSFG flag to
118 * cause a POR device reset.
119 * 0 SVSFG does not cause a POR
120 * 1 SVSFG causes a POR */
121 SVSON_t SVSON; /*! SVS on. This bit reflects the status of SVS operation. This bit DOES NOT turn
122 * on the SVS. The SVS is turned on by setting VLDx > 0.
123 * 0 SVS is Off
124 * 1 SVS is On */
125 SVSOP_t SVSOP; /*! SVS output. This bit reflects the output value of the SVS comparator.
126 * 0 SVS comparator output is low
127 * 1 SVS comparator output is high */
128 SVSFG_t SVSFG; /*! SVS flag. This bit indicates a low voltage condition. SVSFG remains set after
129 * a low voltage condition until reset by software.
130 * 0 No low voltage condition occurred
131 * 1 A low condition is present or has occurred */
132 }
133 /*!
134 * ======== create ========
135 * Create an instance of this peripheral.
136 */
137 create();
138
139 instance:
140 /*! SVSCTL Register */
141 config SVSCTL_t SVSCTL = {
142 VLD3 : VLD3_OFF,
143 VLD2 : VLD2_OFF,
144 VLD1 : VLD1_OFF,
145 VLD0 : VLD0_OFF,
146 PORON : PORON_OFF,
147 SVSON : SVSON_OFF,
148 SVSOP : SVSOP_OFF,
149 SVSFG : SVSFG_OFF
150 };
151 /*! Determine if each Register needs to be forced set or not */
152 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
153 [
154 { register : "SVSCTL" , regForceSet : false }
155 ];
156
157 }