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32
33 import ti.catalog.msp430.peripherals.communication.USI as USI;
34 import ti.catalog.msp430.peripherals.adc.SD16_A as SD16_A;
35
36 /*!
37 * ======== GPIO for MSP430F20x3 ========
38 * MSP430 General Purpose Input Output Ports
39 */
40 metaonly module GPIO_MSP430F20x3 inherits IGPIO {
41 /*!
42 * ======== create ========
43 * Create an instance of this peripheral.
44 */
45 create(USI.Instance usi, SD16_A.Instance sd16_A);
46
47 instance:
48 /*! @_nodoc */
49 config USI.Instance usi;
50
51 /*! @_nodoc */
52 config SD16_A.Instance sd16_A;
53
54 /*! Define an array to describe all device pins. The 1st dimension
55 * denotes the port, the second the pin on that port. On an
56 * MSP430F20x3 device, there are 8 + 2 = 10 pins total.
57 */
58
59 60
61 readonly config DevicePin_t devicePins[2][8];
62
63 /*! Implementation of Device Pin Functional Configuration */
64 override config DevicePinFunctionSetting_t devicePinSetting[2][8];
65
66 /*! Determine if each Register needs to be forced set or not */
67 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
68 [
69 { register : "P1OUT" , regForceSet : true },
70 { register : "P1SEL" , regForceSet : false },
71 { register : "P1DIR" , regForceSet : true },
72 { register : "P1REN" , regForceSet : false },
73 { register : "P1IES" , regForceSet : true },
74 { register : "P1IFG" , regForceSet : true },
75 { register : "P1IE" , regForceSet : false },
76 { register : "P2OUT" , regForceSet : true },
77 { register : "P2SEL" , regForceSet : false },
78 { register : "P2DIR" , regForceSet : true },
79 { register : "P2REN" , regForceSet : false },
80 { register : "P2IES" , regForceSet : true },
81 { register : "P2IFG" , regForceSet : true },
82 { register : "P2IE" , regForceSet : false }
83 ];
84
85 86 87 88 89 90
91
92 /*! Port 1 Output Register */
93 config GpioBits8PxOut_t P1OUT = {
94 Bit0 : BIT0_OFF,
95 Bit1 : BIT1_OFF,
96 Bit2 : BIT2_OFF,
97 Bit3 : BIT3_OFF,
98 Bit4 : BIT4_OFF,
99 Bit5 : BIT5_OFF,
100 Bit6 : BIT6_OFF,
101 Bit7 : BIT7_OFF
102 };
103
104 /*! Port 1 Port Select Register */
105 config GpioBits8PxSel_t P1SEL = {
106 Bit0 : BIT0_OFF,
107 Bit1 : BIT1_OFF,
108 Bit2 : BIT2_OFF,
109 Bit3 : BIT3_OFF,
110 Bit4 : BIT4_OFF,
111 Bit5 : BIT5_OFF,
112 Bit6 : BIT6_OFF,
113 Bit7 : BIT7_OFF
114 };
115
116 /*! Port 1 Direction Register */
117 config GpioBits8PxDir_t P1DIR = {
118 Bit0 : BIT0_OFF,
119 Bit1 : BIT1_OFF,
120 Bit2 : BIT2_OFF,
121 Bit3 : BIT3_OFF,
122 Bit4 : BIT4_OFF,
123 Bit5 : BIT5_OFF,
124 Bit6 : BIT6_OFF,
125 Bit7 : BIT7_OFF
126 };
127
128 /*! Port 1 Resistor Enable Register */
129 config GpioBits8PxRen_t P1REN = {
130 Bit0 : BIT0_OFF,
131 Bit1 : BIT1_OFF,
132 Bit2 : BIT2_OFF,
133 Bit3 : BIT3_OFF,
134 Bit4 : BIT4_OFF,
135 Bit5 : BIT5_OFF,
136 Bit6 : BIT6_OFF,
137 Bit7 : BIT7_OFF
138 };
139
140 /*! Port 2 Output Register */
141 config GpioBits8PxOut_t P2OUT = {
142 Bit0 : BIT0_OFF,
143 Bit1 : BIT1_OFF,
144 Bit2 : BIT2_OFF,
145 Bit3 : BIT3_OFF,
146 Bit4 : BIT4_OFF,
147 Bit5 : BIT5_OFF,
148 Bit6 : BIT6_OFF,
149 Bit7 : BIT7_OFF
150 };
151
152 /*! Port 2 Port Select Register */
153 config GpioBits8PxSel_t P2SEL = {
154 Bit0 : BIT0_OFF,
155 Bit1 : BIT1_OFF,
156 Bit2 : BIT2_OFF,
157 Bit3 : BIT3_OFF,
158 Bit4 : BIT4_OFF,
159 Bit5 : BIT5_OFF,
160 Bit6 : BIT6,
161 Bit7 : BIT7
162 };
163
164 /*! Port 2 Direction Register */
165 config GpioBits8PxDir_t P2DIR = {
166 Bit0 : BIT0_OFF,
167 Bit1 : BIT1_OFF,
168 Bit2 : BIT2_OFF,
169 Bit3 : BIT3_OFF,
170 Bit4 : BIT4_OFF,
171 Bit5 : BIT5_OFF,
172 Bit6 : BIT6_OFF,
173 Bit7 : BIT7_OFF
174 };
175
176 /*! Port 2 Resistor Enable Register */
177 config GpioBits8PxRen_t P2REN = {
178 Bit0 : BIT0_OFF,
179 Bit1 : BIT1_OFF,
180 Bit2 : BIT2_OFF,
181 Bit3 : BIT3_OFF,
182 Bit4 : BIT4_OFF,
183 Bit5 : BIT5_OFF,
184 Bit6 : BIT6_OFF,
185 Bit7 : BIT7_OFF
186 };
187 }