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32
33 /*!
34 * ======== Timer_A5 ========
35 * MSP430 Timer_A5 timer
36 */
37 metaonly module Timer_A5 inherits ITimer_A {
38
39 instance:
40
41 override config string name = "TimerA5";
42
43 /*! Timer A5 Control Register */
44 config TACTL_t TAxCTL = {
45 TASSEL : TASSEL_0,
46 ID : ID_0,
47 MC : MC_0,
48 TACLR : TACLR_OFF,
49 TAIE : TAIE_OFF,
50 TAIFG : TAIFG_OFF
51 };
52
53 /*! Capture/Compare Control 0 */
54 config TACCTLx_t TACCTL0 = {
55 CM : CM_0,
56 CCIS : CCIS_0,
57 SCS : SCS_OFF,
58 SCCI : SCCI_OFF,
59 CAP : CAP_OFF,
60 OUTMOD : OUTMOD_0,
61 CCIE : CCIE_OFF,
62 CCI : CCI_OFF,
63 OUT : OUT_OFF,
64 COV : COV_OFF,
65 CCIFG : CCIFG_OFF
66 };
67
68 /*! Capture/Compare Control 1 */
69 config TACCTLx_t TACCTL1 = {
70 CM : CM_0,
71 CCIS : CCIS_0,
72 SCS : SCS_OFF,
73 SCCI : SCCI_OFF,
74 CAP : CAP_OFF,
75 OUTMOD : OUTMOD_0,
76 CCIE : CCIE_OFF,
77 CCI : CCI_OFF,
78 OUT : OUT_OFF,
79 COV : COV_OFF,
80 CCIFG : CCIFG_OFF
81 };
82
83 /*! Capture/Compare Control 2 */
84 config TACCTLx_t TACCTL2 = {
85 CM : CM_0,
86 CCIS : CCIS_0,
87 SCS : SCS_OFF,
88 SCCI : SCCI_OFF,
89 CAP : CAP_OFF,
90 OUTMOD : OUTMOD_0,
91 CCIE : CCIE_OFF,
92 CCI : CCI_OFF,
93 OUT : OUT_OFF,
94 COV : COV_OFF,
95 CCIFG : CCIFG_OFF
96 };
97
98 /*! Capture/Compare Control 3 */
99 config TACCTLx_t TACCTL3 = {
100 CM : CM_0,
101 CCIS : CCIS_0,
102 SCS : SCS_OFF,
103 SCCI : SCCI_OFF,
104 CAP : CAP_OFF,
105 OUTMOD : OUTMOD_0,
106 CCIE : CCIE_OFF,
107 CCI : CCI_OFF,
108 OUT : OUT_OFF,
109 COV : COV_OFF,
110 CCIFG : CCIFG_OFF
111 };
112
113 /*! Capture/Compare Control 4 */
114 config TACCTLx_t TACCTL4 = {
115 CM : CM_0,
116 CCIS : CCIS_0,
117 SCS : SCS_OFF,
118 SCCI : SCCI_OFF,
119 CAP : CAP_OFF,
120 OUTMOD : OUTMOD_0,
121 CCIE : CCIE_OFF,
122 CCI : CCI_OFF,
123 OUT : OUT_OFF,
124 COV : COV_OFF,
125 CCIFG : CCIFG_OFF
126 };
127
128 config Bits16 TACCR0 = 0; /*! Capture/Compare 0 */
129 config Bits16 TACCR1 = 0; /*! Capture/Compare 1 */
130 config Bits16 TACCR2 = 0; /*! Capture/Compare 2 */
131 config Bits16 TACCR3 = 0; /*! Capture/Compare 3 */
132 config Bits16 TACCR4 = 0; /*! Capture/Compare 4 */
133
134 /*! Timer interrupt enables */
135 config regIntVect_t interruptSource[6];
136
137 /*! Determine if each Register needs to be forced set or not */
138 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
139 [
140 { register : "TACTL" , regForceSet : false },
141 { register : "TACCTL0" , regForceSet : false },
142 { register : "TACCTL1" , regForceSet : false },
143 { register : "TACCTL2" , regForceSet : false },
144 { register : "TACCTL3" , regForceSet : false },
145 { register : "TACCTL4" , regForceSet : false },
146 { register : "TACCR0" , regForceSet : false },
147 { register : "TACCR1" , regForceSet : false },
148 { register : "TACCR2" , regForceSet : false },
149 { register : "TACCR3" , regForceSet : false },
150 { register : "TACCR4" , regForceSet : false }
151 ];
152 }