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33 34 35 36
37 package ti.catalog.c6000;
38
39 /*!
40 * ======== ITMS320C64_128K ========
41 * An interface implemented by all TMS320C64xx devices with 128KB of internal
42 * memory.
43 *
44 * This interface is defined to factor common data about this family into
45 * a single place; all TMS320C64xx devices with 128KB of internal
46 * memory extend this interface.
47 */
48 metaonly interface ITMS320C64_128K inherits ti.catalog.ICpuDataSheet
49 {
50
51 config long cacheSize[string] = [
52 ["4-way cache (0k)", 0x00000],
53 ["4-way cache (32k)", 0x08000],
54 ["4-way cache (64k)", 0x10000],
55 ["4-way cache (128k)", 0x20000],
56 ["0k", 0x00000],
57 ["32k", 0x08000],
58 ["64k", 0x10000],
59 ["128k", 0x20000],
60 ];
61
62 readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] = [
63 ['l2Mode',{desc:"L2 Cache",
64 map : [["4-way cache (0k)",0x0000],
65 ["4-way cache (32k)",0x8000],
66 ["4-way cache (64k)",0x10000],
67 ["4-way cache (128k)",0x20000]],
68 defaultValue: "4-way cache (0k)",
69 memorySection: "IRAM"}]
70 ];
71
72 instance:
73 override config int minProgUnitSize = 1;
74 override config int minDataUnitSize = 1;
75 override config int dataWordSize = 4;
76
77 override config string cpuCore = "6400";
78 override config string isa = "64";
79 override config string cpuCoreRevision = "1.0";
80
81 /*!
82 * ======== memMap ========
83 * The default memory map for this device
84 */
85 config xdc.platform.IPlatform.Memory memMap[string] = [
86 ["IRAM", {
87 name: "IRAM",
88 comment: "Internal L2 memory",
89 base: 0x00000,
90 len: 0x20000,
91 space: "code/data",
92 access: "RWX"
93 }],
94 ];
95 }