1 /* 2 * Copyright (c) 2016, Texas Instruments Incorporated 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * * Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * * Neither the name of Texas Instruments Incorporated nor the names of 17 * its contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * ======== ITI811X.xdc ======== 35 * 36 */ 37 38 /*! 39 * ======== ITI811X ======== 40 * An interface implemented by all TI811X devices 41 * 42 * This interface is defined to factor common data about all TI811X type 43 * devices into a single place; they all have the same internal memory. 44 */ 45 metaonly interface ITI811X inherits ti.catalog.ICpuDataSheet 46 { 47 instance: 48 config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0; 49 50 override config string cpuCore = "CM3"; 51 override config string isa = "v7M"; 52 override config string cpuCoreRevision = "1.0"; 53 override config int minProgUnitSize = 1; 54 override config int minDataUnitSize = 1; 55 override config int dataWordSize = 4; 56 57 /*! 58 * ======== memMap ======== 59 * The memory map returned be getMemoryMap(). 60 */ 61 config xdc.platform.IPlatform.Memory memMap[string] = [ 62 63 /* 64 * AMMU mapped L2 BOOT virtual address 65 * Physical address is 0x5502_0000, virt is 0x00000000 66 * Reset vectors and other boot code is placed here. 67 * 68 * Note that actual L2 RAM is 256K starting at 0x5502_0000. 69 * The first 16K is reserved for reset vectors (i.e. L2_BOOT). 70 * The remaining 240K is placed in the L2_RAM definition. 71 */ 72 ["L2_BOOT", { 73 name: "L2_BOOT", 74 base: 0x00000000, 75 len: 0x4000 76 }], 77 78 /* 79 * AMMU mapped L2 RAM virtual address 80 * Physical address is 0x5502_4000, virt is 0x2000_4000 81 * 82 * Note that actual L2 RAM is 256K starting at 0x5502_0000. 83 * The first 16K is reserved for reset vectors (i.e. L2_BOOT). 84 * The remaining 240K is placed in the L2_RAM definition. 85 */ 86 ["L2_RAM", { 87 name: "L2_RAM", 88 base: 0x20004000, 89 len: 0x3C000 90 }], 91 92 /* 93 * OCMC (On-chip RAM) 94 * Physical address is 0x40300000 95 * Size is 128K 96 */ 97 ["OCMC", { 98 name: "OCMC", 99 base: 0x00300000, 100 len: 0x20000 101 }], 102 ]; 103 };