1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    35    
    36    /*!
    37     *  ======== GPIO for MSP430G2x31 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430G2x31 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral.
    44         */
    45        create(USI.Instance usi, ADC10.Instance adc10);
    46    
    47    instance:
    48        /*! @_nodoc */
    49        config USI.Instance usi;
    50    
    51        /*! @_nodoc */
    52        config ADC10.Instance adc10;
    53    
    54       /*! Define an array to describe all device pins. The 1st dimension
    55        *  denotes the port, the second the pin on that port. On an
    56        *  MSP430G2x31 device, there are 8 + 2 = 10 pins total.
    57        */
    58    
    59        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    60         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    61        /* TODO: For this device the config variable definition has been moved into the
    62         * corresponding XS file due to its size. This needs a more consistent solution. */
    63        config DevicePin_t devicePins[2][8];
    64    
    65        /*! Implementation of Device Pin Functional Configuration */
    66        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    67    
    68        /*! Determine if each Register needs to be forced set or not */
    69        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    70        [
    71            { register : "P1OUT" , regForceSet : true  },
    72            { register : "P1SEL" , regForceSet : false },
    73            { register : "P1DIR" , regForceSet : true  },
    74            { register : "P1REN" , regForceSet : false },
    75            { register : "P1IES" , regForceSet : true },
    76            { register : "P1IFG" , regForceSet : true },
    77            { register : "P1IE"  , regForceSet : false },
    78            { register : "P2OUT" , regForceSet : true  },
    79            { register : "P2SEL" , regForceSet : false },
    80            { register : "P2DIR" , regForceSet : true  },
    81            { register : "P2REN" , regForceSet : false },
    82            { register : "P2IES" , regForceSet : true },
    83            { register : "P2IFG" , regForceSet : true },
    84            { register : "P2IE"  , regForceSet : false }
    85        ];
    86    
    87        /*
    88         *  GPIO Digital I/O Registers
    89         *
    90         *  One GIPO instance defines the configuration of an entire,
    91         *  8-bit wide digital I/O port.
    92         */
    93    
    94        /*! Port 1 Output Register */
    95        config GpioBits8PxOut_t P1OUT = {
    96            Bit0        : BIT0_OFF,
    97            Bit1        : BIT1_OFF,
    98            Bit2        : BIT2_OFF,
    99            Bit3        : BIT3_OFF,
   100            Bit4        : BIT4_OFF,
   101            Bit5        : BIT5_OFF,
   102            Bit6        : BIT6_OFF,
   103            Bit7        : BIT7_OFF
   104        };
   105    
   106        /*! Port 1 Port Select Register */
   107        config GpioBits8PxSel_t P1SEL = {
   108            Bit0        : BIT0_OFF,
   109            Bit1        : BIT1_OFF,
   110            Bit2        : BIT2_OFF,
   111            Bit3        : BIT3_OFF,
   112            Bit4        : BIT4_OFF,
   113            Bit5        : BIT5_OFF,
   114            Bit6        : BIT6_OFF,
   115            Bit7        : BIT7_OFF
   116        };
   117    
   118        /*! Port 1 Direction Register */
   119        config GpioBits8PxDir_t P1DIR = {
   120            Bit0        : BIT0_OFF,
   121            Bit1        : BIT1_OFF,
   122            Bit2        : BIT2_OFF,
   123            Bit3        : BIT3_OFF,
   124            Bit4        : BIT4_OFF,
   125            Bit5        : BIT5_OFF,
   126            Bit6        : BIT6_OFF,
   127            Bit7        : BIT7_OFF
   128        };
   129    
   130        /*! Port 1 Resistor Enable Register */
   131        config GpioBits8PxRen_t P1REN = {
   132            Bit0        : BIT0_OFF,
   133            Bit1        : BIT1_OFF,
   134            Bit2        : BIT2_OFF,
   135            Bit3        : BIT3_OFF,
   136            Bit4        : BIT4_OFF,
   137            Bit5        : BIT5_OFF,
   138            Bit6        : BIT6_OFF,
   139            Bit7        : BIT7_OFF
   140        };
   141    
   142        /*! Port 2 Output Register */
   143        config GpioBits8PxOut_t P2OUT = {
   144            Bit0        : BIT0_OFF,
   145            Bit1        : BIT1_OFF,
   146            Bit2        : BIT2_OFF,
   147            Bit3        : BIT3_OFF,
   148            Bit4        : BIT4_OFF,
   149            Bit5        : BIT5_OFF,
   150            Bit6        : BIT6_OFF,
   151            Bit7        : BIT7_OFF
   152        };
   153    
   154        /*! Port 2 Port Select Register */
   155        config GpioBits8PxSel_t P2SEL = {
   156            Bit0        : BIT0_OFF,
   157            Bit1        : BIT1_OFF,
   158            Bit2        : BIT2_OFF,
   159            Bit3        : BIT3_OFF,
   160            Bit4        : BIT4_OFF,
   161            Bit5        : BIT5_OFF,
   162            Bit6        : BIT6,         /* POR default for all 2xx devices */
   163            Bit7        : BIT7          /* POR default for all 2xx devices */
   164        };
   165    
   166        /*! Port 2 Direction Register */
   167        config GpioBits8PxDir_t P2DIR = {
   168            Bit0        : BIT0_OFF,
   169            Bit1        : BIT1_OFF,
   170            Bit2        : BIT2_OFF,
   171            Bit3        : BIT3_OFF,
   172            Bit4        : BIT4_OFF,
   173            Bit5        : BIT5_OFF,
   174            Bit6        : BIT6_OFF,
   175            Bit7        : BIT7_OFF
   176        };
   177    
   178        /*! Port 2 Resistor Enable Register */
   179        config GpioBits8PxRen_t P2REN = {
   180            Bit0        : BIT0_OFF,
   181            Bit1        : BIT1_OFF,
   182            Bit2        : BIT2_OFF,
   183            Bit3        : BIT3_OFF,
   184            Bit4        : BIT4_OFF,
   185            Bit5        : BIT5_OFF,
   186            Bit6        : BIT6_OFF,
   187            Bit7        : BIT7_OFF
   188        };
   189    }