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32
33 import ti.catalog.msp430.peripherals.clock.IClock;
34
35 /*!
36 * Universal Serial Communication Interface B1 I2C 2xx
37 */
38 metaonly module USCI_B1_I2C_2xx inherits IUSCI_B1_I2C {
39
40 41 42
43 create(IClock.Instance clock);
44
45 /*! Not-acknowledge interrupt enable */
46 enum UCNACKIE_t {
47 UCNACKIE_OFF = 0x00, /*! Interrupt disabled */
48 UCNACKIE = 0x80 /*! Interrupt enabled */
49 };
50
51 /*! Stop condition interrupt enable */
52 enum UCSTPIE_t {
53 UCSTPIE_OFF = 0x00, /*! Interrupt disabled */
54 UCSTPIE = 0x80 /*! Interrupt enabled */
55 };
56
57 /*! Start condition interrupt enable */
58 enum UCSTTIE_t {
59 UCSTTIE_OFF = 0x00, /*! Interrupt disabled */
60 UCSTTIE = 0x80 /*! Interrupt enabled */
61 };
62
63 /*! Arbitration lost interrupt enable */
64 enum UCALIE_t {
65 UCALIE_OFF = 0x00, /*! Interrupt disabled */
66 UCALIE = 0x80 /*! Interrupt enabled */
67 };
68
69 /*! USCI_Bx I2C Interrupt Enable Register */
70 struct UCBxI2CIE_t {
71 UCNACKIE_t UCNACKIE; /*! Not-acknowledge interrupt enable
72 * 0 Interrupt disabled
73 * 1 Interrupt enabled */
74 UCSTPIE_t UCSTPIE; /*! Stop condition interrupt enable
75 * 0 Interrupt disabled
76 * 1 Interrupt enabled */
77 UCSTTIE_t UCSTTIE; /*! Start condition interrupt enable
78 * 0 Interrupt disabled
79 * 1 Interrupt enabled */
80 UCALIE_t UCALIE; /*! Arbitration lost interrupt enable
81 * 0 Interrupt disabled
82 * 1 Interrupt enabled */
83 }
84
85 /*! USCI_B1 transmit interrupt enable */
86 enum UCB1TXIE_t {
87 UCB1TXIE_OFF = 0x00, /*! Interrupt disabled */
88 UCB1TXIE = 0x08 /*! Interrupt enabled */
89 };
90
91 /*! USCI_B1 receive interrupt enable */
92 enum UCB1RXIE_t {
93 UCB1RXIE_OFF = 0x00, /*! Interrupt disabled */
94 UCB1RXIE = 0x04 /*! Interrupt enabled */
95 };
96
97 /*! USCI_xx SPI Interrupt Enable Register */
98 struct UC1IE_t {
99 UCB1TXIE_t UCB1TXIE; /*! USCI_B1 transmit interrupt enable
100 * 0 Interrupt disabled
101 * 1 Interrupt enabled */
102 UCB1RXIE_t UCB1RXIE; /*! USCI_B1 receive interrupt enable
103 * 0 Interrupt disabled
104 * 1 Interrupt enabled */
105 }
106
107 instance:
108 /*! @_nodoc */
109 config IClock.Instance clock;
110
111 /*! USCI_Bx I2C Interrupt Enable Register */
112 config UCBxI2CIE_t UCB1I2CIE = {
113 UCNACKIE : UCNACKIE_OFF,
114 UCSTPIE : UCSTPIE_OFF,
115 UCSTTIE : UCSTTIE_OFF,
116 UCALIE : UCALIE_OFF,
117 };
118
119 /*! USCI_B1 Interrupt Enable Register */
120 config UC1IE_t UC1IE = {
121 UCB1TXIE : UCB1TXIE_OFF,
122 UCB1RXIE : UCB1RXIE_OFF
123 };
124
125 /*!
126 * ======== setUCNACKIE ========
127 * Sets UCNACKIE bit
128 *
129 * @see #setUCNACKIE
130 */
131 Bool setUCNACKIE(Bool set);
132
133 /*!
134 * ======== getUCNACKIE ========
135 * Gets UCNACKIE bit
136 *
137 * @see #getUCNACKIE
138 */
139 Bool getUCNACKIE();
140
141 /*!
142 * ======== setUCSTPIE ========
143 * Sets UCSTPIE bit
144 *
145 * @see #setUCSTPIE
146 */
147 Bool setUCSTPIE(Bool set);
148
149 /*!
150 * ======== getUCSTPIE ========
151 * Gets UCSTPIE bit
152 *
153 * @see #getUCSTPIE
154 */
155 Bool getUCSTPIE();
156
157 /*!
158 * ======== setUCSTTIE ========
159 * Sets UCSTTIE bit
160 *
161 * @see #setUCSTTIE
162 */
163 Bool setUCSTTIE(Bool set);
164
165 /*!
166 * ======== getUCSTTIE ========
167 * Gets UCSTTIE bit
168 *
169 * @see #getUCSTTIE
170 */
171 Bool getUCSTTIE();
172
173 /*!
174 * ======== setUCALIE ========
175 * Sets UCALIE bit
176 *
177 * @see #setUCALIE
178 */
179 Bool setUCALIE(Bool set);
180
181 /*!
182 * ======== getUCALIE ========
183 * Gets UCALIE bit
184 *
185 * @see #getUCALIE
186 */
187 Bool getUCALIE();
188
189 /*! USCI_B1 I2C interrupt enables */
190 config regIntVect_t interruptSource[6];
191
192 /*! Determine if each Register needs to be forced set or not */
193 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
194 [
195 { register : "UCB1CTL0" , regForceSet : false },
196 { register : "UCB1CTL1" , regForceSet : false },
197 { register : "UCB1BR0" , regForceSet : false },
198 { register : "UCB1BR1" , regForceSet : false },
199 { register : "UCB1STAT" , regForceSet : false },
200 { register : "UCB1RXBUF" , regForceSet : false },
201 { register : "UCB1TXBUF" , regForceSet : false },
202 { register : "UCB1I2COA" , regForceSet : false },
203 { register : "UCB1I2CSA" , regForceSet : false },
204 { register : "UCB1I2CIE" , regForceSet : false },
205 { register : "UC1IE" , regForceSet : false }
206 ];
207 }