1 /* 2 * Copyright (c) 2016, Texas Instruments Incorporated 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * * Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * * Neither the name of Texas Instruments Incorporated nor the names of 17 * its contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 34 /*! 35 * ======== IDMA ======== 36 * MSP430 DMA controller 37 */ 38 metaonly interface IDMA inherits xdc.platform.IPeripheral { 39 40 /*! 41 * ======== regIntVect_t ======== 42 * Interrupt vector description 43 * 44 * Type to describe a single interrupt vector pin and all its possible 45 * configurations. 46 * 47 * @see #regIntVect_t 48 */ 49 struct regIntVect_t { 50 String registerName; 51 String registerDescription; 52 String isrToggleString; 53 String priorityName; 54 Bool interruptEnable; 55 Bool interruptHandler; 56 Int priority; 57 } 58 59 /*! 60 * ======== regTriggerVect_t ======== 61 * Trigger vector description 62 * 63 */ 64 struct regTriggerVect_t { 65 Int channel; 66 String triggerName; 67 Int value; 68 } 69 70 /*! 71 * ======== ForceSetDefaultRegister_t ======== 72 * Force Set Default Register 73 * 74 * Type to store if each register needs to be forced initialized 75 * even if the register is in default state. 76 * 77 * @see #ForceSetDefaultRegister_t 78 */ 79 struct ForceSetDefaultRegister_t { 80 String register; 81 Bool regForceSet; 82 } 83 84 85 instance: 86 }