1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    
    33    
    34    /*
    35     *  ======== IMSP430F55xx.xdc ========
    36     *  Common definitions for MSP430F55xx devices
    37     *
    38     *  This device can load code for different MSP430 ISAs - `MSP430` and
    39     *  `MSP430X`. The parameter `{@link #isa}` is set to a JavaScript regular
    40     *  expression that covers different MSP430 ISAs.
    41     *
    42     */
    43    
    44    metaonly interface IMSP430F55xx inherits ti.catalog.msp430.IMSP430
    45    {
    46    
    47    instance:
    48    
    49        override config string   cpuCore = "MSP430X";
    50        override config string   isa     = "430|430X";
    51    
    52        config ti.catalog.msp430.peripherals.special_function.IE1.Instance
    53            interruptEnableRegister1;
    54        config ti.catalog.msp430.peripherals.timer.Timer0_A5.Instance TA0;
    55        config ti.catalog.msp430.peripherals.timer.Timer1_A3.Instance TA1;
    56        config ti.catalog.msp430.peripherals.timer.Timer2_A3.Instance TA2;
    57        config ti.catalog.msp430.peripherals.timer.Timer0_B7.Instance TB0;
    58        config ti.catalog.msp430.peripherals.watchdog.WDTplus.Instance wdtPlus;
    59        config ti.catalog.msp430.peripherals.interrupt.Interrupt_Controller.Instance
    60            interruptController;
    61    
    62        /*!
    63         *  ======== commonMap ========
    64         *  Memory map elements shared by all MSP430F55xx devices
    65         */
    66        config xdc.platform.IPlatform.Memory commonMap[string] = [
    67    
    68            ["PERIPHERALS", {
    69                comment:    "Memory mapped peripherals",
    70                name:       "PERIPHERALS",
    71                base:       0x0,
    72                len:        0x1000,
    73                space:      "io",
    74                access:     "RW"
    75            }],
    76    
    77            ["BSL", {
    78                comment:    "Bootstrap loader (flash)",
    79                name:       "BSL",
    80                base:       0x1000,
    81                len:        0x800,
    82                space:      "code",
    83                access:     "RW"
    84            }],
    85    
    86            ["INFOD", {
    87                comment:    "Information Memory D (flash)",
    88                name:       "INFOD",
    89                base:       0x1800,
    90                len:        0x80,
    91                space:      "data",
    92                access:     "RW"
    93            }],
    94    
    95            ["INFOC", {
    96                comment:    "Information Memory C (flash)",
    97                name:       "INFOC",
    98                base:       0x1880,
    99                len:        0x80,
   100                space:      "data",
   101                access:     "RW"
   102            }],
   103    
   104            ["INFOB", {
   105                comment:    "Information Memory B (flash)",
   106                name:       "INFOB",
   107                base:       0x1900,
   108                len:        0x80,
   109                space:      "data",
   110                access:     "RW"
   111            }],
   112    
   113            ["INFOA", {
   114                comment:    "Information Memory A (flash)",
   115                name:       "INFOA",
   116                base:       0x1980,
   117                len:        0x80,
   118                space:      "data",
   119                access:     "RW"
   120            }],
   121    
   122            ["INT00", {
   123                comment: "Reserved Vector",
   124                name: "INT00",
   125                base: 0xFF80,
   126                len: 0x2,
   127                space: "data"
   128            }],
   129    
   130            ["INT01", {
   131                comment: "Reserved Vector",
   132                name: "INT01",
   133                base: 0xFF82,
   134                len: 0x2,
   135                space: "data"
   136            }],
   137    
   138            ["INT02", {
   139                comment: "Reserved Vector",
   140                name: "INT02",
   141                base: 0xFF84,
   142                len: 0x2,
   143                space: "data"
   144            }],
   145    
   146            ["INT03", {
   147                comment: "Reserved Vector",
   148                name: "INT03",
   149                base: 0xFF86,
   150                len: 0x2,
   151                space: "data"
   152            }],
   153    
   154            ["INT04", {
   155                comment: "Reserved Vector",
   156                name: "INT04",
   157                base: 0xFF88,
   158                len: 0x2,
   159                space: "data"
   160            }],
   161    
   162            ["INT05", {
   163                comment: "Reserved Vector",
   164                name: "INT05",
   165                base: 0xFF8A,
   166                len: 0x2,
   167                space: "data"
   168            }],
   169    
   170            ["INT06", {
   171                comment: "Reserved Vector",
   172                name: "INT06",
   173                base: 0xFF8C,
   174                len: 0x2,
   175                space: "data"
   176            }],
   177    
   178            ["INT07", {
   179                comment: "Reserved Vector",
   180                name: "INT07",
   181                base: 0xFF8E,
   182                len: 0x2,
   183                space: "data"
   184            }],
   185    
   186            ["INT08", {
   187                comment: "Reserved Vector",
   188                name: "INT08",
   189                base: 0xFF90,
   190                len: 0x2,
   191                space: "data"
   192            }],
   193    
   194            ["INT09", {
   195                comment: "Reserved Vector",
   196                name: "INT09",
   197                base: 0xFF92,
   198                len: 0x2,
   199                space: "data"
   200            }],
   201    
   202            ["INT10", {
   203                comment: "Reserved Vector",
   204                name: "INT10",
   205                base: 0xFF94,
   206                len: 0x2,
   207                space: "data"
   208            }],
   209    
   210            ["INT11", {
   211                comment: "Reserved Vector",
   212                name: "INT11",
   213                base: 0xFF96,
   214                len: 0x2,
   215                space: "data"
   216            }],
   217    
   218            ["INT12", {
   219                comment: "Reserved Vector",
   220                name: "INT12",
   221                base: 0xFF98,
   222                len: 0x2,
   223                space: "data"
   224            }],
   225    
   226            ["INT13", {
   227                comment: "Reserved Vector",
   228                name: "INT13",
   229                base: 0xFF9A,
   230                len: 0x2,
   231                space: "data"
   232            }],
   233    
   234            ["INT14", {
   235                comment: "Reserved Vector",
   236                name: "INT14",
   237                base: 0xFF9C,
   238                len: 0x2,
   239                space: "data"
   240            }],
   241    
   242            ["INT15", {
   243                comment: "Reserved Vector",
   244                name: "INT15",
   245                base: 0xFF9E,
   246                len: 0x2,
   247                space: "data"
   248            }],
   249    
   250            ["INT16", {
   251                comment: "Reserved Vector",
   252                name: "INT16",
   253                base: 0xFFA0,
   254                len: 0x2,
   255                space: "data"
   256            }],
   257    
   258            ["INT17", {
   259                comment: "Reserved Vector",
   260                name: "INT17",
   261                base: 0xFFA2,
   262                len: 0x2,
   263                space: "data"
   264            }],
   265    
   266            ["INT18", {
   267                comment: "Reserved Vector",
   268                name: "INT18",
   269                base: 0xFFA4,
   270                len: 0x2,
   271                space: "data"
   272            }],
   273    
   274            ["INT19", {
   275                comment: "Reserved Vector",
   276                name: "INT19",
   277                base: 0xFFA6,
   278                len: 0x2,
   279                space: "data"
   280            }],
   281    
   282            ["INT20", {
   283                comment: "Reserved Vector",
   284                name: "INT20",
   285                base: 0xFFA8,
   286                len: 0x2,
   287                space: "data"
   288            }],
   289    
   290            ["INT21", {
   291                comment: "Reserved Vector",
   292                name: "INT21",
   293                base: 0xFFAA,
   294                len: 0x2,
   295                space: "data"
   296            }],
   297    
   298            ["INT22", {
   299                comment: "Reserved Vector",
   300                name: "INT22",
   301                base: 0xFFAC,
   302                len: 0x2,
   303                space: "data"
   304            }],
   305    
   306            ["INT23", {
   307                comment: "Reserved Vector",
   308                name: "INT23",
   309                base: 0xFFAE,
   310                len: 0x2,
   311                space: "data"
   312            }],
   313    
   314            ["INT24", {
   315                comment: "Reserved Vector",
   316                name: "INT24",
   317                base: 0xFFB0,
   318                len: 0x2,
   319                space: "data"
   320            }],
   321    
   322            ["INT25", {
   323                comment: "Reserved Vector",
   324                name: "INT25",
   325                base: 0xFFB2,
   326                len: 0x2,
   327                space: "data"
   328            }],
   329    
   330            ["INT26", {
   331                comment: "Reserved Vector",
   332                name: "INT26",
   333                base: 0xFFB4,
   334                len: 0x2,
   335                space: "data"
   336            }],
   337    
   338            ["INT27", {
   339                comment: "Reserved Vector",
   340                name: "INT27",
   341                base: 0xFFB6,
   342                len: 0x2,
   343                space: "data"
   344            }],
   345    
   346            ["INT28", {
   347                comment: "Reserved Vector",
   348                name: "INT28",
   349                base: 0xFFB8,
   350                len: 0x2,
   351                space: "data"
   352            }],
   353    
   354            ["INT29", {
   355                comment: "Reserved Vector",
   356                name: "INT29",
   357                base: 0xFFBA,
   358                len: 0x2,
   359                space: "data"
   360            }],
   361    
   362            ["INT30", {
   363                comment: "Reserved Vector",
   364                name: "INT30",
   365                base: 0xFFBC,
   366                len: 0x2,
   367                space: "data"
   368            }],
   369    
   370            ["INT31", {
   371                comment: "Reserved Vector",
   372                name: "INT31",
   373                base: 0xFFBE,
   374                len: 0x2,
   375                space: "data"
   376            }],
   377    
   378            ["INT32", {
   379                comment: "Reserved Vector",
   380                name: "INT32",
   381                base: 0xFFC0,
   382                len: 0x2,
   383                space: "data"
   384            }],
   385    
   386            ["INT33", {
   387                comment: "Reserved Vector",
   388                name: "INT33",
   389                base: 0xFFC2,
   390                len: 0x2,
   391                space: "data"
   392            }],
   393    
   394            ["INT34", {
   395                comment: "Reserved Vector",
   396                name: "INT34",
   397                base: 0xFFC4,
   398                len: 0x2,
   399                space: "data"
   400            }],
   401    
   402            ["INT35", {
   403                comment: "Reserved Vector",
   404                name: "INT35",
   405                base: 0xFFC6,
   406                len: 0x2,
   407                space: "data"
   408            }],
   409    
   410            ["INT36", {
   411                comment: "Reserved Vector",
   412                name: "INT36",
   413                base: 0xFFC8,
   414                len: 0x2,
   415                space: "data"
   416            }],
   417    
   418            ["INT37", {
   419                comment: "Reserved Vector",
   420                name: "INT37",
   421                base: 0xFFCA,
   422                len: 0x2,
   423                space: "data"
   424            }],
   425    
   426            ["INT38", {
   427                comment: "Reserved Vector",
   428                name: "INT38",
   429                base: 0xFFCC,
   430                len: 0x2,
   431                space: "data"
   432            }],
   433    
   434            ["INT39", {
   435                comment: "Reserved Vector",
   436                name: "INT39",
   437                base: 0xFFCE,
   438                len: 0x2,
   439                space: "data"
   440            }],
   441    
   442            ["INT40", {
   443                comment: "Reserved Vector",
   444                name: "INT40",
   445                base: 0xFFD0,
   446                len: 0x2,
   447                space: "data"
   448            }],
   449    
   450            ["INT41", {
   451                comment: "RTC_A Vector",
   452                name: "INT41",
   453                base: 0xFFD2,
   454                len: 0x2,
   455                space: "data"
   456            }],
   457    
   458            ["INT42", {
   459                comment: "I/O Port P2 Vector",
   460                name: "INT42",
   461                base: 0xFFD4,
   462                len: 0x2,
   463                space: "data"
   464            }],
   465    
   466            ["INT43", {
   467                comment: "TA2 CCR1-CCR2 Vector",
   468                name: "INT43",
   469                base: 0xFFD6,
   470                len: 0x2,
   471                space: "data"
   472            }],
   473    
   474            ["INT44", {
   475                comment: "TA2 CCR0 Vector",
   476                name: "INT44",
   477                base: 0xFFD8,
   478                len: 0x2,
   479                space: "data"
   480            }],
   481    
   482            ["INT45", {
   483                comment: "USCI_B1 Receive/Transmit Vector",
   484                name: "INT45",
   485                base: 0xFFDA,
   486                len: 0x2,
   487                space: "data"
   488            }],
   489    
   490            ["INT46", {
   491                comment: "USCI_A1 Receive/Transmit Vector",
   492                name: "INT46",
   493                base: 0xFFDC,
   494                len: 0x2,
   495                space: "data"
   496            }],
   497    
   498            ["INT47", {
   499                comment: "I/O Port P1 Vector",
   500                name: "INT47",
   501                base: 0xFFDE,
   502                len: 0x2,
   503                space: "data"
   504            }],
   505    
   506            ["INT48", {
   507                comment: "TA1 CCR1-CCR2 Vector",
   508                name: "INT48",
   509                base: 0xFFE0,
   510                len: 0x2,
   511                space: "data"
   512            }],
   513    
   514            ["INT49", {
   515                comment: "TA1 CCR0 Vector",
   516                name: "INT49",
   517                base: 0xFFE2,
   518                len: 0x2,
   519                space: "data"
   520            }],
   521    
   522            ["INT50", {
   523                comment: "DMA Vector",
   524                name: "INT50",
   525                base: 0xFFE4,
   526                len: 0x2,
   527                space: "data"
   528            }],
   529    
   530            ["INT51", {
   531                comment: "USB_UBM Vector",
   532                name: "INT51",
   533                base: 0xFFE6,
   534                len: 0x2,
   535                space: "data"
   536            }],
   537    
   538            ["INT52", {
   539                comment: "TA0 CCR1-CCR4 Vector",
   540                name: "INT52",
   541                base: 0xFFE8,
   542                len: 0x2,
   543                space: "data"
   544            }],
   545    
   546            ["INT53", {
   547                comment: "TA0 CCR0 Vector",
   548                name: "INT53",
   549                base: 0xFFEA,
   550                len: 0x2,
   551                space: "data"
   552            }],
   553    
   554            ["INT54", {
   555                comment: "ADC12_A Vector",
   556                name: "INT54",
   557                base: 0xFFEC,
   558                len: 0x2,
   559                space: "data"
   560            }],
   561    
   562            ["INT55", {
   563                comment: "USCI_B0 Receive/Transmit Vector",
   564                name: "INT55",
   565                base: 0xFFEE,
   566                len: 0x2,
   567                space: "data"
   568            }],
   569    
   570            ["INT56", {
   571                comment: "USCI_A0 Receive/Transmit Vector",
   572                name: "INT56",
   573                base: 0xFFF0,
   574                len: 0x2,
   575                space: "data"
   576            }],
   577    
   578            ["INT57", {
   579                comment: "Watchdog Timer_A Interval Timer Mode Vector",
   580                name: "INT57",
   581                base: 0xFFF2,
   582                len: 0x2,
   583                space: "data"
   584            }],
   585    
   586            ["INT58", {
   587                comment: "TB0 CCR1-CCR6 Vector",
   588                name: "INT58",
   589                base: 0xFFF4,
   590                len: 0x2,
   591                space: "data"
   592            }],
   593    
   594            ["INT59", {
   595                comment: "TB0 CCR0 Vector",
   596                name: "INT59",
   597                base: 0xFFF6,
   598                len: 0x2,
   599                space: "data"
   600            }],
   601    
   602            ["INT60", {
   603                comment: "Comp_B Vector",
   604                name: "INT60",
   605                base: 0xFFF8,
   606                len: 0x2,
   607                space: "data"
   608            }],
   609    
   610            ["INT61", {
   611                comment: "User NMI Vector",
   612                name: "INT61",
   613                base: 0xFFFA,
   614                len: 0x2,
   615                space: "data"
   616            }],
   617    
   618            ["INT62", {
   619                comment: "System NMI Vector",
   620                name: "INT62",
   621                base: 0xFFFC,
   622                len: 0x2,
   623                space: "data"
   624            }],
   625    
   626            ["RESET", {
   627                comment: "Reset Vector",
   628                name: "RESET",
   629                base: 0xFFFE,
   630                len:  0x2,
   631                space: "data"
   632            }],
   633        ];
   634    }