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32
33 import ti.catalog.msp430.peripherals.communication.USI as USI;
34 import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
35
36 /*!
37 * ======== GPIO for MSP430G2x31 ========
38 * MSP430 General Purpose Input Output Ports
39 */
40 metaonly module GPIO_MSP430G2x31 inherits IGPIO {
41 /*!
42 * ======== create ========
43 * Create an instance of this peripheral.
44 */
45 create(USI.Instance usi, ADC10.Instance adc10);
46
47 instance:
48 /*! @_nodoc */
49 config USI.Instance usi;
50
51 /*! @_nodoc */
52 config ADC10.Instance adc10;
53
54 /*! Define an array to describe all device pins. The 1st dimension
55 * denotes the port, the second the pin on that port. On an
56 * MSP430G2x31 device, there are 8 + 2 = 10 pins total.
57 */
58
59 60
61 62
63 config DevicePin_t devicePins[2][8];
64
65 /*! Implementation of Device Pin Functional Configuration */
66 override config DevicePinFunctionSetting_t devicePinSetting[2][8];
67
68 /*! Determine if each Register needs to be forced set or not */
69 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
70 [
71 { register : "P1OUT" , regForceSet : true },
72 { register : "P1SEL" , regForceSet : false },
73 { register : "P1DIR" , regForceSet : true },
74 { register : "P1REN" , regForceSet : false },
75 { register : "P1IES" , regForceSet : true },
76 { register : "P1IFG" , regForceSet : true },
77 { register : "P1IE" , regForceSet : false },
78 { register : "P2OUT" , regForceSet : true },
79 { register : "P2SEL" , regForceSet : false },
80 { register : "P2DIR" , regForceSet : true },
81 { register : "P2REN" , regForceSet : false },
82 { register : "P2IES" , regForceSet : true },
83 { register : "P2IFG" , regForceSet : true },
84 { register : "P2IE" , regForceSet : false }
85 ];
86
87 88 89 90 91 92
93
94 /*! Port 1 Output Register */
95 config GpioBits8PxOut_t P1OUT = {
96 Bit0 : BIT0_OFF,
97 Bit1 : BIT1_OFF,
98 Bit2 : BIT2_OFF,
99 Bit3 : BIT3_OFF,
100 Bit4 : BIT4_OFF,
101 Bit5 : BIT5_OFF,
102 Bit6 : BIT6_OFF,
103 Bit7 : BIT7_OFF
104 };
105
106 /*! Port 1 Port Select Register */
107 config GpioBits8PxSel_t P1SEL = {
108 Bit0 : BIT0_OFF,
109 Bit1 : BIT1_OFF,
110 Bit2 : BIT2_OFF,
111 Bit3 : BIT3_OFF,
112 Bit4 : BIT4_OFF,
113 Bit5 : BIT5_OFF,
114 Bit6 : BIT6_OFF,
115 Bit7 : BIT7_OFF
116 };
117
118 /*! Port 1 Direction Register */
119 config GpioBits8PxDir_t P1DIR = {
120 Bit0 : BIT0_OFF,
121 Bit1 : BIT1_OFF,
122 Bit2 : BIT2_OFF,
123 Bit3 : BIT3_OFF,
124 Bit4 : BIT4_OFF,
125 Bit5 : BIT5_OFF,
126 Bit6 : BIT6_OFF,
127 Bit7 : BIT7_OFF
128 };
129
130 /*! Port 1 Resistor Enable Register */
131 config GpioBits8PxRen_t P1REN = {
132 Bit0 : BIT0_OFF,
133 Bit1 : BIT1_OFF,
134 Bit2 : BIT2_OFF,
135 Bit3 : BIT3_OFF,
136 Bit4 : BIT4_OFF,
137 Bit5 : BIT5_OFF,
138 Bit6 : BIT6_OFF,
139 Bit7 : BIT7_OFF
140 };
141
142 /*! Port 2 Output Register */
143 config GpioBits8PxOut_t P2OUT = {
144 Bit0 : BIT0_OFF,
145 Bit1 : BIT1_OFF,
146 Bit2 : BIT2_OFF,
147 Bit3 : BIT3_OFF,
148 Bit4 : BIT4_OFF,
149 Bit5 : BIT5_OFF,
150 Bit6 : BIT6_OFF,
151 Bit7 : BIT7_OFF
152 };
153
154 /*! Port 2 Port Select Register */
155 config GpioBits8PxSel_t P2SEL = {
156 Bit0 : BIT0_OFF,
157 Bit1 : BIT1_OFF,
158 Bit2 : BIT2_OFF,
159 Bit3 : BIT3_OFF,
160 Bit4 : BIT4_OFF,
161 Bit5 : BIT5_OFF,
162 Bit6 : BIT6,
163 Bit7 : BIT7
164 };
165
166 /*! Port 2 Direction Register */
167 config GpioBits8PxDir_t P2DIR = {
168 Bit0 : BIT0_OFF,
169 Bit1 : BIT1_OFF,
170 Bit2 : BIT2_OFF,
171 Bit3 : BIT3_OFF,
172 Bit4 : BIT4_OFF,
173 Bit5 : BIT5_OFF,
174 Bit6 : BIT6_OFF,
175 Bit7 : BIT7_OFF
176 };
177
178 /*! Port 2 Resistor Enable Register */
179 config GpioBits8PxRen_t P2REN = {
180 Bit0 : BIT0_OFF,
181 Bit1 : BIT1_OFF,
182 Bit2 : BIT2_OFF,
183 Bit3 : BIT3_OFF,
184 Bit4 : BIT4_OFF,
185 Bit5 : BIT5_OFF,
186 Bit6 : BIT6_OFF,
187 Bit7 : BIT7_OFF
188 };
189 }