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32
33 /*!
34 * ======== Timer0_A3 ========
35 * MSP430 Timer0_A3 timer
36 */
37 metaonly module Timer0_A3 inherits ITimer_A {
38
39 instance:
40 /*! TA0CTL, Timer_A3 Control Register */
41 config TACTL_t TA0CTL = {
42 TASSEL : TASSEL_0,
43 ID : ID_0,
44 MC : MC_0,
45 TACLR : TACLR_OFF,
46 TAIE : TAIE_OFF,
47 TAIFG : TAIFG_OFF
48 };
49
50 /*! TA0CCTL0, Capture/Compare Control Register 0 */
51 config TACCTLx_t TA0CCTL0 = {
52 CM : CM_0,
53 CCIS : CCIS_0,
54 SCS : SCS_OFF,
55 SCCI : SCCI_OFF,
56 CAP : CAP_OFF,
57 OUTMOD : OUTMOD_0,
58 CCIE : CCIE_OFF,
59 CCI : CCI_OFF,
60 OUT : OUT_OFF,
61 COV : COV_OFF,
62 CCIFG : CCIFG_OFF
63 };
64
65 /*! TA0CCTL1, Capture/Compare Control Register 1 */
66 config TACCTLx_t TA0CCTL1 = {
67 CM : CM_0,
68 CCIS : CCIS_0,
69 SCS : SCS_OFF,
70 SCCI : SCCI_OFF,
71 CAP : CAP_OFF,
72 OUTMOD : OUTMOD_0,
73 CCIE : CCIE_OFF,
74 CCI : CCI_OFF,
75 OUT : OUT_OFF,
76 COV : COV_OFF,
77 CCIFG : CCIFG_OFF
78 };
79
80 /*! TA0CCTL2, Capture/Compare Control Register 2 */
81 config TACCTLx_t TA0CCTL2 = {
82 CM : CM_0,
83 CCIS : CCIS_0,
84 SCS : SCS_OFF,
85 SCCI : SCCI_OFF,
86 CAP : CAP_OFF,
87 OUTMOD : OUTMOD_0,
88 CCIE : CCIE_OFF,
89 CCI : CCI_OFF,
90 OUT : OUT_OFF,
91 COV : COV_OFF,
92 CCIFG : CCIFG_OFF
93 };
94
95 /*! TA0CCR0, Timer_A Capture/Compare Register 0 */
96 config Bits16 TA0CCR0 = 0;
97 /*! TA0CCR1, Timer_A Capture/Compare Register 1 */
98 config Bits16 TA0CCR1 = 0;
99 /*! TA0CCR2, Timer_A Capture/Compare Register 2 */
100 config Bits16 TA0CCR2 = 0;
101
102 /*! Timer interrupt enables */
103 config regIntVect_t interruptSource[4];
104
105 /*! Determine if each Register needs to be forced set or not */
106 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
107 [
108 { register : "TA0CTL" , regForceSet : false },
109 { register : "TA0CCTL0" , regForceSet : false },
110 { register : "TA0CCTL1" , regForceSet : false },
111 { register : "TA0CCTL2" , regForceSet : false },
112 { register : "TA0CCR0" , regForceSet : false },
113 { register : "TA0CCR1" , regForceSet : false },
114 { register : "TA0CCR2" , regForceSet : false }
115 ];
116 }