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32
33
34 /*!
35 * ======== GPIO for MSP430G2x03 ========
36 * MSP430 General Purpose Input Output Ports
37 */
38 metaonly module GPIO_MSP430G2x03 inherits IGPIO {
39 /*!
40 * ======== create ========
41 * Create an instance of this peripheral. Use a customized
42 * init function so that we can get access to the
43 * instance.
44 */
45 create();
46
47 instance:
48
49 /*! Define an array to describe all device pins. The 1st dimension
50 * denotes the port, the second the pin on that port. On an
51 * MSP430G2x03 device, there are 3 x 8 = 24 pins total.
52 */
53
54 55
56 57
58 config DevicePin_t devicePins[3][8];
59
60 /*! Implementation of Device Pin Functional Configuration */
61 override config DevicePinFunctionSetting_t devicePinSetting[3][8];
62
63 /*! Determine if each Register needs to be forced set or not */
64 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
65 [
66 { register : "P1OUT" , regForceSet : true },
67 { register : "P1SEL" , regForceSet : false },
68 { register : "P1SEL2" , regForceSet: false },
69 { register : "P1DIR" , regForceSet : true },
70 { register : "P1REN" , regForceSet : false },
71 { register : "P1IES" , regForceSet : true },
72 { register : "P1IFG" , regForceSet : true },
73 { register : "P1IE" , regForceSet : false },
74 { register : "P2OUT" , regForceSet : true },
75 { register : "P2SEL" , regForceSet : false },
76 { register : "P2SEL2", regForceSet : false },
77 { register : "P2DIR" , regForceSet : true },
78 { register : "P2REN" , regForceSet : false },
79 { register : "P2IES" , regForceSet : true },
80 { register : "P2IFG" , regForceSet : true },
81 { register : "P2IE" , regForceSet : false },
82 { register : "P3OUT" , regForceSet : true },
83 { register : "P3SEL" , regForceSet : false },
84 { register : "P3SEL2" , regForceSet: false },
85 { register : "P3DIR" , regForceSet : true },
86 { register : "P3REN" , regForceSet : false },
87 ];
88
89 90 91 92 93 94
95
96 /*! Port 1 Output Register */
97 config GpioBits8PxOut_t P1OUT = {
98 Bit0 : BIT0_OFF,
99 Bit1 : BIT1_OFF,
100 Bit2 : BIT2_OFF,
101 Bit3 : BIT3_OFF,
102 Bit4 : BIT4_OFF,
103 Bit5 : BIT5_OFF,
104 Bit6 : BIT6_OFF,
105 Bit7 : BIT7_OFF
106 };
107
108 /*! Port 1 Port Select Register */
109 config GpioBits8PxSel_t P1SEL = {
110 Bit0 : BIT0_OFF,
111 Bit1 : BIT1_OFF,
112 Bit2 : BIT2_OFF,
113 Bit3 : BIT3_OFF,
114 Bit4 : BIT4_OFF,
115 Bit5 : BIT5_OFF,
116 Bit6 : BIT6_OFF,
117 Bit7 : BIT7_OFF
118 };
119
120 /*! Port 1 Port Select 2 Register */
121 config GpioBits8PxSel_t P1SEL2 = {
122 Bit0 : BIT0_OFF,
123 Bit1 : BIT1_OFF,
124 Bit2 : BIT2_OFF,
125 Bit3 : BIT3_OFF,
126 Bit4 : BIT4_OFF,
127 Bit5 : BIT5_OFF,
128 Bit6 : BIT6_OFF,
129 Bit7 : BIT7_OFF
130 };
131
132 /*! Port 1 Direction Register */
133 config GpioBits8PxDir_t P1DIR = {
134 Bit0 : BIT0_OFF,
135 Bit1 : BIT1_OFF,
136 Bit2 : BIT2_OFF,
137 Bit3 : BIT3_OFF,
138 Bit4 : BIT4_OFF,
139 Bit5 : BIT5_OFF,
140 Bit6 : BIT6_OFF,
141 Bit7 : BIT7_OFF
142 };
143
144 /*! Port 1 Resistor Enable Register */
145 config GpioBits8PxRen_t P1REN = {
146 Bit0 : BIT0_OFF,
147 Bit1 : BIT1_OFF,
148 Bit2 : BIT2_OFF,
149 Bit3 : BIT3_OFF,
150 Bit4 : BIT4_OFF,
151 Bit5 : BIT5_OFF,
152 Bit6 : BIT6_OFF,
153 Bit7 : BIT7_OFF
154 };
155
156 /*! Port 2 Output Register */
157 config GpioBits8PxOut_t P2OUT = {
158 Bit0 : BIT0_OFF,
159 Bit1 : BIT1_OFF,
160 Bit2 : BIT2_OFF,
161 Bit3 : BIT3_OFF,
162 Bit4 : BIT4_OFF,
163 Bit5 : BIT5_OFF,
164 Bit6 : BIT6_OFF,
165 Bit7 : BIT7_OFF
166 };
167
168 /*! Port 2 Port Select Register */
169 config GpioBits8PxSel_t P2SEL = {
170 Bit0 : BIT0_OFF,
171 Bit1 : BIT1_OFF,
172 Bit2 : BIT2_OFF,
173 Bit3 : BIT3_OFF,
174 Bit4 : BIT4_OFF,
175 Bit5 : BIT5_OFF,
176 Bit6 : BIT6,
177 Bit7 : BIT7
178 };
179
180 /*! Port 2 Port Select 2 Register */
181 config GpioBits8PxSel2_t P2SEL2 = {
182 Bit0 : BIT0_OFF,
183 Bit1 : BIT1_OFF,
184 Bit2 : BIT2_OFF,
185 Bit3 : BIT3_OFF,
186 Bit4 : BIT4_OFF,
187 Bit5 : BIT5_OFF,
188 Bit6 : BIT6_OFF,
189 Bit7 : BIT7_OFF
190 };
191
192 /*! Port 2 Direction Register */
193 config GpioBits8PxDir_t P2DIR = {
194 Bit0 : BIT0_OFF,
195 Bit1 : BIT1_OFF,
196 Bit2 : BIT2_OFF,
197 Bit3 : BIT3_OFF,
198 Bit4 : BIT4_OFF,
199 Bit5 : BIT5_OFF,
200 Bit6 : BIT6_OFF,
201 Bit7 : BIT7_OFF
202 };
203
204 /*! Port 2 Resistor Enable Register */
205 config GpioBits8PxRen_t P2REN = {
206 Bit0 : BIT0_OFF,
207 Bit1 : BIT1_OFF,
208 Bit2 : BIT2_OFF,
209 Bit3 : BIT3_OFF,
210 Bit4 : BIT4_OFF,
211 Bit5 : BIT5_OFF,
212 Bit6 : BIT6_OFF,
213 Bit7 : BIT7_OFF
214 };
215
216 /*! Port 3 Output Register */
217 config GpioBits8PxOut_t P3OUT = {
218 Bit0 : BIT0_OFF,
219 Bit1 : BIT1_OFF,
220 Bit2 : BIT2_OFF,
221 Bit3 : BIT3_OFF,
222 Bit4 : BIT4_OFF,
223 Bit5 : BIT5_OFF,
224 Bit6 : BIT6_OFF,
225 Bit7 : BIT7_OFF
226 };
227
228 /*! Port 3 Port Select Register */
229 config GpioBits8PxSel_t P3SEL = {
230 Bit0 : BIT0_OFF,
231 Bit1 : BIT1_OFF,
232 Bit2 : BIT2_OFF,
233 Bit3 : BIT3_OFF,
234 Bit4 : BIT4_OFF,
235 Bit5 : BIT5_OFF,
236 Bit6 : BIT6_OFF,
237 Bit7 : BIT7_OFF
238 };
239
240 /*! Port 3 Port Select 2 Register */
241 config GpioBits8PxSel2_t P3SEL2 = {
242 Bit0 : BIT0_OFF,
243 Bit1 : BIT1_OFF,
244 Bit2 : BIT2_OFF,
245 Bit3 : BIT3_OFF,
246 Bit4 : BIT4_OFF,
247 Bit5 : BIT5_OFF,
248 Bit6 : BIT6_OFF,
249 Bit7 : BIT7_OFF
250 };
251
252 /*! Port 3 Direction Register */
253 config GpioBits8PxDir_t P3DIR = {
254 Bit0 : BIT0_OFF,
255 Bit1 : BIT1_OFF,
256 Bit2 : BIT2_OFF,
257 Bit3 : BIT3_OFF,
258 Bit4 : BIT4_OFF,
259 Bit5 : BIT5_OFF,
260 Bit6 : BIT6_OFF,
261 Bit7 : BIT7_OFF
262 };
263
264 /*! Port 3 Resistor Enable Register */
265 config GpioBits8PxRen_t P3REN = {
266 Bit0 : BIT0_OFF,
267 Bit1 : BIT1_OFF,
268 Bit2 : BIT2_OFF,
269 Bit3 : BIT3_OFF,
270 Bit4 : BIT4_OFF,
271 Bit5 : BIT5_OFF,
272 Bit6 : BIT6_OFF,
273 Bit7 : BIT7_OFF
274 };
275 }