1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    35    
    36    /*!
    37     *  ======== GPIO for MSP430G2230 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430G2230 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral.
    44         */
    45        create(USI.Instance usi, ADC10.Instance adc10);
    46    
    47    instance:
    48        /*! @_nodoc */
    49        config USI.Instance usi;
    50    
    51        /*! @_nodoc */
    52        config ADC10.Instance adc10;
    53    
    54       /*! Define an array to describe all device pins. The 1st dimension
    55        *  denotes the port, the second the pin on that port. On an
    56        *  MSP430G2230 device, there are 8 + 1 = 8 pins total.
    57        */
    58    
    59        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    60         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    61        /* TODO: For this device the config variable definition has been moved into the
    62         * corresponding XS file due to its size. This needs a more consistent solution. */
    63        config DevicePin_t devicePins[1][8];
    64    
    65        /*! Implementation of Device Pin Functional Configuration */
    66        override config DevicePinFunctionSetting_t devicePinSetting[1][8];
    67    
    68        /*! Determine if each Register needs to be forced set or not */
    69        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    70        [
    71            { register : "P1OUT" , regForceSet : true  },
    72            { register : "P1SEL" , regForceSet : false },
    73            { register : "P1DIR" , regForceSet : true  },
    74            { register : "P1REN" , regForceSet : false },
    75            { register : "P1IES" , regForceSet : true },
    76            { register : "P1IFG" , regForceSet : true },
    77            { register : "P1IE"  , regForceSet : false }
    78        ];
    79    
    80        /*
    81         *  GPIO Digital I/O Registers
    82         *
    83         *  One GIPO instance defines the configuration of an entire,
    84         *  8-bit wide digital I/O port.
    85         */
    86    
    87        /*! Port 1 Output Register */
    88        config GpioBits8PxOut_t P1OUT = {
    89            Bit0        : BIT0_OFF,
    90            Bit1        : BIT1_OFF,
    91            Bit2        : BIT2_OFF,
    92            Bit3        : BIT3_OFF,
    93            Bit4        : BIT4_OFF,
    94            Bit5        : BIT5_OFF,
    95            Bit6        : BIT6_OFF,
    96            Bit7        : BIT7_OFF
    97        };
    98    
    99        /*! Port 1 Port Select Register */
   100        config GpioBits8PxSel_t P1SEL = {
   101            Bit0        : BIT0_OFF,
   102            Bit1        : BIT1_OFF,
   103            Bit2        : BIT2_OFF,
   104            Bit3        : BIT3_OFF,
   105            Bit4        : BIT4_OFF,
   106            Bit5        : BIT5_OFF,
   107            Bit6        : BIT6_OFF,
   108            Bit7        : BIT7_OFF
   109        };
   110    
   111        /*! Port 1 Direction Register */
   112        config GpioBits8PxDir_t P1DIR = {
   113            Bit0        : BIT0_OFF,
   114            Bit1        : BIT1_OFF,
   115            Bit2        : BIT2_OFF,
   116            Bit3        : BIT3_OFF,
   117            Bit4        : BIT4_OFF,
   118            Bit5        : BIT5_OFF,
   119            Bit6        : BIT6_OFF,
   120            Bit7        : BIT7_OFF
   121        };
   122    
   123        /*! Port 1 Resistor Enable Register */
   124        config GpioBits8PxRen_t P1REN = {
   125            Bit0        : BIT0_OFF,
   126            Bit1        : BIT1_OFF,
   127            Bit2        : BIT2_OFF,
   128            Bit3        : BIT3_OFF,
   129            Bit4        : BIT4_OFF,
   130            Bit5        : BIT5_OFF,
   131            Bit6        : BIT6_OFF,
   132            Bit7        : BIT7_OFF
   133        };
   134    }