1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    35    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    36    
    37    /*!
    38     *  ======== GPIO for MSP430G2x52 ========
    39     *  MSP430 General Purpose Input Output Ports
    40     */
    41    metaonly module GPIO_MSP430G2x52 inherits IGPIO {
    42        /*!
    43         *  ======== create ========
    44         *  Create an instance of these peripherals.
    45         */
    46        create(USI.Instance usi, Comparator.Instance comparator, ADC10.Instance adc10);
    47    
    48    instance:
    49        /*! @_nodoc */
    50        config USI.Instance usi;
    51    
    52        /*! @_nodoc */
    53        config Comparator.Instance comparator;
    54    
    55        /*! @_nodoc */
    56        config ADC10.Instance adc10;
    57    
    58       /*! Define an array to describe all device pins. The 1st dimension
    59        *  denotes the port, the second the pin on that port. On an
    60        *  MSP430G2x52 device, there are 8 + 8 = 16 pins total.
    61        */
    62    
    63        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    64         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    65        /* TODO: For this device the config variable definition has been moved into the
    66         * corresponding XS file due to its size. This needs a more consistent solution. */
    67        config DevicePin_t devicePins[2][8];
    68    
    69        /*! Implementation of Device Pin Functional Configuration */
    70        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    71    
    72        /*! Determine if each Register needs to be forced set or not */
    73        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    74        [
    75            { register : "P1OUT" , regForceSet : true  },
    76            { register : "P1SEL" , regForceSet : false },
    77            { register : "P1SEL2", regForceSet : false },
    78            { register : "P1DIR" , regForceSet : true  },
    79            { register : "P1REN" , regForceSet : false },
    80            { register : "P1IES" , regForceSet : true  },
    81            { register : "P1IFG" , regForceSet : true  },
    82            { register : "P1IE"  , regForceSet : false },
    83            { register : "P2OUT" , regForceSet : true  },
    84            { register : "P2SEL" , regForceSet : false },
    85            { register : "P2SEL2", regForceSet : false },
    86            { register : "P2DIR" , regForceSet : true  },
    87            { register : "P2REN" , regForceSet : false },
    88            { register : "P2IES" , regForceSet : true  },
    89            { register : "P2IFG" , regForceSet : true  },
    90            { register : "P2IE"  , regForceSet : false }
    91        ];
    92    
    93        /*
    94         *  GPIO Digital I/O Registers
    95         *
    96         *  One GIPO instance defines the configuration of an entire,
    97         *  8-bit wide digital I/O port.
    98         */
    99    
   100        /*! Port 1 Output Register */
   101        config GpioBits8PxOut_t P1OUT = {
   102            Bit0        : BIT0_OFF,
   103            Bit1        : BIT1_OFF,
   104            Bit2        : BIT2_OFF,
   105            Bit3        : BIT3_OFF,
   106            Bit4        : BIT4_OFF,
   107            Bit5        : BIT5_OFF,
   108            Bit6        : BIT6_OFF,
   109            Bit7        : BIT7_OFF
   110        };
   111    
   112        /*! Port 1 Port Select Register */
   113        config GpioBits8PxSel_t P1SEL = {
   114            Bit0        : BIT0_OFF,
   115            Bit1        : BIT1_OFF,
   116            Bit2        : BIT2_OFF,
   117            Bit3        : BIT3_OFF,
   118            Bit4        : BIT4_OFF,
   119            Bit5        : BIT5_OFF,
   120            Bit6        : BIT6_OFF,
   121            Bit7        : BIT7_OFF
   122        };
   123    
   124        /*! Port 1 Port Select 2 Register */
   125        config GpioBits8PxSel2_t P1SEL2 = {
   126            Bit0        : BIT0_OFF,
   127            Bit1        : BIT1_OFF,
   128            Bit2        : BIT2_OFF,
   129            Bit3        : BIT3_OFF,
   130            Bit4        : BIT4_OFF,
   131            Bit5        : BIT5_OFF,
   132            Bit6        : BIT6_OFF,
   133            Bit7        : BIT7_OFF
   134        };
   135    
   136        /*! Port 1 Direction Register */
   137        config GpioBits8PxDir_t P1DIR = {
   138            Bit0        : BIT0_OFF,
   139            Bit1        : BIT1_OFF,
   140            Bit2        : BIT2_OFF,
   141            Bit3        : BIT3_OFF,
   142            Bit4        : BIT4_OFF,
   143            Bit5        : BIT5_OFF,
   144            Bit6        : BIT6_OFF,
   145            Bit7        : BIT7_OFF
   146        };
   147    
   148        /*! Port 1 Resistor Enable Register */
   149        config GpioBits8PxRen_t P1REN = {
   150            Bit0        : BIT0_OFF,
   151            Bit1        : BIT1_OFF,
   152            Bit2        : BIT2_OFF,
   153            Bit3        : BIT3_OFF,
   154            Bit4        : BIT4_OFF,
   155            Bit5        : BIT5_OFF,
   156            Bit6        : BIT6_OFF,
   157            Bit7        : BIT7_OFF
   158        };
   159    
   160        /*! Port 2 Output Register */
   161        config GpioBits8PxOut_t P2OUT = {
   162            Bit0        : BIT0_OFF,
   163            Bit1        : BIT1_OFF,
   164            Bit2        : BIT2_OFF,
   165            Bit3        : BIT3_OFF,
   166            Bit4        : BIT4_OFF,
   167            Bit5        : BIT5_OFF,
   168            Bit6        : BIT6_OFF,
   169            Bit7        : BIT7_OFF
   170        };
   171    
   172        /*! Port 2 Port Select Register */
   173        config GpioBits8PxSel_t P2SEL = {
   174            Bit0        : BIT0_OFF,
   175            Bit1        : BIT1_OFF,
   176            Bit2        : BIT2_OFF,
   177            Bit3        : BIT3_OFF,
   178            Bit4        : BIT4_OFF,
   179            Bit5        : BIT5_OFF,
   180            Bit6        : BIT6,         /* POR default for all 2xx devices */
   181            Bit7        : BIT7          /* POR default for all 2xx devices */
   182        };
   183    
   184        /*! Port 2 Port Select 2 Register */
   185        config GpioBits8PxSel2_t P2SEL2 = {
   186            Bit0        : BIT0_OFF,
   187            Bit1        : BIT1_OFF,
   188            Bit2        : BIT2_OFF,
   189            Bit3        : BIT3_OFF,
   190            Bit4        : BIT4_OFF,
   191            Bit5        : BIT5_OFF,
   192            Bit6        : BIT6_OFF,
   193            Bit7        : BIT7_OFF
   194        };
   195    
   196        /*! Port 2 Direction Register */
   197        config GpioBits8PxDir_t P2DIR = {
   198            Bit0        : BIT0_OFF,
   199            Bit1        : BIT1_OFF,
   200            Bit2        : BIT2_OFF,
   201            Bit3        : BIT3_OFF,
   202            Bit4        : BIT4_OFF,
   203            Bit5        : BIT5_OFF,
   204            Bit6        : BIT6_OFF,
   205            Bit7        : BIT7_OFF
   206        };
   207    
   208        /*! Port 2 Resistor Enable Register */
   209        config GpioBits8PxRen_t P2REN = {
   210            Bit0        : BIT0_OFF,
   211            Bit1        : BIT1_OFF,
   212            Bit2        : BIT2_OFF,
   213            Bit3        : BIT3_OFF,
   214            Bit4        : BIT4_OFF,
   215            Bit5        : BIT5_OFF,
   216            Bit6        : BIT6_OFF,
   217            Bit7        : BIT7_OFF
   218        };
   219    }