1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    
    33    /*!
    34     *  ======== IOA ========
    35     *  MSP430 General Purpose Operational Amplifier
    36     */
    37    metaonly interface IOA inherits xdc.platform.IPeripheral {
    38    
    39        /*! Inverting input selection */
    40        enum OAN_t {
    41          OAN_0 = (0*0x400u),       /*! OAxI0 */
    42          OAN_1 = (1*0x400u),       /*! OAxI1 */
    43          OAN_2 = (2*0x400u),       /*! OAxI2 */
    44          OAN_3 = 3*0x400u          /*! OAxI3 */
    45        };
    46    
    47        /*! Non-inverting input selection */
    48        enum OAP_t {
    49          OAP_0 = (0*0x400u),       /*! OAxI0 */
    50          OAP_1 = (1*0x400u),       /*! OAxI1 */
    51          OAP_2 = (2*0x400u),       /*! OAxI2 */
    52          OAP_3 = 3*0x400u          /*! OAxI3 */
    53        };
    54    
    55        /*! Slew rate select */
    56        enum OAPM_t {
    57          OAPM_0 = (0*0x400u),      /*! Off, output high Z */
    58          OAPM_1 = (1*0x400u),      /*! Slow */
    59          OAPM_2 = (2*0x400u),      /*! Medium */
    60          OAPM_3 = 3*0x400u         /*! Fast */
    61        };
    62    
    63        enum OAADC0_t {
    64          OAADC0_OFF = (0x00),      /*! OAx output to ADC12 input channel select 0 */
    65          OAADC0 = 0x01             /*! OAx output to ADC12 input channel select 0 */
    66        };
    67    
    68        enum OAADC1_t {
    69          OAADC1_OFF = (0x00),      /*! OAx output to ADC12 input channel select 1 */
    70          OAADC1 = 0x02             /*! OAx output to ADC12 input channel select 1 */
    71        };
    72    
    73        /*! OAx feedback resistor select */
    74        enum OAFBR_t {
    75          OAFBR_0 = (0*0x100u),     /*! OAx Feedback resistor: Tap 0 */
    76          OAFBR_1 = (1*0x100u),     /*! OAx Feedback resistor: Tap 1 */
    77          OAFBR_2 = (2*0x100u),     /*! OAx Feedback resistor: Tap 2 */
    78          OAFBR_3 = (3*0x100u),     /*! OAx Feedback resistor: Tap 3 */
    79          OAFBR_4 = (4*0x100u),     /*! OAx Feedback resistor: Tap 4 */
    80          OAFBR_5 = (5*0x100u),     /*! OAx Feedback resistor: Tap 5 */
    81          OAFBR_6 = (6*0x100u),     /*! OAx Feedback resistor: Tap 6 */
    82          OAFBR_7 = 7*0x100u        /*! OAx Feedback resistor: Tap 7 */
    83        };
    84    
    85        /*! OAx function control */
    86        enum OAFC_t {
    87          OAFC_0 = (0*0x100u),      /*! General Purpose */
    88          OAFC_1 = (1*0x100u),      /*! Unity gain buffer for three-opamp differential amplifier */
    89          OAFC_2 = (2*0x100u),      /*! Unity gain buffer */
    90          OAFC_3 = (3*0x100u),      /*! Comparator */
    91          OAFC_4 = (4*0x100u),      /*! Non-inverting PGA */
    92          OAFC_5 = (5*0x100u),      /*! Cascaded non-inverting PGA */
    93          OAFC_6 = (6*0x100u),      /*! Inverting PGA */
    94          OAFC_7 = 7*0x100u         /*! Differential amplifier */
    95        };
    96    
    97        enum OARRIP_t {
    98          OARRIP_OFF = 0x00,        /*! Rtop = AVss, Rbottom = AVcc */
    99          OARRIP     = 0x01         /*! Rtop = AVcc, Rbottom = AVss */
   100        };
   101    
   102        enum OANEXT_t {
   103          OANEXT_OFF = 0x00,        /*! OAx inverting input not externally available */
   104          OANEXT     = 0x02         /*! OAx inverting input externally available */
   105        };
   106    
   107       /*!
   108        *  ======== OAxCTL0_t ========
   109        *  Opamp Control Register 0 Definition
   110        *
   111        *  @see #OAxCTL0_t
   112        */
   113        struct OAxCTL0_t {
   114          OAN_t     OAN;            /*! Inverting input select. These bits select the input signal for the OA inverting
   115                                      * input.
   116                                      *  00  OAxI0
   117                                      *  01  OAxI1
   118                                      *  10  OAxIA (see the device-specific data sheet for connected signal)
   119                                      *  11  OAxIB (see the device-specific data sheet for connected signal) */
   120          OAP_t     OAP;            /*! Non-inverting input select. These bits select the input signal for the OA
   121                                      * non-inverting input.
   122                                      *  00  OAxI0
   123                                      *  01  OA0I1
   124                                      *  10  OAxIA (see the device-specific data sheet for connected signal)
   125                                      *  11  OAxIB (see the device-specific data sheet for connected signal) */
   126          OAPM_t    OAPM;           /*! Slew rate select. These bits select the slew rate vs. current consumption
   127                                      * for the OA.
   128                                      *  00  Off, output high Z
   129                                      *  01  Slow
   130                                      *  10  Medium
   131                                      *  11  Fast */
   132          OAADC0_t  OAADC0;         /*! OA output select. These bits, together with the OAFCx bits, control the
   133                                      * routing of the OAx output when OAPMx > 0.
   134                                      * When OAFCx = 0:
   135                                      *  00  OAxOUT connected to external pins and ADC input A1, A3, or A5
   136                                      *  01  OAxOUT connected to external pins and ADC input A12, A13, or A14
   137                                      *  10  OAxOUT connected to external pins and ADC input A1, A3, or A5
   138                                      *  11  OAxOUT connected to external pins and ADC input A12, A13, or A14
   139                                      * When OAFCx > 0:
   140                                      *  00  OAxOUT used for internal routing only
   141                                      *  01  OAxOUT connected to external pins and ADC input A12, A13, or A14
   142                                      *  10  OAxOUT connected to external pins and ADC input A1, A3, or A5
   143                                      *  11  OAxOUT connected internally to ADC input A12, A13 , or A14.
   144                                      * External A12, A13, or A14 pin connections are disconnected from the
   145                                      * ADC. */
   146          OAADC1_t  OAADC1;         /*! OA output select. These bits, together with the OAFCx bits, control the
   147                                      * routing of the OAx output when OAPMx > 0.
   148                                      * When OAFCx = 0:
   149                                      *  00  OAxOUT connected to external pins and ADC input A1, A3, or A5
   150                                      *  01  OAxOUT connected to external pins and ADC input A12, A13, or A14
   151                                      *  10  OAxOUT connected to external pins and ADC input A1, A3, or A5
   152                                      *  11  OAxOUT connected to external pins and ADC input A12, A13, or A14
   153                                      * When OAFCx > 0:
   154                                      *  00  OAxOUT used for internal routing only
   155                                      *  01  OAxOUT connected to external pins and ADC input A12, A13, or A14
   156                                      *  10  OAxOUT connected to external pins and ADC input A1, A3, or A5
   157                                      *  11  OAxOUT connected internally to ADC input A12, A13 , or A14.
   158                                      * External A12, A13, or A14 pin connections are disconnected from the
   159                                      * ADC. */
   160        }
   161    
   162        /*!
   163        *  ======== OAxCTL1_t ========
   164        *  Opamp Control Register 1 Definition
   165        *
   166        *  @see #OAxCTL1_t
   167        */
   168        struct OAxCTL1_t {
   169          OAFBR_t   OAFBR;          /*! OAx feedback resistor select
   170                                      *  000  Tap 0 - 0R/16R
   171                                      *  001  Tap 1 - 4R/12R
   172                                      *  010  Tap 2 - 8R/8R
   173                                      *  011  Tap 3 - 10R/6R
   174                                      *  100  Tap 4 - 12R/4R
   175                                      *  101  Tap 5 - 13R/3R
   176                                      *  110  Tap 6 - 14R/2R
   177                                      *  111  Tap 7 - 15R/1R */
   178          OAFC_t    OAFC;           /*! OAx function control. This bit selects the function of OAx
   179                                      *  000  General purpose opamp
   180                                      *  001  Unity gain buffer for three-opamp differential amplifier
   181                                      *  010  Unity gain buffer
   182                                      *  011  Comparator
   183                                      *  100  Non-inverting PGA amplifier
   184                                      *  101  Cascaded non-inverting PGA amplifier
   185                                      *  110  Inverting PGA amplifier
   186                                      *  111  Differential amplifier */
   187          OANEXT_t  OANEXT;         /*! OAx inverting input externally available. This bit, when set, connects the
   188                                      * inverting OAx input to the external pin when the integrated resistor network
   189                                      * is used.
   190                                      *  0  OAx inverting input not externally available
   191                                      *  1  OAx inverting input externally available */
   192          OARRIP_t  OARRIP;         /*! OAx reverse resistor connection in comparator mode
   193                                      *  0  RTOP is connected to AVSS and RBOTTOM is connected to AVCC when
   194                                      *     OAFCx = 3
   195                                      *  1  RTOP is connected to AVCC and RBOTTOM is connected to AVSS when
   196                                      *     OAFCx = 3. */
   197        }
   198    
   199        /*!
   200        *  ======== ForceSetDefaultRegister_t ========
   201        *  Force Set Default Register
   202        *
   203        *  Type to store if each register needs to be forced initialized
   204        *  even if the register is in default state.
   205        *
   206        *  @see #ForceSetDefaultRegister_t
   207        */
   208        struct ForceSetDefaultRegister_t {
   209            String     register;
   210            Bool       regForceSet;
   211        }
   212    
   213    instance:
   214    
   215        /*! Returns the number of available OA */
   216        UChar getNumberOfOA();
   217    }