1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    
    33    /*!
    34     *  ======== DAC12 ========
    35     *  MSP430 12-bit Digital to Analog Converter
    36     */
    37    metaonly module DAC12 inherits IDAC {
    38    
    39        struct DAC12_xCTL_t {
    40            DAC12OPS_t DAC12OPS;       /*! DAC12 output select
    41                                        * 0 DAC12_0 output on P6.6, DAC12_1 output on P6.7
    42                                        * 1 DAC12_0 output on VeREF+, DAC12_1 output on P6.5 */
    43            DAC12SREF_t DAC12SREF;     /*! DAC12 select reference voltage
    44                                        * 00 VREF+
    45                                        * 01 VREF+
    46                                        * 10 VeREF+
    47                                        * 11 VeREF+ */
    48            DAC12RES_t DAC12RES;       /*! DAC12 resolution select
    49                                        * 0 12-bit resolution
    50                                        * 1 8-bit resolution */
    51            DAC12LSEL_t DAC12LSEL;     /*! DAC12 load select. Selects the load trigger for the DAC12 latch. DAC12ENC
    52                                        * must be set for the DAC to update, except when DAC12LSELx = 0.
    53                                        * 00 DAC12 latch loads when DAC12_xDATwritten (DAC12ENCis ignored)
    54                                        * 01 DAC12 latch loads when DAC12_xDAT written, or, when grouped,
    55                                        * when all DAC12_xDAT registers in the group have been written.
    56                                        * 10 Rising edge of Timer_A.OUT1 (TA1)
    57                                        * 11 Rising edge of Timer_B.OUT2 (TB2) */
    58            DAC12CALON_t DAC12CALON;   /*! DAC12 calibration on. This bit initiates the DAC12 offset calibration sequence
    59                                        * and is automatically reset when the calibration completes.
    60                                        * 0 Calibration is not active
    61                                        * 1 Initiate calibration/calibration in progress */
    62            DAC12IR_t DAC12IR;         /*! DAC12 input range. This bit sets the reference input and voltage output range.
    63                                        * 0 DAC12 full-scale output = 3x reference voltage
    64                                        * 1 DAC12 full-scale output = 1x reference voltage */
    65            DAC12AMP_t DAC12AMP;       /*! DAC12 amplifier setting. These bits select settling time vs current
    66                                        * consumption for the DAC12 input and output amplifiers.
    67                                        * DAC12AMPx        Input Buffer        Output Buffer
    68                                        *    000       Off                    DAC12 off, output high Z
    69                                        *    001       Off                    DAC12 off, output 0 V
    70                                        *    010       Low speed/current      Low speed/current
    71                                        *    011       Low speed/current      Medium speed/current
    72                                        *    100       Low speed/current      High speed/current
    73                                        *    101       Medium speed/current   Medium speed/current
    74                                        *    110       Medium speed/current   High speed/current
    75                                        *    111       High speed/current     High speed/current */
    76            DAC12DF_t DAC12DF;         /*! DAC12 data format
    77                                        * 0 Straight binary
    78                                        * 1 2s complement */
    79            DAC12IE_t DAC12IE;         /*! DAC12 interrupt enable
    80                                        * 0 Disabled
    81                                        * 1 Enabled */
    82            DAC12IFG_t DAC12IFG;       /*! DAC12 Interrupt flag
    83                                        * 0 No interrupt pending
    84                                        * 1 Interrupt pending */
    85            DAC12ENC_t DAC12ENC;       /*! DAC12 enable conversion. This bit enables the DAC12 module when
    86                                        * DAC12LSELx > 0. when DAC12LSELx = 0, DAC12ENC is ignored.
    87                                        * 0 DAC12 disabled
    88                                        * 1 DAC12 enabled */
    89            DAC12GRP_t DAC12GRP;       /*! DAC12 group. Groups DAC12_x with the next higher DAC12_x.
    90                                        * 0 Not grouped
    91                                        * 1 Grouped */
    92        };
    93    
    94        /*!
    95         *  ======== create ========
    96         *  Create an instance of this peripheral.
    97         */
    98        create();
    99    
   100      instance:
   101    
   102        /*! DAC12_0CTL Register */
   103        config DAC12_xCTL_t DAC12_0CTL = {
   104            DAC12OPS    : DAC12OPS_OFF,
   105            DAC12SREF   : DAC12SREF_0,
   106            DAC12RES    : DAC12RES_OFF,
   107            DAC12LSEL   : DAC12LSEL_0,
   108            DAC12CALON  : DAC12CALON_OFF,
   109            DAC12IR     : DAC12IR_OFF,
   110            DAC12AMP    : DAC12AMP_0,
   111            DAC12DF     : DAC12DF_OFF,
   112            DAC12IE     : DAC12IE_OFF,
   113            DAC12IFG    : DAC12IFG_OFF,
   114            DAC12ENC    : DAC12ENC_OFF,
   115            DAC12GRP    : DAC12GRP_OFF
   116        };
   117    
   118        /*! DAC12_1CTL Register */
   119        config DAC12_xCTL_t DAC12_1CTL = {
   120            DAC12OPS    : DAC12OPS_OFF,
   121            DAC12SREF   : DAC12SREF_0,
   122            DAC12RES    : DAC12RES_OFF,
   123            DAC12LSEL   : DAC12LSEL_0,
   124            DAC12CALON  : DAC12CALON_OFF,
   125            DAC12IR     : DAC12IR_OFF,
   126            DAC12AMP    : DAC12AMP_0,
   127            DAC12DF     : DAC12DF_OFF,
   128            DAC12IE     : DAC12IE_OFF,
   129            DAC12IFG    : DAC12IFG_OFF,
   130            DAC12ENC    : DAC12ENC_OFF,
   131            DAC12GRP    : DAC12GRP_OFF
   132        };
   133    
   134        /*! DAC12_0DAT Register */
   135        config Bits16 DAC12_0DAT = 0;
   136    
   137        /*! DAC12_1DAT Register */
   138        config Bits16 DAC12_1DAT = 0;
   139    
   140        /*! DAC12 has 2 interrupt enables */
   141        config regIntVect_t interruptSource[2];
   142    
   143        /*! Determine if each Register needs to be forced set or not */
   144        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   145        [
   146            { register : "DAC12_0CTL" , regForceSet : false },
   147            { register : "DAC12_1CTL" , regForceSet : false },
   148            { register : "DAC12_0DAT" , regForceSet : false },
   149            { register : "DAC12_1DAT" , regForceSet : false }
   150        ];
   151    }