1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    13    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    14    
    15    /*!
    16     *  ======== GPIO for MSP430G2x55 ========
    17     *  MSP430 General Purpose Input Output Ports
    18     */
    19    metaonly module GPIO_MSP430G2x55 inherits IGPIO {
    20        /*!
    21         *  ======== create ========
    22         *  Create an instance of this peripheral. Use a customized
    23         *  init function so that we can get access to the ADC10
    24         *  and BCS+ instances.
    25         */
    26        create(ADC10.Instance adc10, BCSplus.Instance clock);
    27    
    28    instance:
    29        /*! @_nodoc */
    30        config ADC10.Instance adc10;
    31    
    32        /*! @_nodoc */
    33        config BCSplus.Instance clock;
    34    
    35       /*! Define an array to describe all device pins. The 1st dimension
    36        *  denotes the port, the second the pin on that port. On an
    37        *  MSP430G2x55 device, there are 4 x 8 = 64 pins total.
    38        */
    39    
    40        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    41         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    42        /* TODO: For this device the config variable definition has been moved into the
    43         * corresponding XS file due to its size. This needs a more consistent solution. */
    44        config DevicePin_t devicePins[4][8];
    45    
    46        /*! Implementation of Device Pin Functional Configuration */
    47        override config DevicePinFunctionSetting_t devicePinSetting[4][8];
    48    
    49        /*! Determine if each Register needs to be forced set or not */
    50        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    51        [
    52            { register : "P1OUT" , regForceSet : true  },
    53            { register : "P1SEL" , regForceSet : false },
    54            { register : "P1SEL2" , regForceSet : false },
    55            { register : "P1DIR" , regForceSet : true  },
    56            { register : "P1REN" , regForceSet : false },
    57            { register : "P1IES" , regForceSet : true },
    58            { register : "P1IFG" , regForceSet : true },
    59            { register : "P1IE"  , regForceSet : false },
    60            { register : "P2OUT" , regForceSet : true  },
    61            { register : "P2SEL" , regForceSet : false },
    62            { register : "P2SEL2" , regForceSet : false },
    63            { register : "P2DIR" , regForceSet : true  },
    64            { register : "P2REN" , regForceSet : false },
    65            { register : "P2IES" , regForceSet : true },
    66            { register : "P2IFG" , regForceSet : true },
    67            { register : "P2IE"  , regForceSet : false },
    68            { register : "P3OUT" , regForceSet : true  },
    69            { register : "P3SEL" , regForceSet : false },
    70            { register : "P3SEL2" , regForceSet : false },
    71            { register : "P3DIR" , regForceSet : true  },
    72            { register : "P3REN" , regForceSet : false },
    73            { register : "P4OUT" , regForceSet : true  },
    74            { register : "P4SEL" , regForceSet : false },
    75            { register : "P4SEL2" , regForceSet : false },
    76            { register : "P4DIR" , regForceSet : true  },
    77            { register : "P4REN" , regForceSet : false },
    78        ];
    79    
    80        /*
    81         *  GPIO Digital I/O Registers
    82         *
    83         *  One GIPO instance defines the configuration of an entire,
    84         *  8-bit wide digital I/O port.
    85         */
    86    
    87        /*! Port 1 Output Register */
    88        config GpioBits8PxOut_t P1OUT = {
    89            Bit0        : BIT0_OFF,
    90            Bit1        : BIT1_OFF,
    91            Bit2        : BIT2_OFF,
    92            Bit3        : BIT3_OFF,
    93            Bit4        : BIT4_OFF,
    94            Bit5        : BIT5_OFF,
    95            Bit6        : BIT6_OFF,
    96            Bit7        : BIT7_OFF
    97        };
    98    
    99        /*! Port 1 Port Select Register */
   100        config GpioBits8PxSel_t P1SEL = {
   101            Bit0        : BIT0_OFF,
   102            Bit1        : BIT1_OFF,
   103            Bit2        : BIT2_OFF,
   104            Bit3        : BIT3_OFF,
   105            Bit4        : BIT4_OFF,
   106            Bit5        : BIT5_OFF,
   107            Bit6        : BIT6_OFF,
   108            Bit7        : BIT7_OFF
   109        };
   110    
   111        /*! Port 1 Direction Register */
   112        config GpioBits8PxDir_t P1DIR = {
   113            Bit0        : BIT0_OFF,
   114            Bit1        : BIT1_OFF,
   115            Bit2        : BIT2_OFF,
   116            Bit3        : BIT3_OFF,
   117            Bit4        : BIT4_OFF,
   118            Bit5        : BIT5_OFF,
   119            Bit6        : BIT6_OFF,
   120            Bit7        : BIT7_OFF
   121        };
   122    
   123        /*! Port 1 Resistor Enable Register */
   124        config GpioBits8PxRen_t P1REN = {
   125            Bit0        : BIT0_OFF,
   126            Bit1        : BIT1_OFF,
   127            Bit2        : BIT2_OFF,
   128            Bit3        : BIT3_OFF,
   129            Bit4        : BIT4_OFF,
   130            Bit5        : BIT5_OFF,
   131            Bit6        : BIT6_OFF,
   132            Bit7        : BIT7_OFF
   133        };
   134    
   135        /*! Port 2 Output Register */
   136        config GpioBits8PxOut_t P2OUT = {
   137            Bit0        : BIT0_OFF,
   138            Bit1        : BIT1_OFF,
   139            Bit2        : BIT2_OFF,
   140            Bit3        : BIT3_OFF,
   141            Bit4        : BIT4_OFF,
   142            Bit5        : BIT5_OFF,
   143            Bit6        : BIT6_OFF,
   144            Bit7        : BIT7_OFF
   145        };
   146    
   147        /*! Port 2 Port Select Register */
   148        config GpioBits8PxSel_t P2SEL = {
   149            Bit0        : BIT0_OFF,
   150            Bit1        : BIT1_OFF,
   151            Bit2        : BIT2_OFF,
   152            Bit3        : BIT3_OFF,
   153            Bit4        : BIT4_OFF,
   154            Bit5        : BIT5_OFF,
   155            Bit6        : BIT6,         /* POR default for all 2xx devices */
   156            Bit7        : BIT7          /* POR default for all 2xx devices */
   157        };
   158    
   159        /*! Port 2 Direction Register */
   160        config GpioBits8PxDir_t P2DIR = {
   161            Bit0        : BIT0_OFF,
   162            Bit1        : BIT1_OFF,
   163            Bit2        : BIT2_OFF,
   164            Bit3        : BIT3_OFF,
   165            Bit4        : BIT4_OFF,
   166            Bit5        : BIT5_OFF,
   167            Bit6        : BIT6_OFF,
   168            Bit7        : BIT7_OFF
   169        };
   170    
   171        /*! Port 2 Resistor Enable Register */
   172        config GpioBits8PxRen_t P2REN = {
   173            Bit0        : BIT0_OFF,
   174            Bit1        : BIT1_OFF,
   175            Bit2        : BIT2_OFF,
   176            Bit3        : BIT3_OFF,
   177            Bit4        : BIT4_OFF,
   178            Bit5        : BIT5_OFF,
   179            Bit6        : BIT6_OFF,
   180            Bit7        : BIT7_OFF
   181        };
   182    
   183        /*! Port 3 Output Register */
   184        config GpioBits8PxOut_t P3OUT = {
   185            Bit0        : BIT0_OFF,
   186            Bit1        : BIT1_OFF,
   187            Bit2        : BIT2_OFF,
   188            Bit3        : BIT3_OFF,
   189            Bit4        : BIT4_OFF,
   190            Bit5        : BIT5_OFF,
   191            Bit6        : BIT6_OFF,
   192            Bit7        : BIT7_OFF
   193        };
   194    
   195        /*! Port 3 Port Select Register */
   196        config GpioBits8PxSel_t P3SEL = {
   197            Bit0        : BIT0_OFF,
   198            Bit1        : BIT1_OFF,
   199            Bit2        : BIT2_OFF,
   200            Bit3        : BIT3_OFF,
   201            Bit4        : BIT4_OFF,
   202            Bit5        : BIT5_OFF,
   203            Bit6        : BIT6_OFF,
   204            Bit7        : BIT7_OFF
   205        };
   206    
   207        /*! Port 3 Direction Register */
   208        config GpioBits8PxDir_t P3DIR = {
   209            Bit0        : BIT0_OFF,
   210            Bit1        : BIT1_OFF,
   211            Bit2        : BIT2_OFF,
   212            Bit3        : BIT3_OFF,
   213            Bit4        : BIT4_OFF,
   214            Bit5        : BIT5_OFF,
   215            Bit6        : BIT6_OFF,
   216            Bit7        : BIT7_OFF
   217        };
   218    
   219        /*! Port 3 Resistor Enable Register */
   220        config GpioBits8PxRen_t P3REN = {
   221            Bit0        : BIT0_OFF,
   222            Bit1        : BIT1_OFF,
   223            Bit2        : BIT2_OFF,
   224            Bit3        : BIT3_OFF,
   225            Bit4        : BIT4_OFF,
   226            Bit5        : BIT5_OFF,
   227            Bit6        : BIT6_OFF,
   228            Bit7        : BIT7_OFF
   229        };
   230    
   231        /*! Port 4 Output Register */
   232        config GpioBits8PxOut_t P4OUT = {
   233            Bit0        : BIT0_OFF,
   234            Bit1        : BIT1_OFF,
   235            Bit2        : BIT2_OFF,
   236            Bit3        : BIT3_OFF,
   237            Bit4        : BIT4_OFF,
   238            Bit5        : BIT5_OFF,
   239            Bit6        : BIT6_OFF,
   240            Bit7        : BIT7_OFF
   241        };
   242    
   243        /*! Port 4 Port Select Register */
   244        config GpioBits8PxSel_t P4SEL = {
   245            Bit0        : BIT0_OFF,
   246            Bit1        : BIT1_OFF,
   247            Bit2        : BIT2_OFF,
   248            Bit3        : BIT3_OFF,
   249            Bit4        : BIT4_OFF,
   250            Bit5        : BIT5_OFF,
   251            Bit6        : BIT6_OFF,
   252            Bit7        : BIT7_OFF
   253        };
   254    
   255        /*! Port 4 Direction Register */
   256        config GpioBits8PxDir_t P4DIR = {
   257            Bit0        : BIT0_OFF,
   258            Bit1        : BIT1_OFF,
   259            Bit2        : BIT2_OFF,
   260            Bit3        : BIT3_OFF,
   261            Bit4        : BIT4_OFF,
   262            Bit5        : BIT5_OFF,
   263            Bit6        : BIT6_OFF,
   264            Bit7        : BIT7_OFF
   265        };
   266    
   267        /*! Port 4 Resistor Enable Register */
   268        config GpioBits8PxRen_t P4REN = {
   269            Bit0        : BIT0_OFF,
   270            Bit1        : BIT1_OFF,
   271            Bit2        : BIT2_OFF,
   272            Bit3        : BIT3_OFF,
   273            Bit4        : BIT4_OFF,
   274            Bit5        : BIT5_OFF,
   275            Bit6        : BIT6_OFF,
   276            Bit7        : BIT7_OFF
   277        };
   278    }