1 2 3 4 5 6 7 8 9 10 11
12 import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
13 import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
14
15 /*!
16 * ======== GPIO for MSP430F22x4 ========
17 * MSP430 General Purpose Input Output Ports
18 */
19 metaonly module GPIO_MSP430F22x4 inherits IGPIO {
20 /*!
21 * ======== create ========
22 * Create an instance of this peripheral. Use a customized
23 * init function so that we can get access to the ADC10
24 * and BCS+ instances.
25 */
26 create(ADC10.Instance adc10, BCSplus.Instance clock);
27
28 instance:
29 /*! @_nodoc */
30 config ADC10.Instance adc10;
31
32 /*! @_nodoc */
33 config BCSplus.Instance clock;
34
35 /*! Define an array to describe all device pins. The 1st dimension
36 * denotes the port, the second the pin on that port. On an
37 * MSP430F22xx device, there are 4 x 8 = 32 pins total.
38 */
39
40 41
42 readonly config DevicePin_t devicePins[4][8];
43
44
45 /*! Implementation of Device Pin Functional Configuration */
46 override config DevicePinFunctionSetting_t devicePinSetting[4][8];
47
48 /*! Determine if each Register needs to be forced set or not */
49 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
50 [
51 { register : "P1OUT" , regForceSet : true },
52 { register : "P1SEL" , regForceSet : false },
53 { register : "P1DIR" , regForceSet : true },
54 { register : "P1REN" , regForceSet : false },
55 { register : "P1IES" , regForceSet : true },
56 { register : "P1IFG" , regForceSet : true },
57 { register : "P1IE" , regForceSet : false },
58 { register : "P2OUT" , regForceSet : true },
59 { register : "P2SEL" , regForceSet : false },
60 { register : "P2DIR" , regForceSet : true },
61 { register : "P2REN" , regForceSet : false },
62 { register : "P2IES" , regForceSet : true },
63 { register : "P2IFG" , regForceSet : true },
64 { register : "P2IE" , regForceSet : false },
65 { register : "P3OUT" , regForceSet : true },
66 { register : "P3SEL" , regForceSet : false },
67 { register : "P3DIR" , regForceSet : true },
68 { register : "P3REN" , regForceSet : false },
69 { register : "P4OUT" , regForceSet : true },
70 { register : "P4SEL" , regForceSet : false },
71 { register : "P4DIR" , regForceSet : true },
72 { register : "P4REN" , regForceSet : false }
73 ];
74
75 76 77 78 79 80
81
82 /*! Port 1 Output Register */
83 config GpioBits8PxOut_t P1OUT = {
84 Bit0 : BIT0_OFF,
85 Bit1 : BIT1_OFF,
86 Bit2 : BIT2_OFF,
87 Bit3 : BIT3_OFF,
88 Bit4 : BIT4_OFF,
89 Bit5 : BIT5_OFF,
90 Bit6 : BIT6_OFF,
91 Bit7 : BIT7_OFF
92 };
93
94 /*! Port 1 Port Select Register */
95 config GpioBits8PxSel_t P1SEL = {
96 Bit0 : BIT0_OFF,
97 Bit1 : BIT1_OFF,
98 Bit2 : BIT2_OFF,
99 Bit3 : BIT3_OFF,
100 Bit4 : BIT4_OFF,
101 Bit5 : BIT5_OFF,
102 Bit6 : BIT6_OFF,
103 Bit7 : BIT7_OFF
104 };
105
106 /*! Port 1 Direction Register */
107 config GpioBits8PxDir_t P1DIR = {
108 Bit0 : BIT0_OFF,
109 Bit1 : BIT1_OFF,
110 Bit2 : BIT2_OFF,
111 Bit3 : BIT3_OFF,
112 Bit4 : BIT4_OFF,
113 Bit5 : BIT5_OFF,
114 Bit6 : BIT6_OFF,
115 Bit7 : BIT7_OFF
116 };
117
118 /*! Port 1 Resistor Enable Register */
119 config GpioBits8PxRen_t P1REN = {
120 Bit0 : BIT0_OFF,
121 Bit1 : BIT1_OFF,
122 Bit2 : BIT2_OFF,
123 Bit3 : BIT3_OFF,
124 Bit4 : BIT4_OFF,
125 Bit5 : BIT5_OFF,
126 Bit6 : BIT6_OFF,
127 Bit7 : BIT7_OFF
128 };
129
130 /*! Port 2 Output Register */
131 config GpioBits8PxOut_t P2OUT = {
132 Bit0 : BIT0_OFF,
133 Bit1 : BIT1_OFF,
134 Bit2 : BIT2_OFF,
135 Bit3 : BIT3_OFF,
136 Bit4 : BIT4_OFF,
137 Bit5 : BIT5_OFF,
138 Bit6 : BIT6_OFF,
139 Bit7 : BIT7_OFF
140 };
141
142 /*! Port 2 Port Select Register */
143 config GpioBits8PxSel_t P2SEL = {
144 Bit0 : BIT0_OFF,
145 Bit1 : BIT1_OFF,
146 Bit2 : BIT2_OFF,
147 Bit3 : BIT3_OFF,
148 Bit4 : BIT4_OFF,
149 Bit5 : BIT5_OFF,
150 Bit6 : BIT6,
151 Bit7 : BIT7
152 };
153
154 /*! Port 2 Direction Register */
155 config GpioBits8PxDir_t P2DIR = {
156 Bit0 : BIT0_OFF,
157 Bit1 : BIT1_OFF,
158 Bit2 : BIT2_OFF,
159 Bit3 : BIT3_OFF,
160 Bit4 : BIT4_OFF,
161 Bit5 : BIT5_OFF,
162 Bit6 : BIT6_OFF,
163 Bit7 : BIT7_OFF
164 };
165
166 /*! Port 2 Resistor Enable Register */
167 config GpioBits8PxRen_t P2REN = {
168 Bit0 : BIT0_OFF,
169 Bit1 : BIT1_OFF,
170 Bit2 : BIT2_OFF,
171 Bit3 : BIT3_OFF,
172 Bit4 : BIT4_OFF,
173 Bit5 : BIT5_OFF,
174 Bit6 : BIT6_OFF,
175 Bit7 : BIT7_OFF
176 };
177
178 /*! Port 3 Output Register */
179 config GpioBits8PxOut_t P3OUT = {
180 Bit0 : BIT0_OFF,
181 Bit1 : BIT1_OFF,
182 Bit2 : BIT2_OFF,
183 Bit3 : BIT3_OFF,
184 Bit4 : BIT4_OFF,
185 Bit5 : BIT5_OFF,
186 Bit6 : BIT6_OFF,
187 Bit7 : BIT7_OFF
188 };
189
190 /*! Port 3 Port Select Register */
191 config GpioBits8PxSel_t P3SEL = {
192 Bit0 : BIT0_OFF,
193 Bit1 : BIT1_OFF,
194 Bit2 : BIT2_OFF,
195 Bit3 : BIT3_OFF,
196 Bit4 : BIT4_OFF,
197 Bit5 : BIT5_OFF,
198 Bit6 : BIT6_OFF,
199 Bit7 : BIT7_OFF
200 };
201
202 /*! Port 3 Direction Register */
203 config GpioBits8PxDir_t P3DIR = {
204 Bit0 : BIT0_OFF,
205 Bit1 : BIT1_OFF,
206 Bit2 : BIT2_OFF,
207 Bit3 : BIT3_OFF,
208 Bit4 : BIT4_OFF,
209 Bit5 : BIT5_OFF,
210 Bit6 : BIT6_OFF,
211 Bit7 : BIT7_OFF
212 };
213
214 /*! Port 3 Resistor Enable Register */
215 config GpioBits8PxRen_t P3REN = {
216 Bit0 : BIT0_OFF,
217 Bit1 : BIT1_OFF,
218 Bit2 : BIT2_OFF,
219 Bit3 : BIT3_OFF,
220 Bit4 : BIT4_OFF,
221 Bit5 : BIT5_OFF,
222 Bit6 : BIT6_OFF,
223 Bit7 : BIT7_OFF
224 };
225
226 /*! Port 4 Output Register */
227 config GpioBits8PxOut_t P4OUT = {
228 Bit0 : BIT0_OFF,
229 Bit1 : BIT1_OFF,
230 Bit2 : BIT2_OFF,
231 Bit3 : BIT3_OFF,
232 Bit4 : BIT4_OFF,
233 Bit5 : BIT5_OFF,
234 Bit6 : BIT6_OFF,
235 Bit7 : BIT7_OFF
236 };
237
238 /*! Port 4 Port Select Register */
239 config GpioBits8PxSel_t P4SEL = {
240 Bit0 : BIT0_OFF,
241 Bit1 : BIT1_OFF,
242 Bit2 : BIT2_OFF,
243 Bit3 : BIT3_OFF,
244 Bit4 : BIT4_OFF,
245 Bit5 : BIT5_OFF,
246 Bit6 : BIT6_OFF,
247 Bit7 : BIT7_OFF
248 };
249
250 /*! Port 4 Direction Register */
251 config GpioBits8PxDir_t P4DIR = {
252 Bit0 : BIT0_OFF,
253 Bit1 : BIT1_OFF,
254 Bit2 : BIT2_OFF,
255 Bit3 : BIT3_OFF,
256 Bit4 : BIT4_OFF,
257 Bit5 : BIT5_OFF,
258 Bit6 : BIT6_OFF,
259 Bit7 : BIT7_OFF
260 };
261
262 /*! Port 4 Resistor Enable Register */
263 config GpioBits8PxRen_t P4REN = {
264 Bit0 : BIT0_OFF,
265 Bit1 : BIT1_OFF,
266 Bit2 : BIT2_OFF,
267 Bit3 : BIT3_OFF,
268 Bit4 : BIT4_OFF,
269 Bit5 : BIT5_OFF,
270 Bit6 : BIT6_OFF,
271 Bit7 : BIT7_OFF
272 };
273 }