1    /*
     2     *  Copyright (c) 2014 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== Platform.xdc ========
    15     *
    16     */
    17    
    18    /*!
    19     *  ======== Platform ========
    20     *  Platform support for the evmTCI6636K2H
    21     */
    22    metaonly module Platform inherits xdc.platform.IPlatform
    23    {
    24        readonly config xdc.platform.IPlatform.Board BOARD = {      
    25            id:             "0",
    26            boardName:      "evmTCI6636K2H",
    27            boardFamily:    "evmTCI6636K2H",
    28            boardRevision:  null,
    29        };
    30    
    31        /* DSP */   
    32        readonly config xdc.platform.IExeContext.Cpu DSP = {        
    33            id:             "0",
    34            clockRate:      1220,
    35            catalogName:    "ti.catalog.c6000",
    36            deviceName:     "TMS320TCI6636",
    37            revision:       "1.0",
    38        };
    39    
    40        /* GPP */
    41        readonly config xdc.platform.IExeContext.Cpu GPP = {
    42            id:             "1",
    43            clockRate:      125.0,  /* Typically set by the HLOS */
    44            catalogName:    "ti.catalog.arm.cortexa15",
    45            deviceName:     "TCI6636K2H",
    46            revision:       "1.0"
    47        };
    48        
    49    instance:
    50    
    51        override readonly config xdc.platform.IPlatform.Memory
    52            externalMemoryMap[string] = [
    53                ["DDR3", {name: "DDR3", base: 0x80000000, len: 0x80000000}],
    54        ];
    55    
    56        /*
    57         *  ======== l1PMode ========
    58         *  Define the amount of L1P RAM used for L1 Program Cache.
    59         *
    60         *  Check the device documentation for valid values.
    61         */
    62        config String l1PMode = "32k";
    63        
    64        /*
    65         *  ======== l1DMode ========
    66         *  Define the amount of L1D RAM used for L1 Data Cache.
    67         *
    68         *  Check the device documentation for valid values.
    69         */
    70        config String l1DMode = "32k";
    71        
    72        /*
    73         *  ======== l2Mode ========
    74         *  Define the amount of L2 RAM used for L2 Cache.
    75         *
    76         *  Check the device documentation for valid values.
    77         */
    78        config String l2Mode = "0k";
    79    
    80    };
    81    /*
    82     *  @(#) ti.platforms.evmTCI6636K2H; 1, 0, 0, 0,30; 3-22-2014 18:57:55; /db/ztree/library/trees/platform/platform-o48x/src/
    83     */
    84