1    /*
     2     *  Copyright (c) 2014 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== Platform.xdc ========
    15     */
    16    
    17    package ti.platforms.arm;
    18    
    19    /*!
    20     *  ======== Platform ========
    21     *  Generic platform support for the arm
    22     *
    23     *  This platform requires a memory map file called `board.xs` to be available
    24     *  in the same directory as the application config file. It should define 
    25     *  values for the config parameters which are declared in this platform.
    26     *
    27     *  @a(Examples)
    28     *  A sample `board.xs` file.
    29     *
    30     *  @p(code)
    31     *  var boardARM = {
    32     *      CPU: {
    33     *          clockRate:      300.0,
    34     *          catalogName:    "ti.catalog.arm.cortexm3",
    35     *          deviceName:     "TMS320DM8168",
    36     *      },
    37     *      externalMemoryMap: [
    38     *          ["EXTRAM",  {
    39     *              name: "DDR",  base: 0xC0000000, len: 0x08000000,
    40     *          }]
    41     *      ],
    42     *      codeMemory:  "DDR",
    43     *      dataMemory:  "DDR",
    44     *      stackMemory: "DDR",
    45     *      l1PMode:     "32k",
    46     *      l1DMode:     "32k",
    47     *      l2Mode:      "0k",
    48     *  };
    49     *  @p
    50     */
    51    metaonly module Platform inherits xdc.platform.IPlatform
    52    {
    53        config xdc.platform.IPlatform.Board BOARD;
    54    
    55    instance:
    56    
    57        /*!
    58         *  ======== CPU ========
    59         *  CPU Attributes necessary to create an execution context
    60         *
    61         *  The platform requires these attributes to get the device internal
    62         *  memory map.
    63         *
    64         *  @see xdc.platform.IExeContext#Cpu
    65         */
    66        config xdc.platform.IExeContext.Cpu CPU = {
    67            id:             "0",
    68            clockRate:      1.0,
    69            catalogName:    "ti.catalog.arm",
    70            deviceName:     "",
    71            revision:       "",
    72        };
    73    
    74        override config String codeMemory = null;
    75    
    76        override config String dataMemory = null;
    77    
    78        override config String stackMemory = null;
    79    
    80        /*!
    81         *  ======== sectionMap ========
    82         *  A section name to SectionSpec mapping
    83         *
    84         *  @see xdc.cfg.Program#sectMap
    85         */
    86        config Any sectionMap[string];
    87    
    88        /*!
    89         *  ======== sectionsExclude ========
    90         *  Section to exclude from linker command file generation
    91         *
    92         *  @see xdc.cfg.Program#sectionsExclude
    93         */
    94        config String sectionsExclude = null;
    95    
    96        /*!
    97         *  ======== memoryExclude ========
    98         *  Section to exclude from linker command file generation
    99         *
   100         *  @see xdc.cfg.Program#memoryExclude
   101         */
   102        config Bool memoryExclude = false;
   103    
   104        /*!
   105         *  ======== sectionsTemplate ========
   106         *  Replace the sections portion of the generated linker command file.
   107         *
   108         *  @see xdc.cfg.Program#sectionsTemplate
   109         */
   110        config String sectionsTemplate = null;
   111    
   112        /*!
   113         *  ======== l1PMode ========
   114         *  Define the amount of L1P RAM used for L1 Program Cache.
   115         */
   116        config String l1PMode = null;
   117    
   118        /*!
   119         *  ======== l1DMode ========
   120         *  Define the amount of L1D RAM used for L1 Data Cache.
   121         */
   122        config String l1DMode = null;
   123    
   124        /*!
   125         *  ======== l2Mode ========
   126         *  Define the amount of L2 RAM used for L2 Cache.
   127         */
   128        config String l2Mode = null;
   129    
   130        /*!
   131         *  ======== sectMap ========
   132         *  @_nodoc
   133         */
   134        override config String sectMap[string];
   135    
   136        /*!
   137         *  ======== getCpuDataSheet ========
   138         *  @_nodoc
   139         */
   140        override function getCpuDataSheet(cpuId);
   141    
   142        /*!
   143         *  ======== getExeContext ========
   144         *  @_nodoc
   145         */
   146        override function getExeContext(prog);
   147    
   148        /*!
   149         *  ======== getExecCmd ========
   150         *  @_nodoc
   151         */
   152        override function getExecCmd(prog, platPath);
   153    
   154        /*!
   155         *  ======== getLinkTemplate ========
   156         *  @_nodoc
   157         */
   158        override function getLinkTemplate(prog);
   159    };
   160    /*
   161     *  @(#) ti.platforms.arm; 1, 0, 0,59; 3-22-2014 18:56:54; /db/ztree/library/trees/platform/platform-o48x/src/
   162     */
   163