1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    import ti.catalog.msp430.peripherals.communication.USI as USI;
    13    
    14    /*!
    15     *  ======== GPIO for MSP430G2x02 ========
    16     *  MSP430 General Purpose Input Output Ports
    17     */
    18    metaonly module GPIO_MSP430G2x02 inherits IGPIO {
    19        /*!
    20         *  ======== create ========
    21         *  Create an instance of this peripheral.
    22         */
    23        create(USI.Instance usi);
    24    
    25    instance:
    26        /*! @_nodoc */
    27        config USI.Instance usi;
    28    
    29       /*! Define an array to describe all device pins. The 1st dimension
    30        *  denotes the port, the second the pin on that port. On an
    31        *  MSP430G2x02 device, there are 8 + 8 = 16 pins total.
    32        */
    33    
    34        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    35         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    36        /* TODO: For this device the config variable definition has been moved into the
    37         * corresponding XS file due to its size. This needs a more consistent solution. */
    38        config DevicePin_t devicePins[2][8];
    39    
    40        /*! Implementation of Device Pin Functional Configuration */
    41        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    42    
    43        /*! Determine if each Register needs to be forced set or not */
    44        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    45        [
    46            { register : "P1OUT" , regForceSet : true  },
    47            { register : "P1SEL" , regForceSet : false },
    48            { register : "P1SEL2", regForceSet : false },
    49            { register : "P1DIR" , regForceSet : false },
    50            { register : "P1REN" , regForceSet : false },
    51            { register : "P1IES" , regForceSet : true },
    52            { register : "P1IFG" , regForceSet : true },
    53            { register : "P1IE"  , regForceSet : false },
    54            { register : "P2OUT" , regForceSet : true  },
    55            { register : "P2SEL" , regForceSet : false },
    56            { register : "P2SEL2", regForceSet : false },
    57            { register : "P2DIR" , regForceSet : false },
    58            { register : "P2REN" , regForceSet : false },
    59            { register : "P2IES" , regForceSet : true },
    60            { register : "P2IFG" , regForceSet : true },
    61            { register : "P2IE"  , regForceSet : false }
    62        ];
    63    
    64        /*
    65         *  GPIO Digital I/O Registers
    66         *
    67         *  One GIPO instance defines the configuration of an entire,
    68         *  8-bit wide digital I/O port.
    69         */
    70    
    71        /*! Port 1 Output Register */
    72        config GpioBits8PxOut_t P1OUT = {
    73            Bit0        : BIT0_OFF,
    74            Bit1        : BIT1_OFF,
    75            Bit2        : BIT2_OFF,
    76            Bit3        : BIT3_OFF,
    77            Bit4        : BIT4_OFF,
    78            Bit5        : BIT5_OFF,
    79            Bit6        : BIT6_OFF,
    80            Bit7        : BIT7_OFF
    81        };
    82    
    83        /*! Port 1 Port Select Register */
    84        config GpioBits8PxSel_t P1SEL = {
    85            Bit0        : BIT0_OFF,
    86            Bit1        : BIT1_OFF,
    87            Bit2        : BIT2_OFF,
    88            Bit3        : BIT3_OFF,
    89            Bit4        : BIT4_OFF,
    90            Bit5        : BIT5_OFF,
    91            Bit6        : BIT6_OFF,
    92            Bit7        : BIT7_OFF
    93        };
    94    
    95        /*! Port 1 Port Select 2 Register */
    96        config GpioBits8PxSel2_t P1SEL2 = {
    97            Bit0        : BIT0_OFF,
    98            Bit1        : BIT1_OFF,
    99            Bit2        : BIT2_OFF,
   100            Bit3        : BIT3_OFF,
   101            Bit4        : BIT4_OFF,
   102            Bit5        : BIT5_OFF,
   103            Bit6        : BIT6_OFF,
   104            Bit7        : BIT7_OFF
   105        };
   106    
   107        /*! Port 1 Direction Register */
   108        config GpioBits8PxDir_t P1DIR = {
   109            Bit0        : BIT0_OFF,
   110            Bit1        : BIT1_OFF,
   111            Bit2        : BIT2_OFF,
   112            Bit3        : BIT3_OFF,
   113            Bit4        : BIT4_OFF,
   114            Bit5        : BIT5_OFF,
   115            Bit6        : BIT6_OFF,
   116            Bit7        : BIT7_OFF
   117        };
   118    
   119        /*! Port 1 Resistor Enable Register */
   120        config GpioBits8PxRen_t P1REN = {
   121            Bit0        : BIT0_OFF,
   122            Bit1        : BIT1_OFF,
   123            Bit2        : BIT2_OFF,
   124            Bit3        : BIT3_OFF,
   125            Bit4        : BIT4_OFF,
   126            Bit5        : BIT5_OFF,
   127            Bit6        : BIT6_OFF,
   128            Bit7        : BIT7_OFF
   129        };
   130    
   131        /*! Port 2 Output Register */
   132        config GpioBits8PxOut_t P2OUT = {
   133            Bit0        : BIT0_OFF,
   134            Bit1        : BIT1_OFF,
   135            Bit2        : BIT2_OFF,
   136            Bit3        : BIT3_OFF,
   137            Bit4        : BIT4_OFF,
   138            Bit5        : BIT5_OFF,
   139            Bit6        : BIT6_OFF,
   140            Bit7        : BIT7_OFF
   141        };
   142    
   143        /*! Port 2 Port Select Register */
   144        config GpioBits8PxSel_t P2SEL = {
   145            Bit0        : BIT0_OFF,
   146            Bit1        : BIT1_OFF,
   147            Bit2        : BIT2_OFF,
   148            Bit3        : BIT3_OFF,
   149            Bit4        : BIT4_OFF,
   150            Bit5        : BIT5_OFF,
   151            Bit6        : BIT6,         /* POR default for all 2xx devices */
   152            Bit7        : BIT7          /* POR default for all 2xx devices */
   153        };
   154    
   155        /*! Port 2 Port Select 2 Register */
   156        config GpioBits8PxSel2_t P2SEL2 = {
   157            Bit0        : BIT0_OFF,
   158            Bit1        : BIT1_OFF,
   159            Bit2        : BIT2_OFF,
   160            Bit3        : BIT3_OFF,
   161            Bit4        : BIT4_OFF,
   162            Bit5        : BIT5_OFF,
   163            Bit6        : BIT6_OFF,
   164            Bit7        : BIT7_OFF
   165        };
   166    
   167        /*! Port 2 Direction Register */
   168        config GpioBits8PxDir_t P2DIR = {
   169            Bit0        : BIT0_OFF,
   170            Bit1        : BIT1_OFF,
   171            Bit2        : BIT2_OFF,
   172            Bit3        : BIT3_OFF,
   173            Bit4        : BIT4_OFF,
   174            Bit5        : BIT5_OFF,
   175            Bit6        : BIT6_OFF,
   176            Bit7        : BIT7_OFF
   177        };
   178    
   179        /*! Port 2 Resistor Enable Register */
   180        config GpioBits8PxRen_t P2REN = {
   181            Bit0        : BIT0_OFF,
   182            Bit1        : BIT1_OFF,
   183            Bit2        : BIT2_OFF,
   184            Bit3        : BIT3_OFF,
   185            Bit4        : BIT4_OFF,
   186            Bit5        : BIT5_OFF,
   187            Bit6        : BIT6_OFF,
   188            Bit7        : BIT7_OFF
   189        };
   190    }