1 /* --COPYRIGHT--,EPL
2 * Copyright (c) 2008 Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * --/COPYRIGHT--*/
12 import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
13
14 /*!
15 * ======== GPIO for MSP430F20x1 ========
16 * MSP430 General Purpose Input Output Ports
17 */
18 metaonly module GPIO_MSP430F20x1 inherits IGPIO {
19 /*!
20 * ======== create ========
21 * Create an instance of this peripheral.
22 */
23 create(Comparator.Instance comparator);
24
25 instance:
26 /*! @_nodoc */
27 config Comparator.Instance comparator;
28
29 /*! Define an array to describe all device pins. The 1st dimension
30 * denotes the port, the second the pin on that port. On an
31 * MSP430F20x1 device, there are 8 + 2 = 10 pins total.
32 */
33
34 /* TODO: This here should really be a module-wide feature, rather than an instance feature,
35 * however due to limitations in XDCtools 3.21.0.0 the data is located here */
36 readonly config DevicePin_t devicePins[2][8] =
37 [
38 [
39 {
40 pinName : "P1.0",
41 pinFunction : {
42 functionName : [
43 "GPIO Input",
44 "GPIO Output",
45 "Timer_A2.TACLK/INCLK",
46 "ACLK",
47 "CA0"
48 ],
49 functionConfig : [
50 [
51 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x01 },
52 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x01 },
53 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x01 }
54 ],
55 [
56 { register : "P1DIR", bitSetMask : 0x01, bitClearMask : 0x00 },
57 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x01 },
58 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x01 }
59 ],
60 [
61 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x01 },
62 { register : "P1SEL", bitSetMask : 0x01, bitClearMask : 0x00 },
63 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x01 }
64 ],
65 [
66 { register : "P1DIR", bitSetMask : 0x01, bitClearMask : 0x00 },
67 { register : "P1SEL", bitSetMask : 0x01, bitClearMask : 0x00 },
68 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x01 }
69 ],
70 [
71 { register : "CAPD", bitSetMask : 0x01, bitClearMask : 0x00 }
72 ]
73 ]
74 }
75 },
76 {
77 pinName : "P1.1",
78 pinFunction : {
79 functionName : [
80 "GPIO Input",
81 "GPIO Output",
82 "Timer_A2.CCI0A",
83 "Timer_A2.TA0",
84 "CA1"
85 ],
86 functionConfig : [
87 [
88 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x02 },
89 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x02 },
90 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x02 }
91 ],
92 [
93 { register : "P1DIR", bitSetMask : 0x02, bitClearMask : 0x00 },
94 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x02 },
95 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x02 }
96 ],
97 [
98 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x02 },
99 { register : "P1SEL", bitSetMask : 0x02, bitClearMask : 0x00 },
100 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x02 }
101 ],
102 [
103 { register : "P1DIR", bitSetMask : 0x02, bitClearMask : 0x00 },
104 { register : "P1SEL", bitSetMask : 0x02, bitClearMask : 0x00 },
105 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x02 }
106 ],
107 [
108 { register : "CAPD", bitSetMask : 0x02, bitClearMask : 0x00 }
109 ]
110 ]
111 }
112 },
113 {
114 pinName : "P1.2",
115 pinFunction : {
116 functionName : [
117 "GPIO Input",
118 "GPIO Output",
119 "Timer_A2.CCI1A",
120 "Timer_A2.TA1",
121 "CA2"
122 ],
123 functionConfig : [
124 [
125 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x04 },
126 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x04 },
127 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x04 }
128 ],
129 [
130 { register : "P1DIR", bitSetMask : 0x04, bitClearMask : 0x00 },
131 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x04 },
132 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x04 }
133 ],
134 [
135 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x04 },
136 { register : "P1SEL", bitSetMask : 0x04, bitClearMask : 0x00 },
137 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x04 }
138 ],
139 [
140 { register : "P1DIR", bitSetMask : 0x04, bitClearMask : 0x00 },
141 { register : "P1SEL", bitSetMask : 0x04, bitClearMask : 0x00 },
142 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x04 }
143 ],
144 [
145 { register : "CAPD", bitSetMask : 0x04, bitClearMask : 0x00 }
146 ]
147 ]
148 }
149 },
150 {
151 pinName : "P1.3",
152 pinFunction : {
153 functionName : [
154 "GPIO Input",
155 "GPIO Output",
156 "CAOUT",
157 "CA3"
158 ],
159 functionConfig : [
160 [
161 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x08 },
162 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x08 },
163 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x08 }
164 ],
165 [
166 { register : "P1DIR", bitSetMask : 0x08, bitClearMask : 0x00 },
167 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x08 },
168 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x08 }
169 ],
170 [
171 { register : "P1DIR", bitSetMask : 0x08, bitClearMask : 0x00 },
172 { register : "P1SEL", bitSetMask : 0x08, bitClearMask : 0x00 },
173 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x08 }
174 ],
175 [
176 { register : "CAPD", bitSetMask : 0x08, bitClearMask : 0x00 }
177 ]
178 ]
179 }
180 },
181 {
182 pinName : "P1.4",
183 pinFunction : {
184 functionName : [
185 "GPIO Input",
186 "GPIO Output",
187 "SMCLK",
188 "CA4"
189 ],
190 functionConfig : [
191 [
192 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x10 },
193 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x10 },
194 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x10 }
195 ],
196 [
197 { register : "P1DIR", bitSetMask : 0x10, bitClearMask : 0x00 },
198 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x10 },
199 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x10 }
200 ],
201 [
202 { register : "P1DIR", bitSetMask : 0x10, bitClearMask : 0x00 },
203 { register : "P1SEL", bitSetMask : 0x10, bitClearMask : 0x00 },
204 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x10 }
205 ],
206 [
207 { register : "CAPD", bitSetMask : 0x10, bitClearMask : 0x00 }
208 ]
209 ]
210 }
211 },
212 {
213 pinName : "P1.5",
214 pinFunction : {
215 functionName : [
216 "GPIO Input",
217 "GPIO Output",
218 "Timer_A2.TA0",
219 "CA5"
220 ],
221 functionConfig : [
222 [
223 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x20 },
224 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x20 },
225 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x20 }
226 ],
227 [
228 { register : "P1DIR", bitSetMask : 0x20, bitClearMask : 0x00 },
229 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x20 },
230 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x20 }
231 ],
232 [
233 { register : "P1DIR", bitSetMask : 0x20, bitClearMask : 0x00 },
234 { register : "P1SEL", bitSetMask : 0x20, bitClearMask : 0x00 },
235 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x20 }
236 ],
237 [
238 { register : "CAPD", bitSetMask : 0x20, bitClearMask : 0x00 }
239 ]
240 ]
241 }
242 },
243 {
244 pinName : "P1.6",
245 pinFunction : {
246 functionName : [
247 "GPIO Input",
248 "GPIO Output",
249 "Timer_A2.TA1",
250 "CA6"
251 ],
252 functionConfig : [
253 [
254 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x40 },
255 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x40 },
256 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x40 }
257 ],
258 [
259 { register : "P1DIR", bitSetMask : 0x40, bitClearMask : 0x00 },
260 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x40 },
261 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x40 }
262 ],
263 [
264 { register : "P1DIR", bitSetMask : 0x40, bitClearMask : 0x00 },
265 { register : "P1SEL", bitSetMask : 0x40, bitClearMask : 0x00 },
266 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x40 }
267 ],
268 [
269 { register : "CAPD", bitSetMask : 0x40, bitClearMask : 0x00 }
270 ]
271 ]
272 }
273 },
274 {
275 pinName : "P1.7",
276 pinFunction : {
277 functionName : [
278 "GPIO Input",
279 "GPIO Output",
280 "CAOUT",
281 "CA7"
282 ],
283 functionConfig : [
284 [
285 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x80 },
286 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x80 },
287 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x80 }
288 ],
289 [
290 { register : "P1DIR", bitSetMask : 0x80, bitClearMask : 0x00 },
291 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x80 },
292 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x80 }
293 ],
294 [
295 { register : "P1DIR", bitSetMask : 0x80, bitClearMask : 0x00 },
296 { register : "P1SEL", bitSetMask : 0x80, bitClearMask : 0x00 },
297 { register : "CAPD", bitSetMask : 0x00, bitClearMask : 0x80 }
298 ],
299 [
300 { register : "CAPD", bitSetMask : 0x80, bitClearMask : 0x00 }
301 ]
302 ]
303 }
304 }
305 ],
306 [
307 {
308 pinName : "P2.0",
309 pinFunction : {
310 functionName : [
311 ""
312 ],
313 functionConfig : [
314 [
315
316 ]
317 ]
318 }
319 },
320 {
321 pinName : "P2.1",
322 pinFunction : {
323 functionName : [
324 ""
325 ],
326 functionConfig : [
327 [
328
329 ]
330 ]
331 }
332 },
333 {
334 pinName : "P2.2",
335 pinFunction : {
336 functionName : [
337 ""
338 ],
339 functionConfig : [
340 [
341
342 ]
343 ]
344 }
345 },
346 {
347 pinName : "P2.3",
348 pinFunction : {
349 functionName : [
350 ""
351 ],
352 functionConfig : [
353 [
354
355 ]
356 ]
357 }
358 },
359 {
360 pinName : "P2.4",
361 pinFunction : {
362 functionName : [
363 ""
364 ],
365 functionConfig : [
366 [
367
368 ]
369 ]
370 }
371 },
372 {
373 pinName : "P2.5",
374 pinFunction : {
375 functionName : [
376 ""
377 ],
378 functionConfig : [
379 [
380
381 ]
382 ]
383 }
384 },
385 {
386 pinName : "P2.6",
387 pinFunction : {
388 functionName : [
389 "GPIO Input",
390 "GPIO Output",
391 "XIN",
392 "Timer_A2.TA1"
393 ],
394 functionConfig : [
395 [
396 { register : "P2DIR", bitSetMask : 0x00, bitClearMask : 0x40 },
397 { register : "P2SEL", bitSetMask : 0x00, bitClearMask : 0x40 }
398 ],
399 [
400 { register : "P2DIR", bitSetMask : 0x40, bitClearMask : 0x00 },
401 { register : "P2SEL", bitSetMask : 0x00, bitClearMask : 0x40 }
402 ],
403 [
404 { register : "P2DIR", bitSetMask : 0x00, bitClearMask : 0x40 },
405 { register : "P2SEL", bitSetMask : 0x40, bitClearMask : 0x00 }
406 ],
407 [
408 { register : "P2DIR", bitSetMask : 0x40, bitClearMask : 0x00 },
409 { register : "P2SEL", bitSetMask : 0x40, bitClearMask : 0x00 }
410 ]
411 ]
412 }
413 },
414 {
415 pinName : "P2.7",
416 pinFunction : {
417 functionName : [
418 "GPIO Input",
419 "GPIO Output",
420 "XOUT"
421 ],
422 functionConfig : [
423 [
424 { register : "P2DIR", bitSetMask : 0x00, bitClearMask : 0x80 },
425 { register : "P2SEL", bitSetMask : 0x00, bitClearMask : 0x80 }
426 ],
427 [
428 { register : "P2DIR", bitSetMask : 0x80, bitClearMask : 0x00 },
429 { register : "P2SEL", bitSetMask : 0x00, bitClearMask : 0x80 }
430 ],
431 [
432 { register : "P2SEL", bitSetMask : 0x80, bitClearMask : 0x00 }
433 ]
434 ]
435 }
436 }
437 ]
438 ];
439
440 /*! Implementation of Device Pin Functional Configuration */
441 override config DevicePinFunctionSetting_t devicePinSetting[2][8];
442
443 /*! Determine if each Register needs to be forced set or not */
444 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
445 [
446 { register : "P1OUT" , regForceSet : true },
447 { register : "P1SEL" , regForceSet : false },
448 { register : "P1DIR" , regForceSet : false },
449 { register : "P1REN" , regForceSet : false },
450 { register : "P1IES" , regForceSet : true },
451 { register : "P1IFG" , regForceSet : true },
452 { register : "P1IE" , regForceSet : false },
453 { register : "P2OUT" , regForceSet : true },
454 { register : "P2SEL" , regForceSet : false },
455 { register : "P2DIR" , regForceSet : false },
456 { register : "P2REN" , regForceSet : false },
457 { register : "P2IES" , regForceSet : true },
458 { register : "P2IFG" , regForceSet : true },
459 { register : "P2IE" , regForceSet : false }
460 ];
461
462 /*
463 * GPIO Digital I/O Registers
464 *
465 * One GIPO instance defines the configuration of an entire,
466 * 8-bit wide digital I/O port.
467 */
468
469 /*! Port 1 Output Register */
470 config GpioBits8PxOut_t P1OUT = {
471 Bit0 : BIT0_OFF,
472 Bit1 : BIT1_OFF,
473 Bit2 : BIT2_OFF,
474 Bit3 : BIT3_OFF,
475 Bit4 : BIT4_OFF,
476 Bit5 : BIT5_OFF,
477 Bit6 : BIT6_OFF,
478 Bit7 : BIT7_OFF
479 };
480
481 /*! Port 1 Port Select Register */
482 config GpioBits8PxSel_t P1SEL = {
483 Bit0 : BIT0_OFF,
484 Bit1 : BIT1_OFF,
485 Bit2 : BIT2_OFF,
486 Bit3 : BIT3_OFF,
487 Bit4 : BIT4_OFF,
488 Bit5 : BIT5_OFF,
489 Bit6 : BIT6_OFF,
490 Bit7 : BIT7_OFF
491 };
492
493 /*! Port 1 Direction Register */
494 config GpioBits8PxDir_t P1DIR = {
495 Bit0 : BIT0_OFF,
496 Bit1 : BIT1_OFF,
497 Bit2 : BIT2_OFF,
498 Bit3 : BIT3_OFF,
499 Bit4 : BIT4_OFF,
500 Bit5 : BIT5_OFF,
501 Bit6 : BIT6_OFF,
502 Bit7 : BIT7_OFF
503 };
504
505 /*! Port 1 Resistor Enable Register */
506 config GpioBits8PxRen_t P1REN = {
507 Bit0 : BIT0_OFF,
508 Bit1 : BIT1_OFF,
509 Bit2 : BIT2_OFF,
510 Bit3 : BIT3_OFF,
511 Bit4 : BIT4_OFF,
512 Bit5 : BIT5_OFF,
513 Bit6 : BIT6_OFF,
514 Bit7 : BIT7_OFF
515 };
516
517 /*! Port 2 Output Register */
518 config GpioBits8PxOut_t P2OUT = {
519 Bit0 : BIT0_OFF,
520 Bit1 : BIT1_OFF,
521 Bit2 : BIT2_OFF,
522 Bit3 : BIT3_OFF,
523 Bit4 : BIT4_OFF,
524 Bit5 : BIT5_OFF,
525 Bit6 : BIT6_OFF,
526 Bit7 : BIT7_OFF
527 };
528
529 /*! Port 2 Port Select Register */
530 config GpioBits8PxSel_t P2SEL = {
531 Bit0 : BIT0_OFF,
532 Bit1 : BIT1_OFF,
533 Bit2 : BIT2_OFF,
534 Bit3 : BIT3_OFF,
535 Bit4 : BIT4_OFF,
536 Bit5 : BIT5_OFF,
537 Bit6 : BIT6, /* POR default for all 2xx devices */
538 Bit7 : BIT7 /* POR default for all 2xx devices */
539 };
540
541 /*! Port 2 Direction Register */
542 config GpioBits8PxDir_t P2DIR = {
543 Bit0 : BIT0_OFF,
544 Bit1 : BIT1_OFF,
545 Bit2 : BIT2_OFF,
546 Bit3 : BIT3_OFF,
547 Bit4 : BIT4_OFF,
548 Bit5 : BIT5_OFF,
549 Bit6 : BIT6_OFF,
550 Bit7 : BIT7_OFF
551 };
552
553 /*! Port 2 Resistor Enable Register */
554 config GpioBits8PxRen_t P2REN = {
555 Bit0 : BIT0_OFF,
556 Bit1 : BIT1_OFF,
557 Bit2 : BIT2_OFF,
558 Bit3 : BIT3_OFF,
559 Bit4 : BIT4_OFF,
560 Bit5 : BIT5_OFF,
561 Bit6 : BIT6_OFF,
562 Bit7 : BIT7_OFF
563 };
564
565 }