1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    import ti.catalog.msp430.peripherals.clock.IClock;
    13    
    14    /*!
    15     * Universal Serial Communication Interface A1 SPI 2xx
    16     */
    17    metaonly module USCI_A1_SPI_2xx inherits IUSCI_A1_SPI {
    18        /*
    19         *  ======== create ========
    20         */
    21        create(IClock.Instance clock);
    22    
    23        /*! USCI_A1 transmit interrupt enable */
    24        enum UCA1TXIE_t {
    25            UCA1TXIE_OFF = 0x00,    /*! Interrupt disabled */
    26            UCA1TXIE = 0x02         /*! Interrupt enabled */
    27        };
    28    
    29        /*! USCI_A1 receive interrupt enable */
    30        enum UCA1RXIE_t {
    31            UCA1RXIE_OFF = 0x00,     /*! Interrupt disabled */
    32            UCA1RXIE = 0x01          /*! Interrupt enabled */
    33        };
    34    
    35        /*! USCI_A1 SPI Interrupt Enable Register */
    36        struct UC1IE_t {
    37            UCA1TXIE_t  UCA1TXIE;   /*! USCI_A1 transmit interrupt enable
    38                                     *  0  Interrupt disabled
    39                                     *  1  Interrupt enabled */
    40            UCA1RXIE_t  UCA1RXIE;   /*! USCI_A1 receive interrupt enable
    41                                     *  0  Interrupt disabled
    42                                     *  1  Interrupt enabled */
    43        }
    44    
    45    instance:
    46        /*! @_nodoc */
    47        config IClock.Instance clock;
    48    
    49        /*! USCI_A1 Interrupt Enable Register */
    50        config UC1IE_t UC1IE = {
    51            UCA1TXIE    : UCA1TXIE_OFF,
    52            UCA1RXIE    : UCA1RXIE_OFF
    53        };
    54    
    55        /*! USCI_A1 UART interrupt enables */
    56        config regIntVect_t interruptSource[2];
    57    
    58        /*! Determine if each Register needs to be forced set or not */
    59        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    60        [
    61            { register : "UCA1CTL0"   , regForceSet : false },
    62            { register : "UCA1CTL1"   , regForceSet : false },
    63            { register : "UCA1BR0"    , regForceSet : false },
    64            { register : "UCA1BR1"    , regForceSet : false },
    65            { register : "UCA1STAT"   , regForceSet : false },
    66            { register : "UCA1RXBUF"  , regForceSet : false },
    67            { register : "UCA1TXBUF"  , regForceSet : false },
    68            { register : "UC1IE"      , regForceSet : false }
    69        ];
    70    }