1    /*
     2     *  Copyright (c) 2012 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== TMS320F28062.xdc ========
    15     */
    16    package ti.catalog.c2800;
    17    
    18    /*!
    19     *  ======== TMS320F28062 ========
    20     *  The F28062 device data sheet module.
    21     *
    22     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    23     *  by platforms to obtain "data sheet" information about this device.
    24     */
    25    metaonly module TMS320F28062 inherits ITMS320C283xx
    26    {
    27    instance:
    28        override config string   cpuCoreRevision = "1.0";
    29    
    30        /*!
    31         *  ======== memMap ========
    32         *  The default memory map for this device
    33         */
    34        config xdc.platform.IPlatform.Memory memMap[string]  = [
    35            ["MSARAM", {
    36                comment: "On-Chip RAM Memory",
    37                name: "MSARAM",
    38                base: 0x0,
    39                len:  0x800,
    40                page: 0,
    41                space: "code/data"
    42            }],
    43        
    44            ["PIEVECT", {
    45                comment: "On-Chip PIEVECT RAM Memory",
    46                name:    "PIEVECT",
    47                base:    0xD00,
    48                len:     0x100,
    49                page: 1,
    50                space:   "data"
    51            }],
    52        
    53            ["L03DPSARAM", {
    54                comment: "L0-L3 DPSARAM (8K x 16)",
    55                name: "L03DPSARAM",
    56                base: 0x8000,
    57                len:  0x2000,
    58                page: 0,
    59                space: "code/data"
    60            }],
    61    
    62            ["L4SARAM", {
    63                comment: "L4 SARAM (8K x 16)",
    64                name: "L4SARAM",
    65                base: 0xA000,
    66                len:  0x2000,
    67                page: 0,
    68                space: "code/data"
    69            }],
    70    
    71            ["L5DPSARAM", {
    72                comment: "L5 DPSARAM (8K x 16)",
    73                name: "L5DPSARAM",
    74                base: 0xC000,
    75                len:  0x2000,
    76                page: 0,
    77                space: "code/data"
    78            }],
    79    
    80            ["OTP", {
    81                comment: "1K X 16 OTP memory",
    82                name: "OTP",
    83                base: 0x3D7800,
    84                len:  0x0003FA,
    85                page: 0,
    86                space: "code"
    87            }],
    88        
    89            ["FLASH", {
    90                comment: "64K X 16 Flash memory",
    91                name: "FLASH",
    92                base: 0x3E8000,
    93                len:  0x00FF80,
    94                page: 0,
    95                space: "code"
    96            }],
    97    
    98            ["BEGIN", {
    99                comment: "FLASH boot entry point",
   100                name: "BEGIN",
   101                base: 0x3f7ff6,
   102                len:  0x000002,
   103                page: 0,
   104                space: "code"
   105            }],
   106        
   107            ["BOOTROM", {
   108                comment: "On-Chip Boot ROM",
   109                name: "BOOTROM",
   110                base: 0x3F8000,
   111                len:  0x007FC0, 
   112                page: 0,
   113                space: "code"
   114            }],
   115        ];
   116    }
   117    /*
   118     *  @(#) ti.catalog.c2800; 1, 0, 0, 0,401; 8-17-2012 22:13:26; /db/ztree/library/trees/platform/platform-n27x/src/
   119     */
   120