1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    
    13    /*!
    14     *  ======== IRTC ========
    15     *  MSP430 Real-Time Clock interface
    16     */
    17    metaonly interface IRTC inherits xdc.platform.IPeripheral {
    18    
    19        /*!
    20        *  ======== ForceSetDefaultRegister_t ========
    21        *  Force Set Default Register
    22        *
    23        *  Type to store if each register needs to be forced initialized
    24        *  even if the register is in default state.
    25        *
    26        *  @see #ForceSetDefaultRegister_t
    27        */
    28        struct ForceSetDefaultRegister_t {
    29            String     register;
    30            Bool       regForceSet;
    31        }
    32    
    33        /*!
    34        *  ======== regIntVect_t ========
    35        *  Interrupt vector description
    36        *
    37        *  Type to describe a single interrupt vector pin and all its possible
    38        *  configurations.
    39        *
    40        *  @see #regIntVect_t
    41        */
    42        struct regIntVect_t {
    43            String                    registerName;
    44            String                    registerDescription;
    45            String                    isrToggleString;
    46            String                    priorityName;
    47            Bool                      interruptEnable;
    48            Bool                      interruptHandler;
    49            Int                       priority;
    50        }
    51        
    52    
    53    instance:
    54    
    55    }
    56    
    57