1 2 3 4 5 6 7 8 9 10 11
12 import ti.catalog.msp430.peripherals.communication.USI as USI;
13 import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
14 import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
15
16 /*!
17 * ======== GPIO for MSP430G2x52 ========
18 * MSP430 General Purpose Input Output Ports
19 */
20 metaonly module GPIO_MSP430G2x52 inherits IGPIO {
21 /*!
22 * ======== create ========
23 * Create an instance of these peripherals.
24 */
25 create(USI.Instance usi, Comparator.Instance comparator, ADC10.Instance adc10);
26
27 instance:
28 /*! @_nodoc */
29 config USI.Instance usi;
30
31 /*! @_nodoc */
32 config Comparator.Instance comparator;
33
34 /*! @_nodoc */
35 config ADC10.Instance adc10;
36
37 /*! Define an array to describe all device pins. The 1st dimension
38 * denotes the port, the second the pin on that port. On an
39 * MSP430G2x52 device, there are 8 + 8 = 16 pins total.
40 */
41
42 43
44 45
46 config DevicePin_t devicePins[2][8];
47
48 /*! Implementation of Device Pin Functional Configuration */
49 override config DevicePinFunctionSetting_t devicePinSetting[2][8];
50
51 /*! Determine if each Register needs to be forced set or not */
52 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
53 [
54 { register : "P1OUT" , regForceSet : true },
55 { register : "P1SEL" , regForceSet : false },
56 { register : "P1SEL2", regForceSet : false },
57 { register : "P1DIR" , regForceSet : false },
58 { register : "P1REN" , regForceSet : false },
59 { register : "P1IES" , regForceSet : true },
60 { register : "P1IFG" , regForceSet : true },
61 { register : "P1IE" , regForceSet : false },
62 { register : "P2OUT" , regForceSet : true },
63 { register : "P2SEL" , regForceSet : false },
64 { register : "P2SEL2", regForceSet : false },
65 { register : "P2DIR" , regForceSet : false },
66 { register : "P2REN" , regForceSet : false },
67 { register : "P2IES" , regForceSet : true },
68 { register : "P2IFG" , regForceSet : true },
69 { register : "P2IE" , regForceSet : false }
70 ];
71
72 73 74 75 76 77
78
79 /*! Port 1 Output Register */
80 config GpioBits8PxOut_t P1OUT = {
81 Bit0 : BIT0_OFF,
82 Bit1 : BIT1_OFF,
83 Bit2 : BIT2_OFF,
84 Bit3 : BIT3_OFF,
85 Bit4 : BIT4_OFF,
86 Bit5 : BIT5_OFF,
87 Bit6 : BIT6_OFF,
88 Bit7 : BIT7_OFF
89 };
90
91 /*! Port 1 Port Select Register */
92 config GpioBits8PxSel_t P1SEL = {
93 Bit0 : BIT0_OFF,
94 Bit1 : BIT1_OFF,
95 Bit2 : BIT2_OFF,
96 Bit3 : BIT3_OFF,
97 Bit4 : BIT4_OFF,
98 Bit5 : BIT5_OFF,
99 Bit6 : BIT6_OFF,
100 Bit7 : BIT7_OFF
101 };
102
103 /*! Port 1 Port Select 2 Register */
104 config GpioBits8PxSel2_t P1SEL2 = {
105 Bit0 : BIT0_OFF,
106 Bit1 : BIT1_OFF,
107 Bit2 : BIT2_OFF,
108 Bit3 : BIT3_OFF,
109 Bit4 : BIT4_OFF,
110 Bit5 : BIT5_OFF,
111 Bit6 : BIT6_OFF,
112 Bit7 : BIT7_OFF
113 };
114
115 /*! Port 1 Direction Register */
116 config GpioBits8PxDir_t P1DIR = {
117 Bit0 : BIT0_OFF,
118 Bit1 : BIT1_OFF,
119 Bit2 : BIT2_OFF,
120 Bit3 : BIT3_OFF,
121 Bit4 : BIT4_OFF,
122 Bit5 : BIT5_OFF,
123 Bit6 : BIT6_OFF,
124 Bit7 : BIT7_OFF
125 };
126
127 /*! Port 1 Resistor Enable Register */
128 config GpioBits8PxRen_t P1REN = {
129 Bit0 : BIT0_OFF,
130 Bit1 : BIT1_OFF,
131 Bit2 : BIT2_OFF,
132 Bit3 : BIT3_OFF,
133 Bit4 : BIT4_OFF,
134 Bit5 : BIT5_OFF,
135 Bit6 : BIT6_OFF,
136 Bit7 : BIT7_OFF
137 };
138
139 /*! Port 2 Output Register */
140 config GpioBits8PxOut_t P2OUT = {
141 Bit0 : BIT0_OFF,
142 Bit1 : BIT1_OFF,
143 Bit2 : BIT2_OFF,
144 Bit3 : BIT3_OFF,
145 Bit4 : BIT4_OFF,
146 Bit5 : BIT5_OFF,
147 Bit6 : BIT6_OFF,
148 Bit7 : BIT7_OFF
149 };
150
151 /*! Port 2 Port Select Register */
152 config GpioBits8PxSel_t P2SEL = {
153 Bit0 : BIT0_OFF,
154 Bit1 : BIT1_OFF,
155 Bit2 : BIT2_OFF,
156 Bit3 : BIT3_OFF,
157 Bit4 : BIT4_OFF,
158 Bit5 : BIT5_OFF,
159 Bit6 : BIT6,
160 Bit7 : BIT7
161 };
162
163 /*! Port 2 Port Select 2 Register */
164 config GpioBits8PxSel2_t P2SEL2 = {
165 Bit0 : BIT0_OFF,
166 Bit1 : BIT1_OFF,
167 Bit2 : BIT2_OFF,
168 Bit3 : BIT3_OFF,
169 Bit4 : BIT4_OFF,
170 Bit5 : BIT5_OFF,
171 Bit6 : BIT6_OFF,
172 Bit7 : BIT7_OFF
173 };
174
175 /*! Port 2 Direction Register */
176 config GpioBits8PxDir_t P2DIR = {
177 Bit0 : BIT0_OFF,
178 Bit1 : BIT1_OFF,
179 Bit2 : BIT2_OFF,
180 Bit3 : BIT3_OFF,
181 Bit4 : BIT4_OFF,
182 Bit5 : BIT5_OFF,
183 Bit6 : BIT6_OFF,
184 Bit7 : BIT7_OFF
185 };
186
187 /*! Port 2 Resistor Enable Register */
188 config GpioBits8PxRen_t P2REN = {
189 Bit0 : BIT0_OFF,
190 Bit1 : BIT1_OFF,
191 Bit2 : BIT2_OFF,
192 Bit3 : BIT3_OFF,
193 Bit4 : BIT4_OFF,
194 Bit5 : BIT5_OFF,
195 Bit6 : BIT6_OFF,
196 Bit7 : BIT7_OFF
197 };
198 }