1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    /*!
    13     *  ======== IGPIO ========
    14     *  MSP430 General Purpose Input Output Ports
    15     */
    16    metaonly interface IGPIO inherits xdc.platform.IPeripheral {
    17    
    18        /*! Pull-up/down resistor enables drop down list */
    19        enum ResEnable_t {
    20            PUDRE_OFF  = 0x00u,                  /*! Disabled */
    21            PUDRE_UP   = 0x01u,                  /*! Pull-Up Resistor */
    22            PUDRE_DOWN = 0x02u                   /*! Pull-Down Resistor */
    23        }
    24    
    25        /*! Interrupt enables drop down list */
    26        enum InterruptEnable_t {
    27            IE_OFF     = 0x00u,                 /*! Disabled */
    28            IE_FALLING = 0x01u,                 /*! Interrupt Enabled Falling Edge */
    29            IE_RISING  = 0x02u                  /*! Interrupt Enabled Rising Edge  */
    30        }
    31    
    32        /*! Output high or low drop down list */
    33        enum OutputState_t {
    34            OUTSTATE_LOW   = 0x00u,             /*! Output Set Low (Default) */
    35            OUTSTATE_HIGH  = 0x01u              /*! Output Set High */
    36        }
    37    
    38        /*! GPIO Bit 0 Definitions */
    39        enum Bit0_t {
    40            BIT0_OFF = 0x00u,
    41            BIT0 = 0x01u
    42        };
    43    
    44        enum Bit1_t {
    45            BIT1_OFF = 0x00u,
    46            BIT1 = 0x02u
    47        };
    48    
    49        enum Bit2_t {
    50            BIT2_OFF = 0x00u,
    51            BIT2 = 0x04u
    52        };
    53    
    54        enum Bit3_t {
    55            BIT3_OFF = 0x00u,
    56            BIT3 = 0x08u
    57        };
    58    
    59        enum Bit4_t {
    60            BIT4_OFF = 0x00u,
    61            BIT4 = 0x10u
    62        };
    63    
    64        enum Bit5_t {
    65            BIT5_OFF = 0x00u,
    66            BIT5 = 0x20u
    67        };
    68    
    69        enum Bit6_t {
    70            BIT6_OFF = 0x00u,
    71            BIT6 = 0x20u
    72        };
    73    
    74        enum Bit7_t {
    75            BIT7_OFF = 0x00u,
    76            BIT7 = 0x80u
    77        };
    78    
    79        /*!
    80        *  ======== GpioBits8_t ========
    81        *  Generic GPIO 8-bit Register
    82        *
    83        *  @see #GpioBits8_t
    84        */
    85        struct GpioBits8PxIn_t {
    86            Bit0_t    Bit0;     /*! GPIO Input Signal Bit 0 */
    87            Bit1_t    Bit1;     /*! GPIO Input Signal Bit 1 */
    88            Bit2_t    Bit2;     /*! GPIO Input Signal Bit 2 */
    89            Bit3_t    Bit3;     /*! GPIO Input Signal Bit 3 */
    90            Bit4_t    Bit4;     /*! GPIO Input Signal Bit 4 */
    91            Bit5_t    Bit5;     /*! GPIO Input Signal Bit 5 */
    92            Bit6_t    Bit6;     /*! GPIO Input Signal Bit 6 */
    93            Bit7_t    Bit7;     /*! GPIO Input Signal Bit 7 */
    94        }
    95    
    96        /*!
    97        *  ======== GpioBits8PxOut_t ========
    98        *  Generic GPIO 8-bit PxOUT Register
    99        *
   100        *  @see #GpioBits8PxOut_t
   101        */
   102        struct GpioBits8PxOut_t {
   103            Bit0_t    Bit0;     /*! GPIO Output Signal Bit 0 */
   104            Bit1_t    Bit1;     /*! GPIO Output Signal Bit 1 */
   105            Bit2_t    Bit2;     /*! GPIO Output Signal Bit 2 */
   106            Bit3_t    Bit3;     /*! GPIO Output Signal Bit 3 */
   107            Bit4_t    Bit4;     /*! GPIO Output Signal Bit 4 */
   108            Bit5_t    Bit5;     /*! GPIO Output Signal Bit 5 */
   109            Bit6_t    Bit6;     /*! GPIO Output Signal Bit 6 */
   110            Bit7_t    Bit7;     /*! GPIO Output Signal Bit 7 */
   111        }
   112    
   113        /*!
   114        *  ======== GpioBits8PxDir_t ========
   115        *  Generic GPIO 8-bit PxDIR Register
   116        *
   117        *  @see #GpioBits8PxDir_t
   118        */
   119        struct GpioBits8PxDir_t {
   120            Bit0_t    Bit0;     /*! GPIO Select Direction Bit 0
   121                                   *  Bit = 0: The port pin is switched to input direction
   122                                   *  Bit = 1: The port pin is switched to output direction */
   123            Bit1_t    Bit1;     /*! GPIO Select Direction Bit 1
   124                                   *  Bit = 0: The port pin is switched to input direction
   125                                   *  Bit = 1: The port pin is switched to output direction */
   126            Bit2_t    Bit2;     /*! GPIO Select Direction Bit 2
   127                                   *  Bit = 0: The port pin is switched to input direction
   128                                   *  Bit = 1: The port pin is switched to output direction */
   129            Bit3_t    Bit3;     /*! GPIO Select Direction Bit 3
   130                                   *  Bit = 0: The port pin is switched to input direction
   131                                   *  Bit = 1: The port pin is switched to output direction */
   132            Bit4_t    Bit4;     /*! GPIO Select Direction Bit 4
   133                                   *  Bit = 0: The port pin is switched to input direction
   134                                   *  Bit = 1: The port pin is switched to output direction */
   135            Bit5_t    Bit5;     /*! GPIO Select Direction Bit 5
   136                                   *  Bit = 0: The port pin is switched to input direction
   137                                   *  Bit = 1: The port pin is switched to output direction */
   138            Bit6_t    Bit6;     /*! GPIO Select Direction Bit 6
   139                                   *  Bit = 0: The port pin is switched to input direction
   140                                   *  Bit = 1: The port pin is switched to output direction */
   141            Bit7_t    Bit7;     /*! GPIO Select Direction Bit 7
   142                                   *  Bit = 0: The port pin is switched to input direction
   143                                   *  Bit = 1: The port pin is switched to output direction */
   144        }
   145    
   146        /*!
   147        *  ======== GpioBits8PxRen_t ========
   148        *  Generic GPIO 8-bit PxREN Register
   149        *
   150        *  @see #GpioBits8PxRen_t
   151        */
   152        struct GpioBits8PxRen_t {
   153            Bit0_t    Bit0;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 0
   154                                   *  Bit = 0: Pullup/pulldown resistor disabled
   155                                   *  Bit = 1: Pullup/pulldown resistor enabled
   156                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   157            Bit1_t    Bit1;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 1
   158                                   *  Bit = 0: Pullup/pulldown resistor disabled
   159                                   *  Bit = 1: Pullup/pulldown resistor enabled
   160                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   161            Bit2_t    Bit2;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 2
   162                                   *  Bit = 0: Pullup/pulldown resistor disabled
   163                                   *  Bit = 1: Pullup/pulldown resistor enabled
   164                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   165            Bit3_t    Bit3;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 3
   166                                   *  Bit = 0: Pullup/pulldown resistor disabled
   167                                   *  Bit = 1: Pullup/pulldown resistor enabled
   168                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   169            Bit4_t    Bit4;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 4
   170                                   *  Bit = 0: Pullup/pulldown resistor disabled
   171                                   *  Bit = 1: Pullup/pulldown resistor enabled
   172                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   173            Bit5_t    Bit5;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 5
   174                                   *  Bit = 0: Pullup/pulldown resistor disabled
   175                                   *  Bit = 1: Pullup/pulldown resistor enabled
   176                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   177            Bit6_t    Bit6;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 6
   178                                   *  Bit = 0: Pullup/pulldown resistor disabled
   179                                   *  Bit = 1: Pullup/pulldown resistor enabled
   180                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   181            Bit7_t    Bit7;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 7
   182                                   *  Bit = 0: Pullup/pulldown resistor disabled
   183                                   *  Bit = 1: Pullup/pulldown resistor enabled
   184                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   185        }
   186    
   187        /*!
   188        *  ======== GpioBits8PxSel_t ========
   189        *  Generic GPIO 8-bit PxSEL Register
   190        *
   191        *  @see #GpioBits8PxSel_t
   192        */
   193        struct GpioBits8PxSel_t {
   194            Bit0_t    Bit0;     /*! GPIO Select Pin Function Bit 0
   195                                   *See the device-specific data sheet to determine pin functions. */
   196            Bit1_t    Bit1;     /*! GPIO Select Pin Function Bit 1
   197                                   *See the device-specific data sheet to determine pin functions. */
   198            Bit2_t    Bit2;     /*! GPIO Select Pin Function Bit 2
   199                                   *See the device-specific data sheet to determine pin functions. */
   200            Bit3_t    Bit3;     /*! GPIO Select Pin Function Bit 3
   201                                   *See the device-specific data sheet to determine pin functions. */
   202            Bit4_t    Bit4;     /*! GPIO Select Pin Function Bit 4
   203                                   *See the device-specific data sheet to determine pin functions. */
   204            Bit5_t    Bit5;     /*! GPIO Select Pin Function Bit 5
   205                                   *See the device-specific data sheet to determine pin functions. */
   206            Bit6_t    Bit6;     /*! GPIO Select Pin Function Bit 6
   207                                   *See the device-specific data sheet to determine pin functions. */
   208            Bit7_t    Bit7;     /*! GPIO Select Pin Function Bit 7
   209                                   *See the device-specific data sheet to determine pin functions. */
   210        }
   211    
   212        /*!
   213        *  ======== GpioBits8PxSel2_t ========
   214        *  Generic GPIO 8-bit PxSEL2 Register
   215        *
   216        *  @see #GpioBits8PxSel2_t
   217        */
   218        struct GpioBits8PxSel2_t {
   219            Bit0_t    Bit0;     /*! GPIO Select Pin Function Bit 0
   220                                   *See the device-specific data sheet to determine pin functions. */
   221            Bit1_t    Bit1;     /*! GPIO Select Pin Function Bit 1
   222                                   *See the device-specific data sheet to determine pin functions. */
   223            Bit2_t    Bit2;     /*! GPIO Select Pin Function Bit 2
   224                                   *See the device-specific data sheet to determine pin functions. */
   225            Bit3_t    Bit3;     /*! GPIO Select Pin Function Bit 3
   226                                   *See the device-specific data sheet to determine pin functions. */
   227            Bit4_t    Bit4;     /*! GPIO Select Pin Function Bit 4
   228                                   *See the device-specific data sheet to determine pin functions. */
   229            Bit5_t    Bit5;     /*! GPIO Select Pin Function Bit 5
   230                                   *See the device-specific data sheet to determine pin functions. */
   231            Bit6_t    Bit6;     /*! GPIO Select Pin Function Bit 6
   232                                   *See the device-specific data sheet to determine pin functions. */
   233            Bit7_t    Bit7;     /*! GPIO Select Pin Function Bit 7
   234                                   *See the device-specific data sheet to determine pin functions. */
   235        }
   236    
   237        /*!
   238        *  ======== GpioBits8PxIe_t ========
   239        *  Generic GPIO 8-bit PxIE Register
   240        *
   241        *  @see #GpioBits8PxIe_t
   242        */
   243        struct GpioBits8PxIe_t {
   244            Bit0_t    Bit0;     /*! GPIO Interrupt Enable Bit 0
   245                                   *  Bit = 0: The interrupt is disabled.
   246                                   *  Bit = 1: The interrupt is enabled. */
   247            Bit1_t    Bit1;     /*! GPIO Interrupt Enable Bit 1
   248                                   *  Bit = 0: The interrupt is disabled.
   249                                   *  Bit = 1: The interrupt is enabled. */
   250            Bit2_t    Bit2;     /*! GPIO Interrupt Enable Bit 2
   251                                   *  Bit = 0: The interrupt is disabled.
   252                                   *  Bit = 1: The interrupt is enabled. */
   253            Bit3_t    Bit3;     /*! GPIO Interrupt Enable Bit 3
   254                                   *  Bit = 0: The interrupt is disabled.
   255                                   *  Bit = 1: The interrupt is enabled. */
   256            Bit4_t    Bit4;     /*! GPIO Interrupt Enable Bit 4
   257                                   *  Bit = 0: The interrupt is disabled.
   258                                   *  Bit = 1: The interrupt is enabled. */
   259            Bit5_t    Bit5;     /*! GPIO Interrupt Enable Bit 5
   260                                   *  Bit = 0: The interrupt is disabled.
   261                                   *  Bit = 1: The interrupt is enabled. */
   262            Bit6_t    Bit6;     /*! GPIO Interrupt Enable Bit 6
   263                                   *  Bit = 0: The interrupt is disabled.
   264                                   *  Bit = 1: The interrupt is enabled. */
   265            Bit7_t    Bit7;     /*! GPIO Interrupt Enable Bit 7
   266                                   *  Bit = 0: The interrupt is disabled.
   267                                   *  Bit = 1: The interrupt is enabled. */
   268        }
   269    
   270        /*!
   271        *  ======== GpioBits8PxIes_t ========
   272        *  Generic GPIO 8-bit PxIES Register
   273        *
   274        *  @see #GpioBits8PxIes_t
   275        */
   276        struct GpioBits8PxIes_t {
   277            Bit0_t    Bit0;     /*! GPIO Select Interrupt Edge Bit 0
   278                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   279                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   280            Bit1_t    Bit1;     /*! GPIO Select Interrupt Edge Bit 1
   281                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   282                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   283            Bit2_t    Bit2;     /*! GPIO Select Interrupt Edge Bit 2
   284                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   285                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   286            Bit3_t    Bit3;     /*! GPIO Select Interrupt Edge Bit 3
   287                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   288                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   289            Bit4_t    Bit4;     /*! GPIO Select Interrupt Edge Bit 4
   290                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   291                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   292            Bit5_t    Bit5;     /*! GPIO Select Interrupt Edge Bit 5
   293                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   294                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   295            Bit6_t    Bit6;     /*! GPIO Select Interrupt Edge Bit 6
   296                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   297                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   298            Bit7_t    Bit7;     /*! GPIO Select Interrupt Edge Bit 7
   299                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   300                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   301        }
   302    
   303        /*!
   304        *  ======== GpioBits8PxIfg_t ========
   305        *  Generic GPIO 8-bit PxIFG Register
   306        *
   307        *  @see #GpioBits8PxIfg_t
   308        */
   309        struct GpioBits8PxIfg_t {
   310            Bit0_t    Bit0;     /*! GPIO Interrupt Flag Bit 0
   311                                   *  Bit = 0: No interrupt is pending
   312                                   *  Bit = 1: An interrupt is pending */
   313            Bit1_t    Bit1;     /*! GPIO Interrupt Flag Bit 1
   314                                   *  Bit = 0: No interrupt is pending
   315                                   *  Bit = 1: An interrupt is pending */
   316            Bit2_t    Bit2;     /*! GPIO Interrupt Flag Bit 2
   317                                   *  Bit = 0: No interrupt is pending
   318                                   *  Bit = 1: An interrupt is pending */
   319            Bit3_t    Bit3;     /*! GPIO Interrupt Flag Bit 3
   320                                   *  Bit = 0: No interrupt is pending
   321                                   *  Bit = 1: An interrupt is pending */
   322            Bit4_t    Bit4;     /*! GPIO Interrupt Flag Bit 4
   323                                   *  Bit = 0: No interrupt is pending
   324                                   *  Bit = 1: An interrupt is pending */
   325            Bit5_t    Bit5;     /*! GPIO Interrupt Flag Bit 5
   326                                   *  Bit = 0: No interrupt is pending
   327                                   *  Bit = 1: An interrupt is pending */
   328            Bit6_t    Bit6;     /*! GPIO Interrupt Flag Bit 6
   329                                   *  Bit = 0: No interrupt is pending
   330                                   *  Bit = 1: An interrupt is pending */
   331            Bit7_t    Bit7;     /*! GPIO Interrupt Flag Bit 7
   332                                   *  Bit = 0: No interrupt is pending
   333                                   *  Bit = 1: An interrupt is pending */
   334        }
   335    
   336        /*!
   337        *  ======== DeviceRegisterConfig_t ========
   338        *  Device Register Configuration Descriptor
   339        *
   340        *  Type to describe how a register is configured for a particular
   341        *  use. The type allows setting and clearing of an arbitrary bit
   342        *  pattern inside the specified register.
   343        *
   344        *  @see #DeviceRegisterConfig_t
   345        */
   346        struct DeviceRegisterConfig_t {
   347            String              register;
   348            UInt                bitSetMask;
   349            UInt                bitClearMask;
   350        }
   351    
   352        /*!
   353        *  ======== DevicePinFunction_t ========
   354        *  Device Pin Functional Descriptor
   355        *
   356        *  Type to describe how a device pin is configured for all its
   357        *  different uses that are possible. The function names are consolidated
   358        *  in one String array rather than located together with the function-
   359        *  specific data to allow easier access by Grace widgets. The functionConfig
   360        *  member contains an arbitrary-length array describing all register
   361        *  settings that need to be performed to configure a certain function.
   362        *
   363        *  @see #DevicePinFunction_t
   364        */
   365        struct DevicePinFunction_t {
   366            String                    functionName[];
   367            DeviceRegisterConfig_t    functionConfig[][];
   368        }
   369    
   370        /*!
   371        *  ======== DevicePin_t ========
   372        *  Device Pin Descriptor
   373        *
   374        *  Type to describe a single device pin and all its possible
   375        *  configurations.
   376        *
   377        *  @see #DevicePin_t
   378        */
   379        struct DevicePin_t {
   380            String                    pinName;
   381            DevicePinFunction_t       pinFunction;
   382        }
   383    
   384        /*!
   385        *  ======== MatchedPortFunction_t ========
   386        *  Port Function Enumeration Type
   387        *
   388        *  This type is used to store a list of applicable pins based on the
   389        *  search criteria when using the function findPinsForFunction().
   390        *
   391        *  @see #MatchedPortFunction_t
   392        */
   393        struct MatchedPortFunction_t {
   394            UInt      port[];
   395            UInt      pin[];
   396            String    pinName[];
   397            UInt      functionIndex[];
   398            String    functionName[];
   399        }
   400    
   401        /*!
   402        *  ======== DevicePinFunctionSetting_t ========
   403        *  Device Pin Functional Setting Descriptor
   404        *
   405        *  Type to store the selected pin configuration and a reference
   406        *  to the object that last modified the configuration.
   407        *
   408        *  @see #DevicePinFunctionSetting_t
   409        */
   410        struct DevicePinFunctionSetting_t {
   411            UInt               functionIndex;       /*! Device Pin Functional Selection */
   412            Any                owner;               /*! Current Device Pin Owner */
   413            ResEnable_t        resistorEnable;      /*! Pull-up/down Resistor Enable Selection */
   414            OutputState_t      outputDirState;      /*! Output Direction State Selection */
   415            InterruptEnable_t  interruptEnable;     /*! Interrupt Enable State Selection */
   416            Bool               outputDirStateEnabled;/*! Enable state for output direction state selection */
   417            Bool               inputDirStateEnabled;/*! Enable state for input direction state selection */
   418        }
   419    
   420        /*!
   421        *  ======== ForceSetDefaultRegister_t ========
   422        *  Force Set Default Register
   423        *
   424        *  Type to store if each register needs to be forced initialized
   425        *  even if the register is in default state.
   426        *
   427        *  @see #ForceSetDefaultRegister_t
   428        */
   429        struct ForceSetDefaultRegister_t {
   430            String     register;
   431            Bool       regForceSet;
   432        }
   433    
   434        /*!
   435        *  ======== regIntVect_t ========
   436        *  Interrupt vector description
   437        *
   438        *  Type to describe a single interrupt vector pin and all its possible
   439        *  configurations.
   440        *
   441        *  @see #regIntVect_t
   442        */
   443        struct regIntVect_t {
   444            String                    registerName;
   445            String                    registerDescription;
   446            String                    isrToggleString;
   447            String                    priorityName;
   448            Bool                      interruptEnable;
   449            Bool                      interruptHandler;
   450            Int                       priority;
   451        }
   452    
   453    instance:
   454        /*! Port 1 Interrupt Edge Select Register */
   455        config GpioBits8PxIes_t P1IES = {
   456            Bit0        : BIT0_OFF,
   457            Bit1        : BIT1_OFF,
   458            Bit2        : BIT2_OFF,
   459            Bit3        : BIT3_OFF,
   460            Bit4        : BIT4_OFF,
   461            Bit5        : BIT5_OFF,
   462            Bit6        : BIT6_OFF,
   463            Bit7        : BIT7_OFF
   464        };
   465    
   466        /*! Port 1 Interrupt Flag Register */
   467        config GpioBits8PxIfg_t P1IFG = {
   468            Bit0        : BIT0_OFF,
   469            Bit1        : BIT1_OFF,
   470            Bit2        : BIT2_OFF,
   471            Bit3        : BIT3_OFF,
   472            Bit4        : BIT4_OFF,
   473            Bit5        : BIT5_OFF,
   474            Bit6        : BIT6_OFF,
   475            Bit7        : BIT7_OFF
   476        };
   477    
   478        /*! Port 1 Interrupt Enable Register */
   479        config GpioBits8PxIe_t P1IE = {
   480            Bit0        : BIT0_OFF,
   481            Bit1        : BIT1_OFF,
   482            Bit2        : BIT2_OFF,
   483            Bit3        : BIT3_OFF,
   484            Bit4        : BIT4_OFF,
   485            Bit5        : BIT5_OFF,
   486            Bit6        : BIT6_OFF,
   487            Bit7        : BIT7_OFF
   488        };
   489    
   490        /*! Port 2 Interrupt Edge Select Register */
   491        config GpioBits8PxIes_t P2IES = {
   492            Bit0        : BIT0_OFF,
   493            Bit1        : BIT1_OFF,
   494            Bit2        : BIT2_OFF,
   495            Bit3        : BIT3_OFF,
   496            Bit4        : BIT4_OFF,
   497            Bit5        : BIT5_OFF,
   498            Bit6        : BIT6_OFF,
   499            Bit7        : BIT7_OFF
   500        };
   501    
   502        /*! Port 2 Interrupt Flag Register */
   503        config GpioBits8PxIfg_t P2IFG = {
   504            Bit0        : BIT0_OFF,
   505            Bit1        : BIT1_OFF,
   506            Bit2        : BIT2_OFF,
   507            Bit3        : BIT3_OFF,
   508            Bit4        : BIT4_OFF,
   509            Bit5        : BIT5_OFF,
   510            Bit6        : BIT6_OFF,
   511            Bit7        : BIT7_OFF
   512        };
   513    
   514        /*! Port 2 Interrupt Enable Register */
   515        config GpioBits8PxIe_t P2IE = {
   516            Bit0        : BIT0_OFF,
   517            Bit1        : BIT1_OFF,
   518            Bit2        : BIT2_OFF,
   519            Bit3        : BIT3_OFF,
   520            Bit4        : BIT4_OFF,
   521            Bit5        : BIT5_OFF,
   522            Bit6        : BIT6_OFF,
   523            Bit7        : BIT7_OFF
   524        };
   525    
   526        /*! Port 3 Interrupt Edge Select Register */
   527        config GpioBits8PxIes_t P3IES = {
   528            Bit0        : BIT0_OFF,
   529            Bit1        : BIT1_OFF,
   530            Bit2        : BIT2_OFF,
   531            Bit3        : BIT3_OFF,
   532            Bit4        : BIT4_OFF,
   533            Bit5        : BIT5_OFF,
   534            Bit6        : BIT6_OFF,
   535            Bit7        : BIT7_OFF
   536        };
   537    
   538        /*! Port 3 Interrupt Flag Register */
   539        config GpioBits8PxIfg_t P3IFG = {
   540            Bit0        : BIT0_OFF,
   541            Bit1        : BIT1_OFF,
   542            Bit2        : BIT2_OFF,
   543            Bit3        : BIT3_OFF,
   544            Bit4        : BIT4_OFF,
   545            Bit5        : BIT5_OFF,
   546            Bit6        : BIT6_OFF,
   547            Bit7        : BIT7_OFF
   548        };
   549    
   550        /*! Port 3 Interrupt Enable Register */
   551        config GpioBits8PxIe_t P3IE = {
   552            Bit0        : BIT0_OFF,
   553            Bit1        : BIT1_OFF,
   554            Bit2        : BIT2_OFF,
   555            Bit3        : BIT3_OFF,
   556            Bit4        : BIT4_OFF,
   557            Bit5        : BIT5_OFF,
   558            Bit6        : BIT6_OFF,
   559            Bit7        : BIT7_OFF
   560        };
   561    
   562        /*! Port 4 Interrupt Edge Select Register */
   563        config GpioBits8PxIes_t P4IES = {
   564            Bit0        : BIT0_OFF,
   565            Bit1        : BIT1_OFF,
   566            Bit2        : BIT2_OFF,
   567            Bit3        : BIT3_OFF,
   568            Bit4        : BIT4_OFF,
   569            Bit5        : BIT5_OFF,
   570            Bit6        : BIT6_OFF,
   571            Bit7        : BIT7_OFF
   572        };
   573    
   574        /*! Port 4 Interrupt Flag Register */
   575        config GpioBits8PxIfg_t P4IFG = {
   576            Bit0        : BIT0_OFF,
   577            Bit1        : BIT1_OFF,
   578            Bit2        : BIT2_OFF,
   579            Bit3        : BIT3_OFF,
   580            Bit4        : BIT4_OFF,
   581            Bit5        : BIT5_OFF,
   582            Bit6        : BIT6_OFF,
   583            Bit7        : BIT7_OFF
   584        };
   585    
   586        /*! Port 4 Interrupt Enable Register */
   587        config GpioBits8PxIe_t P4IE = {
   588            Bit0        : BIT0_OFF,
   589            Bit1        : BIT1_OFF,
   590            Bit2        : BIT2_OFF,
   591            Bit3        : BIT3_OFF,
   592            Bit4        : BIT4_OFF,
   593            Bit5        : BIT5_OFF,
   594            Bit6        : BIT6_OFF,
   595            Bit7        : BIT7_OFF
   596        };
   597    
   598        /*! GPIO interrupt source */
   599        config regIntVect_t interruptSource[32];
   600    
   601        /*! Forward Declaration of Device Pin Functional Configuration */
   602        config DevicePinFunctionSetting_t devicePinSetting[][];
   603    
   604        /*!
   605         *  ======== findPinsForFunction ========
   606         *    Identify all device pins that can be used to serve a certain purpose
   607         *
   608         *  Function to scan through the pin configuration database to identify
   609         *    a list of device pins matching a regular expression.
   610         */
   611        MatchedPortFunction_t findPinsForFunction(String regExp);
   612    
   613        /*!
   614         *  ======== pinFunctionIsActive ========
   615         *  Check if a pin is enabled for a certain function
   616         *
   617         *    This function is used to check if a certain functionality is enabled
   618         *    on a given device pins (returns 'true' in that case).
   619         */
   620        Bool pinFunctionIsActive(UInt port, UInt pin, String regExp);
   621    
   622        /*!
   623         *  ======== getPinFunctionIndex ========
   624         *  Get a pin's current functional configuration
   625         *
   626         *  This function is used to obtain the current configuration of a given
   627         *    device pin. The returned value can be used as an index to obtain further
   628         *  information from the pin configuration database.
   629         */
   630        UInt getPinFunctionIndex(UInt port, UInt pin);
   631    
   632        /*!
   633         *  ======== getPinOwner ========
   634         *    This function returns the current owner of the specified device pin.
   635         */
   636        Any getPinOwner(UInt port, UInt pin);
   637    
   638        /*!
   639         *  ======== setPinFunctionUsingIndex ========
   640         *     Configure a device pin to a specific peripheral function
   641         *
   642         *  This function is used to configure a device pin to a specific peripheral
   643         *    function that is identified by an index. The index corresponds to an
   644         *    associated set of configuration parameters stored in the pin configuration
   645         *    database. The owner parameter can be used to protect a pin from being
   646         *    used by somebody else. A pin configuration can only be changed if the
   647         *    current owner is undefined, or of the current owner matches the
   648         *    owner specified as function parameter.
   649         */
   650        Void setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner);
   651    
   652        /*!
   653         *  ======== setDefaultPinFunction ========
   654         *     Configure a device pin to its default state
   655         *
   656         *  This function is used to configure a device pin to its default state
   657         *    and is typically used when a peripheral module relinquishes ownership
   658         *    of a pin so that it can be used by other peripheral modules.
   659         */
   660        Void setDefaultPinFunction(UInt port, UInt pin, Any owner);
   661    }