1 /* --COPYRIGHT--,EPL
2 * Copyright (c) 2008 Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * --/COPYRIGHT--*/
12 /*!
13 * ======== Comparator_Aplus ========
14 * MSP430F2xx Family Comparator_Aplus Module
15 */
16 metaonly module Comparator_Aplus inherits IComparator {
17
18 /*! CACTL1 Register */
19 struct CACTL1_t {
20 CAEX_t CAEX; /*! Comparator_A+ exchange. This bit exchanges the comparator inputs and
21 *inverts the comparator output. */
22 CARSEL_t CARSEL; /*! Comparator_A+ reference select. This bit selects which terminal the
23 * VCAREF is applied to.
24 * When CAEX = 0:
25 * 0 VCAREF is applied to the + terminal
26 * 1 VCAREF is applied to the ? terminal
27 * When CAEX = 1:
28 * 0 VCAREF is applied to the ? terminal
29 * 1 VCAREF is applied to the + terminal */
30
31 CAREF_t CAREF; /*! Comparator_A+ reference. These bits select the reference voltage VCAREF.
32 * 00 Internal reference off. An external reference can be applied.
33 * 01 0.25*VCC
34 * 10 0.50*VCC
35 * 11 Diode reference is selected */
36
37 CAON_t CAON; /*! Comparator_A+ on. This bit turns on the comparator. When the
38 * comparator is off it consumes no current. The reference circuitry is enabled
39 * or disabled independently.
40 * 0 Off
41 * 1 On */
42
43 CAIES_t CAIES; /*! Comparator_A interrupt edge select
44 * 0 Rising edge
45 * 1 Falling edge */
46
47 CAIE_t CAIE; /*! Comparator_A+ interrupt enable
48 * 0 Disabled
49 * 1 Enabled */
50
51 CAIFG_t CAIFG; /*! The Comparator_A+ interrupt flag
52 * 0 No interrupt pending
53 * 1 Interrupt pending */
54 }
55
56 /*! CACTL1 Register */
57 struct CACTL2_t {
58 CASHORT_t CASHORT; /*! Input short. This bit shorts the + and - input terminals.
59 * 0 Inputs not shorted.
60 * 1 Inputs shorted. */
61 P2CA4_t P2CA4; /*! Input select. This bit together with P2CA0 selects the + terminal input when
62 * CAEX = 0 and the - terminal input when CAEX = 1 */
63
64 P2CA3_t P2CA3; /*! Input select. These bits select the - terminal input when CAEX = 0 and the
65 * + terminal input when CAEX = 1.
66 * 000 No connection
67 * 001 CA1
68 * 010 CA2
69 * 011 CA3
70 * 100 CA4
71 * 101 CA5
72 * 110 CA6
73 * 111 CA7 */
74 P2CA2_t P2CA2; /*! Input select. These bits select the - terminal input when CAEX = 0 and the
75 * + terminal input when CAEX = 1.
76 * 000 No connection
77 * 001 CA1
78 * 010 CA2
79 * 011 CA3
80 * 100 CA4
81 * 101 CA5
82 * 110 CA6
83 * 111 CA7 */
84 P2CA1_t P2CA1; /*! Input select. These bits select the - terminal input when CAEX = 0 and the
85 * + terminal input when CAEX = 1.
86 * 000 No connection
87 * 001 CA1
88 * 010 CA2
89 * 011 CA3
90 * 100 CA4
91 * 101 CA5
92 * 110 CA6
93 * 111 CA7 */
94 P2CA0_t P2CA0; /*! Input select. This bit, together with P2CA4, selects the + terminal input
95 * when CAEX = 0 and the - terminal input when CAEX = 1.
96 * 00 No connection
97 * 01 CA0
98 * 10 CA1
99 * 11 CA2 */
100 CAF_t CAF; /*! Comparator_A+ output filter
101 * 0 Comparator_A+ output is not filtered
102 * 1 Comparator_A+ output is filtered */
103 }
104
105 /*! CAPD, Register */
106 struct CAPD_t {
107 CAPD7_t CAPD7; /*! CAPD7 Comparator_A+ port disable
108 * 0 The input buffer is enabled.
109 * 1 The input buffer is disabled.*/
110
111 CAPD6_t CAPD6; /*! CAPD6 Comparator_A+ port disable
112 * 0 The input buffer is enabled.
113 * 1 The input buffer is disabled.*/
114 CAPD5_t CAPD5; /*! CAPD5 Comparator_A+ port disable
115 * 0 The input buffer is enabled.
116 * 1 The input buffer is disabled.*/
117 CAPD4_t CAPD4; /*! CAPD4 Comparator_A+ port disable
118 * 0 The input buffer is enabled.
119 * 1 The input buffer is disabled.*/
120 CAPD3_t CAPD3; /*! CAPD3 Comparator_A+ port disable
121 * 0 The input buffer is enabled.
122 * 1 The input buffer is disabled.*/
123 CAPD2_t CAPD2; /*! CAPD2 Comparator_A+ port disable
124 * 0 The input buffer is enabled.
125 * 1 The input buffer is disabled.*/
126 CAPD1_t CAPD1; /*! CAPD1 Comparator_A+ port disable
127 * 0 The input buffer is enabled.
128 * 1 The input buffer is disabled.*/
129 CAPD0_t CAPD0; /*! CAPD0 Comparator_A+ port disable
130 * 0 The input buffer is enabled.
131 * 1 The input buffer is disabled.*/
132 }
133
134 /*!
135 * ======== create ========
136 * Create an instance of this peripheral.
137 */
138 create();
139
140 instance:
141 /*! CACTL1 Register */
142 config CACTL1_t CACTL1 = {
143 CAEX : CAEX_OFF,
144 CARSEL : CARSEL_OFF,
145 CAREF : CAREF_0,
146 CAON : CAON_OFF,
147 CAIES : CAIES_OFF,
148 CAIE : CAIE_OFF,
149 CAIFG : CAIFG_OFF
150 };
151
152 /*! CACTL2 Register */
153 config CACTL2_t CACTL2 = {
154 CASHORT : CASHORT_OFF,
155 P2CA4 : P2CA4_OFF,
156 P2CA3 : P2CA3_OFF,
157 P2CA2 : P2CA2_OFF,
158 P2CA1 : P2CA1_OFF,
159 P2CA0 : P2CA0_OFF,
160 CAF : CAF_OFF
161 };
162
163 /*! CAPD, Register */
164 config CAPD_t CAPD = {
165 CAPD7 : CAPD7_OFF,
166 CAPD6 : CAPD6_OFF,
167 CAPD5 : CAPD5_OFF,
168 CAPD4 : CAPD4_OFF,
169 CAPD3 : CAPD3_OFF,
170 CAPD2 : CAPD2_OFF,
171 CAPD1 : CAPD1_OFF,
172 CAPD0 : CAPD0_OFF
173 };
174
175 /*! Determine if each Register needs to be forced set or not */
176 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
177 [
178 { register : "CACTL1" , regForceSet : false },
179 { register : "CACTL2" , regForceSet : false },
180 { register : "CAPD" , regForceSet : false }
181 ];
182
183 }