1 /* --COPYRIGHT--,EPL
2 * Copyright (c) 2008 Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * --/COPYRIGHT--*/
12 /*!
13 * ======== Svs ========
14 * MSP430F2xx Family SVS Module
15 */
16 metaonly module SVS inherits ISVS {
17
18 /*! SVSCTL Register */
19 struct SVSCTL_t {
20 VLD3_t VLD3; /*! Voltage level detect. These bits turn on the SVS and select
21 * the nominal SVS threshold voltage level. See the device specific
22 * data sheet for parameters.
23 * 0000 SVS is off
24 * 0001 1.9 V
25 * 0010 2.1 V
26 * 0011 2.2 V
27 * 0100 2.3 V
28 * 0101 2.4 V
29 * 0110 2.5 V
30 * 0111 2.65 V
31 * 1000 2.8 V
32 * 1001 2.9 V
33 * 1010 3.05
34 * 1011 3.2 V
35 * 1100 3.35 V
36 * 1101 3.5 V
37 * 1110 3.7 V
38 * 1111 Compares external input voltage SVSIN to 1.25 V. */
39 VLD2_t VLD2; /*! Voltage level detect. These bits turn on the SVS and select
40 * the nominal SVS threshold voltage level. See the device specific
41 * data sheet for parameters.
42 * 0000 SVS is off
43 * 0001 1.9 V
44 * 0010 2.1 V
45 * 0011 2.2 V
46 * 0100 2.3 V
47 * 0101 2.4 V
48 * 0110 2.5 V
49 * 0111 2.65 V
50 * 1000 2.8 V
51 * 1001 2.9 V
52 * 1010 3.05
53 * 1011 3.2 V
54 * 1100 3.35 V
55 * 1101 3.5 V
56 * 1110 3.7 V
57 * 1111 Compares external input voltage SVSIN to 1.25 V. */
58 VLD1_t VLD1; /*! Voltage level detect. These bits turn on the SVS and select
59 * the nominal SVS threshold voltage level. See the device specific
60 * data sheet for parameters.
61 * 0000 SVS is off
62 * 0001 1.9 V
63 * 0010 2.1 V
64 * 0011 2.2 V
65 * 0100 2.3 V
66 * 0101 2.4 V
67 * 0110 2.5 V
68 * 0111 2.65 V
69 * 1000 2.8 V
70 * 1001 2.9 V
71 * 1010 3.05
72 * 1011 3.2 V
73 * 1100 3.35 V
74 * 1101 3.5 V
75 * 1110 3.7 V
76 * 1111 Compares external input voltage SVSIN to 1.25 V. */
77 VLD0_t VLD0; /*! Voltage level detect. These bits turn on the SVS and select
78 * the nominal SVS threshold voltage level. See the device specific
79 * data sheet for parameters.
80 * 0000 SVS is off
81 * 0001 1.9 V
82 * 0010 2.1 V
83 * 0011 2.2 V
84 * 0100 2.3 V
85 * 0101 2.4 V
86 * 0110 2.5 V
87 * 0111 2.65 V
88 * 1000 2.8 V
89 * 1001 2.9 V
90 * 1010 3.05
91 * 1011 3.2 V
92 * 1100 3.35 V
93 * 1101 3.5 V
94 * 1110 3.7 V
95 * 1111 Compares external input voltage SVSIN to 1.25 V. */
96 PORON_t PORON; /*! POR on. This bit enables the SVSFG flag to
97 * cause a POR device reset.
98 * 0 SVSFG does not cause a POR
99 * 1 SVSFG causes a POR */
100 SVSON_t SVSON; /*! SVS on. This bit reflects the status of SVS operation. This bit DOES NOT turn
101 * on the SVS. The SVS is turned on by setting VLDx > 0.
102 * 0 SVS is Off
103 * 1 SVS is On */
104 SVSOP_t SVSOP; /*! SVS output. This bit reflects the output value of the SVS comparator.
105 * 0 SVS comparator output is low
106 * 1 SVS comparator output is high */
107 SVSFG_t SVSFG; /*! SVS flag. This bit indicates a low voltage condition. SVSFG remains set after
108 * a low voltage condition until reset by software.
109 * 0 No low voltage condition occurred
110 * 1 A low condition is present or has occurred */
111 }
112 /*!
113 * ======== create ========
114 * Create an instance of this peripheral.
115 */
116 create();
117
118 instance:
119 /*! SVSCTL Register */
120 config SVSCTL_t SVSCTL = {
121 VLD3 : VLD3_OFF,
122 VLD2 : VLD2_OFF,
123 VLD1 : VLD1_OFF,
124 VLD0 : VLD0_OFF,
125 PORON : PORON_OFF,
126 SVSON : SVSON_OFF,
127 SVSOP : SVSOP_OFF,
128 SVSFG : SVSFG_OFF
129 };
130 /*! Determine if each Register needs to be forced set or not */
131 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
132 [
133 { register : "SVSCTL" , regForceSet : false }
134 ];
135
136 }