1 /* --COPYRIGHT--,EPL
2 * Copyright (c) 2008 Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * --/COPYRIGHT--*/
12 /*!
13 * ======== SR ========
14 * MSP430 Status Register
15 */
16 metaonly module SR inherits xdc.platform.IPeripheral {
17
18 /* System clock generator 1. This bit, when set, turns off the SMCLK. */
19 enum SCG1_t {
20 SCG1_OFF = 0x0000, /*! Disable System clock generator 1 */
21 SCG1 = 0x0080 /*! Enable System clock generator 1 */
22 };
23
24 enum SCG0_t {
25 SCG0_OFF = 0x0000, /*! Disable System clock generator 0 */
26 SCG0 = 0x0040 /*! Enable System clock generator 0 */
27 };
28
29 enum OSCOFF_t {
30 OSCOFF_OFF = 0x0000, /*! Oscillator On */
31 OSCOFF = 0x0020 /*! Oscillator Off */
32 };
33
34 /* CPU off. This bit, when set, turns off the CPU. */
35 enum CPUOFF_t {
36 CPUOFF_OFF = 0x0000, /*! CPU On */
37 CPUOFF = 0x0010 /*! CPU Off */
38 };
39
40 enum GIE_t {
41 GIE_OFF = 0x0000, /*! General interrupt disable */
42 GIE = 0x0008 /*! General interrupt enable */
43 };
44
45 /* SR */
46 struct SR_t {
47 SCG1_t SCG1; /*! System clock generator 1
48 *This bit, when set, turns off the SMCLK.
49 */
50 SCG0_t SCG0; /*! System clock generator 0
51 *This bit, when set, turns off the DCO dc
52 *generator, if DCOCLK is not used for MCLK
53 *or SMCLK.
54 */
55 OSCOFF_t OSCOFF; /*!Oscillator Off
56 *This bit, when set, turns off the LFXT1
57 *crystal oscillator, when LFXT1CLK is not
58 *use for MCLK or SMCLK
59 */
60 CPUOFF_t CPUOFF; /*! CPU off
61 *This bit, when set, turns off the CPU.
62 */
63 GIE_t GIE; /*! General interrupt enable
64 *This bit, when set, enables maskable
65 *interrupts. When reset, all maskable
66 *interrupts are disabled
67 */
68 }
69
70 /*!
71 * ======== ForceSetDefaultRegister_t ========
72 * Force Set Default Register
73 *
74 * Type to store if each register needs to be forced initialized
75 * even if the register is in default state.
76 *
77 * @see #ForceSetDefaultRegister_t
78 */
79 struct ForceSetDefaultRegister_t {
80 String register;
81 Bool regForceSet;
82 }
83
84 instance:
85 /*! SR, Status Register */
86 config SR_t SR = {
87 SCG1 : SCG1_OFF,
88 SCG0 : SCG0_OFF,
89 OSCOFF : OSCOFF_OFF,
90 CPUOFF : CPUOFF_OFF,
91 GIE : GIE_OFF
92 };
93
94 /*!
95 * ======== getSCG1 ========
96 * Gets SCG1 bit
97 *
98 * @see #getSCG1
99 */
100 Bool getSCG1();
101
102 /*!
103 * ======== setSCG1 ========
104 * Sets SCG1 bit
105 *
106 * @see #setSCG1
107 */
108 Bool setSCG1(Bool set);
109
110 /*!
111 * ======== getSCG0 ========
112 * Gets SCG0 bit
113 *
114 * @see #getSCG0
115 */
116 Bool getSCG0();
117
118 /*!
119 * ======== setSCG0 ========
120 * Sets SCG0 bit
121 *
122 * @see #setSCG0
123 */
124 Bool setSCG0(Bool set);
125
126 /*!
127 * ======== getOSCOFF ========
128 * Gets OSCOFF bit
129 *
130 * @see #getOSCOFF
131 */
132 Bool getOSCOFF();
133
134 /*!
135 * ======== setOSCOFF ========
136 * Sets OSCOFF bit
137 *
138 * @see #setOSCOFF
139 */
140 Bool setOSCOFF(Bool set);
141
142 /*!
143 * ======== getCPUOFF ========
144 * Gets CPUOFF bit
145 *
146 * @see #getCPUOFF
147 */
148 Bool getCPUOFF();
149
150 /*!
151 * ======== setCPUOFF ========
152 * Sets CPUOFF bit
153 *
154 * @see #setCPUOFF
155 */
156 Bool setCPUOFF(Bool set);
157
158 /*!
159 * ======== getGIE ========
160 * Gets GIE bit
161 *
162 * @see #getGIE
163 */
164 Bool getGIE();
165
166 /*!
167 * ======== setGIE ========
168 * Sets GIE bit
169 *
170 * @see #setGIE
171 */
172 Bool setGIE(Bool set);
173
174 /*! Determine if each Register needs to be forced set or not */
175 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
176 [
177 { register : "SR" , regForceSet : false },
178 ];
179 }