1 /*
2 * Copyright (c) 2012 by Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * */
12
13 /*
14 * ======== Boot.xdc ========
15 *
16 */
17
18 package ti.catalog.arm.cortexm3.concertoInit;
19
20 import xdc.rov.ViewInfo;
21
22 /*!
23 * ======== Boot ========
24 * Concerto M3 Boot Support.
25 *
26 * The Boot module supports boot initialization for the Concerto M3 core.
27 * A special boot init function is created based on the configuration
28 * settings for this module. This function is hooked into the
29 * xdc.runtime.Reset.fxns[] array and called very early at boot time (prior
30 * to cinit processing).
31 *
32 * The code to support the boot module is placed in a separate section
33 * named `".text:.bootCodeSection"` to allow placement of this section in
34 * the linker .cmd file if necessary. This section is a subsection of the
35 * `".text"` section so this code will be placed into the .text section unless
36 * explicitly placed, either through
37 * `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
38 * command file.
39 */
40 @Template("./Boot.xdt")
41 @NoRuntime
42 module Boot
43 {
44 /*! System PLL Fractional Multiplier (SPLLFMULT) value */
45 metaonlyenum FractMult {
46 Fract_0 = 0x000, /*! Fractional multiplier is 0 */
47 Fract_25 = 0x100, /*! Fractional multiplier is 0.25 */
48 Fract_50 = 0x200, /*! Fractional multiplier is 0.5 */
49 Fract_75 = 0x300 /*! Fractional multiplier is 0.75 */
50 }
51
52 /*! System Clock Divider (SYSDIVSEL) value */
53 metaonlyenum SysDiv {
54 Div_1 = 0x0, /*! Divide by 1 */
55 Div_2 = 0x1, /*! Divide by 2 */
56 Div_4 = 0x2, /*! Divide by 4 */
57 Div_8 = 0x3 /*! Divide by 8 */
58 };
59
60 /*! M3 Subsystem Clock Divider (M3SSDIVSEL) value */
61 metaonlyenum M3Div {
62 M3Div_1 = 0x0, /*! Divide by 1 */
63 M3Div_2 = 0x1, /*! Divide by 2 */
64 M3Div_4 = 0x2 /*! Divide by 4 */
65 };
66
67 metaonlystruct ModuleView {
68 Bool configureClocks;
69 UInt OSCCLK;
70 UInt SPLLIMULT;
71 String SPLLFMULT;
72 String SYSDIVSEL;
73 String M3SSDIVSEL;
74 Bool bootC28;
75 }
76
77 @Facet
78 metaonlyconfig ViewInfo.Instance rovViewInfo =
79 ViewInfo.create({
80 viewMap: [
81 [
82 'Module',
83 {
84 type: ViewInfo.MODULE,
85 viewInitFxn: 'viewInitModule',
86 structName: 'ModuleView'
87 }
88 ],
89 ]
90 });
91
92 /*!
93 * Clock configuration flag, default is false.
94 *
95 * Set to true to configure the PLL and system and M3 subsystem clock
96 * dividers.
97 */
98 config Bool configureClocks = false;
99
100 /*!
101 * OSCCLK input frequency to PLL, in MHz. Default is 20 MHz.
102 *
103 * This is the frequency of the oscillator clock (OSCCLK) input to the
104 * PLL.
105 */
106 metaonlyconfig UInt OSCCLK = 20;
107
108 /*! System PLL Integer Multiplier (SPLLIMULT) value */
109 metaonlyconfig UInt SPLLIMULT = 1;
110
111 /*! System PLL Fractional Multiplier (SPLLFMULT) value */
112 metaonlyconfig FractMult SPLLFMULT = Fract_0;
113
114 /*! System Clock Divider (SYSDIVSEL) value */
115 metaonlyconfig SysDiv SYSDIVSEL = Div_8;
116
117 /*! M3 Subsystem Clock Divider (M3SSDIVSEL) value */
118 metaonlyconfig M3Div M3SSDIVSEL = M3Div_4;
119
120 /*!
121 * Flash controller wait states configuration flag, default is true.
122 *
123 * Set to true to configure the Flash controller wait states. The number
124 * of wait states is computed based upon the CPU frequency.
125 */
126 metaonlyconfig Bool configureFlashWaitStates = true;
127
128 /*!
129 * Flash controller program cache enable flag, default is true.
130 *
131 * Set to true to enable the Flash controller's program cache.
132 */
133 metaonlyconfig Bool enableFlashProgramCache = true;
134
135 /*!
136 * Flash controller data cache enable flag, default is true.
137 *
138 * Set to true to enable the Flash controller's data cache.
139 */
140 metaonlyconfig Bool enableFlashDataCache = true;
141
142 /*!
143 * Function to be called when Limp mode is detected.
144 *
145 * This function is called when the Boot module is about to configure
146 * the PLL, but finds the device operating in Limp mode (i.e., the mode
147 * when a missing OSCCLK input has been detected).
148 *
149 * If this function is not specified by the application, a default
150 * function will be used, which spins in an infinite loop.
151 */
152 metaonlyconfig Fxn limpAbortFunction;
153
154 /*!
155 * Boot from Flash flag. Default is true.
156 *
157 * Set to true to enable booting the M3 from Flash.
158 */
159 metaonlyconfig Bool bootFromFlash = true;
160
161 /*!
162 * Initiate booting of the C28 processor. Default is false.
163 *
164 * Set to true to enable the M3 to initiate boot of the C28.
165 *
166 * If enabled, this will occur after the optional clock configuration
167 * step, enabled by `{@link #configureClocks}`.
168 */
169 metaonlyconfig Bool bootC28 = false;
170
171 /*!
172 * Initialize C28 RAM regions before booting the C28 processor.
173 * Default is true.
174 *
175 * Set to true to enable initialization of these C28 RAM regions: M1,
176 * CtoM, LO, L1, L2, and L3. RAM locations will be zeroed, and the ECC or
177 * parity bits will be initialized.
178 */
179 metaonlyconfig Bool initC28RAMs = true;
180
181 /*!
182 * @_nodoc 183 * ======== getFrequency ========
184 * Gets the resulting M3 CPU frequency (in Hz) given the Clock
185 * configuration parameters.
186 *
187 */
188 UInt32 getFrequency();
189
190 /*!
191 * @_nodoc 192 * ======== registerFreqListener ========
193 * Register a module to be notified whenever the frequency changes.
194 *
195 * The registered module must have a function named 'fireFrequencyUpdate'
196 * which takes the new frequency as an argument.
197 */
198 function registerFreqListener();
199
200 internal:
201
202 /* The computed timestamp frequency */
203 metaonlyconfig UInt timestampFreq;
204
205 /* Used to display the computed M3 frequency value in the Grace page. */
206 metaonlyconfig String displayFrequency;
207
208 /* Used to display the computed C28 frequency value in the Grace page. */
209 metaonlyconfig String displayFrequency28;
210
211 /* The computed Flash wait states */
212 metaonlyconfig UInt flashWaitStates = 3;
213
214 };
215 /*
216 * @(#) ti.catalog.arm.cortexm3.concertoInit; 1, 0, 0,31; 7-3-2012 15:21:11; /db/ztree/library/trees/platform/platform-n23x/src/
217 */
218