1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     * 
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     * 
    11     * --/COPYRIGHT--*/
    12    /*!
    13     *  ======== GPIO for MSP430G2x01 ========
    14     *  MSP430 General Purpose Input Output Ports
    15     */
    16    metaonly module GPIO_MSP430G2x01 inherits IGPIO {
    17        /*!
    18         *  ======== create ========
    19         *  Create an instance of this peripheral. 
    20         */
    21            create();
    22            
    23    instance:
    24       /*! Define an array to describe all device pins. The 1st dimension
    25        *  denotes the port, the second the pin on that port. On an
    26        *  MSP430G2x01 device, there are 8 + 2 = 10 pins total.
    27        */
    28            
    29            /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    30             * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    31        /* TODO: For this device the config variable definition has been moved into the
    32         * corresponding XS file due to its size. This needs a more consistent solution. */
    33        config DevicePin_t devicePins[2][8];
    34    
    35            /*! Implementation of Device Pin Functional Configuration */
    36            override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    37    
    38            /*! Determine if each Register needs to be forced set or not */
    39            readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    40            [
    41                    { register : "P1OUT" , regForceSet : true  },
    42                    { register : "P1SEL" , regForceSet : false },
    43                    { register : "P1DIR" , regForceSet : false },
    44                    { register : "P1REN" , regForceSet : false },
    45                    { register : "P1IES" , regForceSet : true },
    46                    { register : "P1IFG" , regForceSet : true },
    47                    { register : "P1IE"  , regForceSet : false },
    48                    { register : "P2OUT" , regForceSet : true  },
    49                    { register : "P2SEL" , regForceSet : false },
    50                    { register : "P2DIR" , regForceSet : false },
    51                    { register : "P2REN" , regForceSet : false },
    52                    { register : "P2IES" , regForceSet : true },
    53                    { register : "P2IFG" , regForceSet : true },
    54                    { register : "P2IE"  , regForceSet : false }
    55            ];
    56            
    57        /*
    58         *  GPIO Digital I/O Registers
    59         *
    60         *  One GIPO instance defines the configuration of an entire,
    61         *  8-bit wide digital I/O port.
    62         */
    63         
    64        /*! Port 1 Output Register */ 
    65        config GpioBits8PxOut_t P1OUT = {
    66            Bit0        : BIT0_OFF,
    67            Bit1        : BIT1_OFF,
    68            Bit2        : BIT2_OFF,
    69            Bit3        : BIT3_OFF,
    70            Bit4        : BIT4_OFF,
    71            Bit5        : BIT5_OFF,
    72            Bit6        : BIT6_OFF,
    73            Bit7        : BIT7_OFF
    74        };
    75    
    76        /*! Port 1 Port Select Register */
    77        config GpioBits8PxSel_t P1SEL = {
    78            Bit0        : BIT0_OFF,
    79            Bit1        : BIT1_OFF,
    80            Bit2        : BIT2_OFF,
    81            Bit3        : BIT3_OFF,
    82            Bit4        : BIT4_OFF,
    83            Bit5        : BIT5_OFF,
    84            Bit6        : BIT6_OFF,
    85            Bit7        : BIT7_OFF
    86        };
    87        
    88        /*! Port 1 Direction Register */
    89        config GpioBits8PxDir_t P1DIR = {
    90            Bit0        : BIT0_OFF,
    91            Bit1        : BIT1_OFF,
    92            Bit2        : BIT2_OFF,
    93            Bit3        : BIT3_OFF,
    94            Bit4        : BIT4_OFF,
    95            Bit5        : BIT5_OFF,
    96            Bit6        : BIT6_OFF,
    97            Bit7        : BIT7_OFF
    98        };
    99        
   100        /*! Port 1 Resistor Enable Register */
   101        config GpioBits8PxRen_t P1REN = {
   102            Bit0        : BIT0_OFF,
   103            Bit1        : BIT1_OFF,
   104            Bit2        : BIT2_OFF,
   105            Bit3        : BIT3_OFF,
   106            Bit4        : BIT4_OFF,
   107            Bit5        : BIT5_OFF,
   108            Bit6        : BIT6_OFF,
   109            Bit7        : BIT7_OFF
   110        };
   111        
   112        /*! Port 1 Interrupt Edge Select Register */
   113        config GpioBits8PxIes_t P1IES = {
   114            Bit0        : BIT0_OFF,
   115            Bit1        : BIT1_OFF,
   116            Bit2        : BIT2_OFF,
   117            Bit3        : BIT3_OFF,
   118            Bit4        : BIT4_OFF,
   119            Bit5        : BIT5_OFF,
   120            Bit6        : BIT6_OFF,
   121            Bit7        : BIT7_OFF
   122        };
   123        
   124        /*! Port 1 Interrupt Flag Register */
   125        config GpioBits8PxIfg_t P1IFG = {
   126            Bit0        : BIT0_OFF,
   127            Bit1        : BIT1_OFF,
   128            Bit2        : BIT2_OFF,
   129            Bit3        : BIT3_OFF,
   130            Bit4        : BIT4_OFF,
   131            Bit5        : BIT5_OFF,
   132            Bit6        : BIT6_OFF,
   133            Bit7        : BIT7_OFF
   134        };
   135        
   136        /*! Port 1 Interrupt Enable Register */
   137        config GpioBits8PxIe_t P1IE = {
   138            Bit0        : BIT0_OFF,
   139            Bit1        : BIT1_OFF,
   140            Bit2        : BIT2_OFF,
   141            Bit3        : BIT3_OFF,
   142            Bit4        : BIT4_OFF,
   143            Bit5        : BIT5_OFF,
   144            Bit6        : BIT6_OFF,
   145            Bit7        : BIT7_OFF
   146        };
   147    
   148        /*! Port 2 Output Register */ 
   149        config GpioBits8PxOut_t P2OUT = {
   150            Bit0        : BIT0_OFF,
   151            Bit1        : BIT1_OFF,
   152            Bit2        : BIT2_OFF,
   153            Bit3        : BIT3_OFF,
   154            Bit4        : BIT4_OFF,
   155            Bit5        : BIT5_OFF,
   156            Bit6        : BIT6_OFF,
   157            Bit7        : BIT7_OFF
   158        };
   159    
   160        /*! Port 2 Port Select Register */
   161        config GpioBits8PxSel_t P2SEL = {
   162            Bit0        : BIT0_OFF,
   163            Bit1        : BIT1_OFF,
   164            Bit2        : BIT2_OFF,
   165            Bit3        : BIT3_OFF,
   166            Bit4        : BIT4_OFF,
   167            Bit5        : BIT5_OFF,
   168            Bit6        : BIT6,         /* POR default for all 2xx devices */
   169            Bit7        : BIT7          /* POR default for all 2xx devices */
   170        };
   171        
   172        /*! Port 2 Direction Register */
   173        config GpioBits8PxDir_t P2DIR = {
   174            Bit0        : BIT0_OFF,
   175            Bit1        : BIT1_OFF,
   176            Bit2        : BIT2_OFF,
   177            Bit3        : BIT3_OFF,
   178            Bit4        : BIT4_OFF,
   179            Bit5        : BIT5_OFF,
   180            Bit6        : BIT6_OFF,
   181            Bit7        : BIT7_OFF
   182        };
   183        
   184        /*! Port 2 Resistor Enable Register */
   185        config GpioBits8PxRen_t P2REN = {
   186            Bit0        : BIT0_OFF,
   187            Bit1        : BIT1_OFF,
   188            Bit2        : BIT2_OFF,
   189            Bit3        : BIT3_OFF,
   190            Bit4        : BIT4_OFF,
   191            Bit5        : BIT5_OFF,
   192            Bit6        : BIT6_OFF,
   193            Bit7        : BIT7_OFF
   194        };
   195        
   196        /*! Port 2 Interrupt Edge Select Register */
   197        config GpioBits8PxIes_t P2IES = {
   198            Bit0        : BIT0_OFF,
   199            Bit1        : BIT1_OFF,
   200            Bit2        : BIT2_OFF,
   201            Bit3        : BIT3_OFF,
   202            Bit4        : BIT4_OFF,
   203            Bit5        : BIT5_OFF,
   204            Bit6        : BIT6_OFF,
   205            Bit7        : BIT7_OFF
   206        };
   207        
   208        /*! Port 2 Interrupt Flag Register */
   209        config GpioBits8PxIfg_t P2IFG = {
   210            Bit0        : BIT0_OFF,
   211            Bit1        : BIT1_OFF,
   212            Bit2        : BIT2_OFF,
   213            Bit3        : BIT3_OFF,
   214            Bit4        : BIT4_OFF,
   215            Bit5        : BIT5_OFF,
   216            Bit6        : BIT6_OFF,
   217            Bit7        : BIT7_OFF
   218        };
   219        
   220        /*! Port 2 Interrupt Enable Register */
   221        config GpioBits8PxIe_t P2IE = {
   222            Bit0        : BIT0_OFF,
   223            Bit1        : BIT1_OFF,
   224            Bit2        : BIT2_OFF,
   225            Bit3        : BIT3_OFF,
   226            Bit4        : BIT4_OFF,
   227            Bit5        : BIT5_OFF,
   228            Bit6        : BIT6_OFF,
   229            Bit7        : BIT7_OFF
   230        };
   231    }