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12 /*!
13 * ======== IComparator ========
14 * MSP430 IComparator interface
15 */
16 metaonly interface IComparator inherits xdc.platform.IPeripheral {
17
18 /*! CAEX Bit */
19 enum CAEX_t {
20 CAEX_OFF = 0x0000, /*! Disable CAEX bit */
21 CAEX = 0x0080 /*! Enable CAEX bit */
22 };
23
24 /*! CARSEL Bit */
25 enum CARSEL_t {
26 CARSEL_OFF = 0x0000, /*! Disable CARSEL bit */
27 CARSEL = 0x0040 /*! Enable CARSEL bit */
28 };
29
30 /*! CAREF Bit */
31 enum CAREF_t {
32 CAREF_0 = 0x0000, /*! Reference Off */
33 CAREF_1 = 0x0010, /*! 0.25 * VCC */
34 CAREF_2 = 0x0020, /*! 0.50 * VCC */
35 CAREF_3 = 0x0030 /*! Diode Reference */
36 };
37
38 /*! CAON Bit */
39 enum CAON_t {
40 CAON_OFF = 0x0000, /*! Disable CAON bit */
41 CAON = 0x0008 /*! Enable CAON bit */
42 };
43
44 /*! CAIES Bit */
45 enum CAIES_t {
46 CAIES_OFF = 0x0000, /*! Rising Edge */
47 CAIES = 0x0004 /*! Falling Edge */
48 };
49
50 /*! CAIE Bit */
51 enum CAIE_t {
52 CAIE_OFF = 0x0000, /*! Disable CAIE bit */
53 CAIE = 0x0002 /*! Enable CAIE bit */
54 };
55
56 /*! CAIFG Bit */
57 enum CAIFG_t {
58 CAIFG_OFF = 0x0000, /*! Disable CAIFG bit */
59 CAIFG = 0x0001 /*! Enable CAIFG bit */
60 };
61
62 /*! CASHORT Bit */
63 enum CASHORT_t {
64 CASHORT_OFF = 0x0000, /*! Disable CASHORT bit */
65 CASHORT = 0x0080 /*! Enable CASHORT bit */
66 };
67
68 /*! P2CA4 Bit */
69 enum P2CA4_t {
70 P2CA4_OFF = 0x0000, /*! Disable P2CA4 bit */
71 P2CA4 = 0x0040 /*! Enable P2CA4 bit */
72 };
73
74 /*! P2CA3 Bit */
75 enum P2CA3_t {
76 P2CA3_OFF = 0x0000, /*! Disable P2CA3 bit */
77 P2CA3 = 0x0020 /*! Enable P2CA3 bit */
78 };
79
80 /*! P2CA2 Bit */
81 enum P2CA2_t {
82 P2CA2_OFF = 0x0000, /*! Disable P2CA2 bit */
83 P2CA2 = 0x0010 /*! Enable P2CA2 bit */
84 };
85
86 /*! P2CA1 Bit */
87 enum P2CA1_t {
88 P2CA1_OFF = 0x0000, /*! Disable P2CA1 bit */
89 P2CA1 = 0x0008 /*! Enable P2CA1 bit */
90 };
91
92
93 /*! P2CA0 Bit */
94 enum P2CA0_t {
95 P2CA0_OFF = 0x0000, /*! Disable P2CA0 bit */
96 P2CA0 = 0x0004 /*! Enable P2CA0 bit */
97 };
98
99 /*! CAF Bit */
100 enum CAF_t {
101 CAF_OFF = 0x0000, /*! Disable CAF bit */
102 CAF = 0x0002 /*! Enable CAF bit */
103 };
104
105 /*! CAPD7 Bit */
106 enum CAPD7_t {
107 CAPD7_OFF = 0x0000, /*! Disable CAPD7 bit */
108 CAPD7 = 0x0001 /*! Enable CAPD7 bit */
109 };
110
111 /*! CAPD6 Bit */
112 enum CAPD6_t {
113 CAPD6_OFF = 0x0000, /*! Disable CAPD6 bit */
114 CAPD6 = 0x0002 /*! Enable CAPD6 bit */
115 };
116
117 /*! CAPD5 Bit */
118 enum CAPD5_t {
119 CAPD5_OFF = 0x0000, /*! Disable CAPD5 bit */
120 CAPD5 = 0x0004 /*! Enable CAPD5 bit */
121 };
122
123 /*! CAPD4 Bit */
124 enum CAPD4_t {
125 CAPD4_OFF = 0x0000, /*! Disable CAPD4 bit */
126 CAPD4 = 0x0008 /*! Enable CAPD4 bit */
127 };
128
129 /*! CAPD3 Bit */
130 enum CAPD3_t {
131 CAPD3_OFF = 0x0000, /*! Disable CAPD3 bit */
132 CAPD3 = 0x0010 /*! Enable CAPD3 bit */
133 };
134
135 /*! CAPD2 Bit */
136 enum CAPD2_t {
137 CAPD2_OFF = 0x0000, /*! Disable CAPD2 bit */
138 CAPD2 = 0x0020 /*! Enable CAPD2 bit */
139 };
140
141 /*! CAPD1 Bit */
142 enum CAPD1_t {
143 CAPD1_OFF = 0x0000, /*! Disable CAPD1 bit */
144 CAPD1 = 0x0040 /*! Enable CAPD1 bit */
145 };
146
147 /*! CAPD0 Bit */
148 enum CAPD0_t {
149 CAPD0_OFF = 0x0000, /*! Disable CAPD0 bit */
150 CAPD0 = 0x0080 /*! Enable CAPD0 bit */
151 };
152
153
154 /*!
155 * ======== ForceSetDefaultRegister_t ========
156 * Force Set Default Register
157 *
158 * Type to store if each register needs to be forced initialized
159 * even if the register is in default state.
160 *
161 * @see #ForceSetDefaultRegister_t
162 */
163 struct ForceSetDefaultRegister_t {
164 String register;
165 Bool regForceSet;
166 }
167
168
169 instance:
170
171 }