1 /* 2 * Copyright (c) 2011 by Texas Instruments and others. 3 * All rights reserved. This program and the accompanying materials 4 * are made available under the terms of the Eclipse Public License v1.0 5 * which accompanies this distribution, and is available at 6 * http://www.eclipse.org/legal/epl-v10.html 7 * 8 * Contributors: 9 * Texas Instruments - initial implementation 10 * 11 * */ 12 13 /* 14 * ======== Platform.xdc ======== 15 * 16 */ 17 18 /*! 19 * ======== Platform ======== 20 * Platform support for the simTCI6498 21 */ 22 metaonly module Platform inherits xdc.platform.IPlatform 23 { 24 readonly config xdc.platform.IPlatform.Board BOARD = { 25 id: "0", 26 boardName: "simTCI6498", 27 boardFamily: "simTCI6498", 28 boardRevision: null, 29 }; 30 31 readonly config xdc.platform.IExeContext.Cpu CPU = { 32 id: "0", 33 clockRate: 1000, 34 catalogName: "ti.catalog.c6000", 35 deviceName: "TMS320CTCI6498", 36 revision: "1.0", 37 }; 38 39 instance: 40 41 override config string codeMemory = "L2SRAM"; 42 override config string dataMemory = "L2SRAM"; 43 override config string stackMemory = "L2SRAM"; 44 45 /* 46 * ======== l1PMode ======== 47 * Define the amount of L1P RAM used for L1 Program Cache. 48 * 49 * Check the device documentation for valid values. 50 */ 51 config String l1PMode = "32k"; 52 53 /* 54 * ======== l1DMode ======== 55 * Define the amount of L1D RAM used for L1 Data Cache. 56 * 57 * Check the device documentation for valid values. 58 */ 59 config String l1DMode = "32k"; 60 61 /* 62 * ======== l2Mode ======== 63 * Define the amount of L2 RAM used for L2 Cache. 64 * 65 * Check the device documentation for valid values. 66 */ 67 config String l2Mode = "0k"; 68 }; 69 /* 70 * @(#) ti.platforms.simTCI6498; 1, 0, 0, 0,118; 11-9-2011 12:05:34; /db/ztree/library/trees/platform/platform-n08x/src/ 71 */ 72