1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     * 
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     * 
    11     * --/COPYRIGHT--*/
    12    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    13    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    14    
    15    /*!
    16     *  ======== GPIO for MSP430G2x53 ========
    17     *  MSP430 General Purpose Input Output Ports
    18     */
    19    metaonly module GPIO_MSP430G2x53 inherits IGPIO {
    20        /*!
    21         *  ======== create ========
    22         *  Create an instance of this peripheral. Use a customized
    23         *  init function so that we can get access to the ADC10 and comparator
    24         *  instances.
    25         */
    26            create(ADC10.Instance adc10, Comparator.Instance comparator);
    27            
    28    instance:
    29        /*! @_nodoc */
    30        config ADC10.Instance adc10;
    31        
    32        /*! @_nodoc */
    33            config Comparator.Instance comparator;
    34    
    35       /*! Define an array to describe all device pins. The 1st dimension
    36        *  denotes the port, the second the pin on that port. On an
    37        *  MSP430G2x53 device, there are 3 x 8 = 24 pins total.
    38        */
    39            
    40            /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    41             * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    42        /* TODO: For this device the config variable definition has been moved into the
    43         * corresponding XS file due to its size. This needs a more consistent solution. */
    44        config DevicePin_t devicePins[3][8];
    45        
    46            /*! Implementation of Device Pin Functional Configuration */
    47            override config DevicePinFunctionSetting_t devicePinSetting[3][8];
    48    
    49            /*! Determine if each Register needs to be forced set or not */
    50            readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    51            [
    52                    { register : "P1OUT" , regForceSet : true  },
    53                    { register : "P1SEL" , regForceSet : false },
    54            { register : "P1SEL2", regForceSet : false },
    55                    { register : "P1DIR" , regForceSet : false },
    56                    { register : "P1REN" , regForceSet : false },
    57                    { register : "P1IES" , regForceSet : true  },
    58                    { register : "P1IFG" , regForceSet : true  },
    59                    { register : "P1IE"  , regForceSet : false },
    60                    { register : "P2OUT" , regForceSet : true  },
    61                    { register : "P2SEL" , regForceSet : false },
    62                    { register : "P2SEL2", regForceSet : false },
    63                    { register : "P2DIR" , regForceSet : false },
    64                    { register : "P2REN" , regForceSet : false },
    65                    { register : "P2IES" , regForceSet : true  },
    66                    { register : "P2IFG" , regForceSet : true  },
    67                    { register : "P2IE"  , regForceSet : false },
    68                    { register : "P3OUT" , regForceSet : true  },
    69                    { register : "P3SEL" , regForceSet : false },
    70            { register : "P3SEL2", regForceSet : false },
    71                    { register : "P3DIR" , regForceSet : false },
    72                    { register : "P3REN" , regForceSet : false },
    73            ];
    74            
    75        /*
    76         *  GPIO Digital I/O Registers
    77         *
    78         *  One GIPO instance defines the configuration of an entire,
    79         *  8-bit wide digital I/O port.
    80         */
    81         
    82        /*! Port 1 Output Register */ 
    83        config GpioBits8PxOut_t P1OUT = {
    84            Bit0        : BIT0_OFF,
    85            Bit1        : BIT1_OFF,
    86            Bit2        : BIT2_OFF,
    87            Bit3        : BIT3_OFF,
    88            Bit4        : BIT4_OFF,
    89            Bit5        : BIT5_OFF,
    90            Bit6        : BIT6_OFF,
    91            Bit7        : BIT7_OFF
    92        };
    93    
    94        /*! Port 1 Port Select Register */
    95        config GpioBits8PxSel_t P1SEL = {
    96            Bit0        : BIT0_OFF,
    97            Bit1        : BIT1_OFF,
    98            Bit2        : BIT2_OFF,
    99            Bit3        : BIT3_OFF,
   100            Bit4        : BIT4_OFF,
   101            Bit5        : BIT5_OFF,
   102            Bit6        : BIT6_OFF,
   103            Bit7        : BIT7_OFF
   104        };
   105        
   106        /*! Port 1 Port Select 2 Register */
   107        config GpioBits8PxSel_t P1SEL2 = {
   108            Bit0        : BIT0_OFF,
   109            Bit1        : BIT1_OFF,
   110            Bit2        : BIT2_OFF,
   111            Bit3        : BIT3_OFF,
   112            Bit4        : BIT4_OFF,
   113            Bit5        : BIT5_OFF,
   114            Bit6        : BIT6_OFF,
   115            Bit7        : BIT7_OFF
   116        };
   117        
   118        /*! Port 1 Direction Register */
   119        config GpioBits8PxDir_t P1DIR = {
   120            Bit0        : BIT0_OFF,
   121            Bit1        : BIT1_OFF,
   122            Bit2        : BIT2_OFF,
   123            Bit3        : BIT3_OFF,
   124            Bit4        : BIT4_OFF,
   125            Bit5        : BIT5_OFF,
   126            Bit6        : BIT6_OFF,
   127            Bit7        : BIT7_OFF
   128        };
   129        
   130        /*! Port 1 Resistor Enable Register */
   131        config GpioBits8PxRen_t P1REN = {
   132            Bit0        : BIT0_OFF,
   133            Bit1        : BIT1_OFF,
   134            Bit2        : BIT2_OFF,
   135            Bit3        : BIT3_OFF,
   136            Bit4        : BIT4_OFF,
   137            Bit5        : BIT5_OFF,
   138            Bit6        : BIT6_OFF,
   139            Bit7        : BIT7_OFF
   140        };
   141        
   142        /*! Port 1 Interrupt Edge Select Register */
   143        config GpioBits8PxIes_t P1IES = {
   144            Bit0        : BIT0_OFF,
   145            Bit1        : BIT1_OFF,
   146            Bit2        : BIT2_OFF,
   147            Bit3        : BIT3_OFF,
   148            Bit4        : BIT4_OFF,
   149            Bit5        : BIT5_OFF,
   150            Bit6        : BIT6_OFF,
   151            Bit7        : BIT7_OFF
   152        };
   153        
   154        /*! Port 1 Interrupt Flag Register */
   155        config GpioBits8PxIfg_t P1IFG = {
   156            Bit0        : BIT0_OFF,
   157            Bit1        : BIT1_OFF,
   158            Bit2        : BIT2_OFF,
   159            Bit3        : BIT3_OFF,
   160            Bit4        : BIT4_OFF,
   161            Bit5        : BIT5_OFF,
   162            Bit6        : BIT6_OFF,
   163            Bit7        : BIT7_OFF
   164        };
   165        
   166        /*! Port 1 Interrupt Enable Register */
   167        config GpioBits8PxIe_t P1IE = {
   168            Bit0        : BIT0_OFF,
   169            Bit1        : BIT1_OFF,
   170            Bit2        : BIT2_OFF,
   171            Bit3        : BIT3_OFF,
   172            Bit4        : BIT4_OFF,
   173            Bit5        : BIT5_OFF,
   174            Bit6        : BIT6_OFF,
   175            Bit7        : BIT7_OFF
   176        };
   177    
   178        /*! Port 2 Output Register */ 
   179        config GpioBits8PxOut_t P2OUT = {
   180            Bit0        : BIT0_OFF,
   181            Bit1        : BIT1_OFF,
   182            Bit2        : BIT2_OFF,
   183            Bit3        : BIT3_OFF,
   184            Bit4        : BIT4_OFF,
   185            Bit5        : BIT5_OFF,
   186            Bit6        : BIT6_OFF,
   187            Bit7        : BIT7_OFF
   188        };
   189    
   190        /*! Port 2 Port Select Register */
   191        config GpioBits8PxSel_t P2SEL = {
   192            Bit0        : BIT0_OFF,
   193            Bit1        : BIT1_OFF,
   194            Bit2        : BIT2_OFF,
   195            Bit3        : BIT3_OFF,
   196            Bit4        : BIT4_OFF,
   197            Bit5        : BIT5_OFF,
   198            Bit6        : BIT6,         /* POR default for all 2xx devices */
   199            Bit7        : BIT7          /* POR default for all 2xx devices */
   200        };
   201        
   202        /*! Port 2 Port Select 2 Register */
   203        config GpioBits8PxSel2_t P2SEL2 = {
   204            Bit0        : BIT0_OFF,
   205            Bit1        : BIT1_OFF,
   206            Bit2        : BIT2_OFF,
   207            Bit3        : BIT3_OFF,
   208            Bit4        : BIT4_OFF,
   209            Bit5        : BIT5_OFF,
   210            Bit6        : BIT6_OFF,
   211            Bit7        : BIT7_OFF
   212        };
   213        
   214        /*! Port 2 Direction Register */
   215        config GpioBits8PxDir_t P2DIR = {
   216            Bit0        : BIT0_OFF,
   217            Bit1        : BIT1_OFF,
   218            Bit2        : BIT2_OFF,
   219            Bit3        : BIT3_OFF,
   220            Bit4        : BIT4_OFF,
   221            Bit5        : BIT5_OFF,
   222            Bit6        : BIT6_OFF,
   223            Bit7        : BIT7_OFF
   224        };
   225        
   226        /*! Port 2 Resistor Enable Register */
   227        config GpioBits8PxRen_t P2REN = {
   228            Bit0        : BIT0_OFF,
   229            Bit1        : BIT1_OFF,
   230            Bit2        : BIT2_OFF,
   231            Bit3        : BIT3_OFF,
   232            Bit4        : BIT4_OFF,
   233            Bit5        : BIT5_OFF,
   234            Bit6        : BIT6_OFF,
   235            Bit7        : BIT7_OFF
   236        };
   237        
   238        /*! Port 2 Interrupt Edge Select Register */
   239        config GpioBits8PxIes_t P2IES = {
   240            Bit0        : BIT0_OFF,
   241            Bit1        : BIT1_OFF,
   242            Bit2        : BIT2_OFF,
   243            Bit3        : BIT3_OFF,
   244            Bit4        : BIT4_OFF,
   245            Bit5        : BIT5_OFF,
   246            Bit6        : BIT6_OFF,
   247            Bit7        : BIT7_OFF
   248        };
   249        
   250        /*! Port 2 Interrupt Flag Register */
   251        config GpioBits8PxIfg_t P2IFG = {
   252            Bit0        : BIT0_OFF,
   253            Bit1        : BIT1_OFF,
   254            Bit2        : BIT2_OFF,
   255            Bit3        : BIT3_OFF,
   256            Bit4        : BIT4_OFF,
   257            Bit5        : BIT5_OFF,
   258            Bit6        : BIT6_OFF,
   259            Bit7        : BIT7_OFF
   260        };
   261        
   262        /*! Port 2 Interrupt Enable Register */
   263        config GpioBits8PxIe_t P2IE = {
   264            Bit0        : BIT0_OFF,
   265            Bit1        : BIT1_OFF,
   266            Bit2        : BIT2_OFF,
   267            Bit3        : BIT3_OFF,
   268            Bit4        : BIT4_OFF,
   269            Bit5        : BIT5_OFF,
   270            Bit6        : BIT6_OFF,
   271            Bit7        : BIT7_OFF
   272        };
   273    
   274        /*! Port 3 Output Register */ 
   275        config GpioBits8PxOut_t P3OUT = {
   276            Bit0        : BIT0_OFF,
   277            Bit1        : BIT1_OFF,
   278            Bit2        : BIT2_OFF,
   279            Bit3        : BIT3_OFF,
   280            Bit4        : BIT4_OFF,
   281            Bit5        : BIT5_OFF,
   282            Bit6        : BIT6_OFF,
   283            Bit7        : BIT7_OFF
   284        };
   285    
   286        /*! Port 3 Port Select Register */
   287        config GpioBits8PxSel_t P3SEL = {
   288            Bit0        : BIT0_OFF,
   289            Bit1        : BIT1_OFF,
   290            Bit2        : BIT2_OFF,
   291            Bit3        : BIT3_OFF,
   292            Bit4        : BIT4_OFF,
   293            Bit5        : BIT5_OFF,
   294            Bit6        : BIT6_OFF,
   295            Bit7        : BIT7_OFF
   296        };
   297        
   298        /*! Port 3 Port Select 2 Register */
   299        config GpioBits8PxSel2_t P3SEL2 = {
   300            Bit0        : BIT0_OFF,
   301            Bit1        : BIT1_OFF,
   302            Bit2        : BIT2_OFF,
   303            Bit3        : BIT3_OFF,
   304            Bit4        : BIT4_OFF,
   305            Bit5        : BIT5_OFF,
   306            Bit6        : BIT6_OFF,
   307            Bit7        : BIT7_OFF
   308        };
   309            
   310        /*! Port 3 Direction Register */
   311        config GpioBits8PxDir_t P3DIR = {
   312            Bit0        : BIT0_OFF,
   313            Bit1        : BIT1_OFF,
   314            Bit2        : BIT2_OFF,
   315            Bit3        : BIT3_OFF,
   316            Bit4        : BIT4_OFF,
   317            Bit5        : BIT5_OFF,
   318            Bit6        : BIT6_OFF,
   319            Bit7        : BIT7_OFF
   320        };
   321        
   322        /*! Port 3 Resistor Enable Register */
   323        config GpioBits8PxRen_t P3REN = {
   324            Bit0        : BIT0_OFF,
   325            Bit1        : BIT1_OFF,
   326            Bit2        : BIT2_OFF,
   327            Bit3        : BIT3_OFF,
   328            Bit4        : BIT4_OFF,
   329            Bit5        : BIT5_OFF,
   330            Bit6        : BIT6_OFF,
   331            Bit7        : BIT7_OFF
   332        };
   333    }