1 2 3 4 5 6 7 8 9 10 11
12 import ti.catalog.msp430.peripherals.clock.UCS as UCS;
13
14 /*!
15 * ======== GPIO for MSP430F543xA ========
16 * MSP430 General Purpose Input Output Ports
17 */
18 metaonly module GPIO_MSP430F543xA inherits IGPIO {
19 /*!
20 * ======== create ========
21 * Create an instance of this peripheral. Use a customized
22 * init function so that we can get access to the UCS
23 * instances.
24 */
25 create(UCS.Instance clock);
26
27 instance:
28 /*! @_nodoc */
29 config UCS.Instance clock;
30
31 /*! Define an array to describe all device pins. The 1st dimension
32 * denotes the port, the second the pin on that port. On an
33 * MSP430F543x(A) device, there are 8 + 2 = 10 pins total.
34 */
35
36 37
38 config DevicePin_t devicePins[2][8];
39
40 /*! Implementation of Device Pin Functional Configuration */
41 override config DevicePinFunctionSetting_t devicePinSetting[2][8];
42
43 /*! Determine if each Register needs to be forced set or not */
44 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
45 [
46 { register : "P1OUT" , regForceSet : true },
47 { register : "P1SEL" , regForceSet : false },
48 { register : "P1DIR" , regForceSet : false },
49 { register : "P1REN" , regForceSet : false },
50 { register : "P1IES" , regForceSet : true },
51 { register : "P1IFG" , regForceSet : true },
52 { register : "P1IE" , regForceSet : false },
53 { register : "P2OUT" , regForceSet : true },
54 { register : "P2SEL" , regForceSet : false },
55 { register : "P2DIR" , regForceSet : false },
56 { register : "P2REN" , regForceSet : false },
57 { register : "P2IES" , regForceSet : true },
58 { register : "P2IFG" , regForceSet : true },
59 { register : "P2IE" , regForceSet : false }
60 ];
61
62 63 64 65 66 67
68
69 /*! Port 1 Output Register */
70 config GpioBits8PxOut_t P1OUT = {
71 Bit0 : BIT0_OFF,
72 Bit1 : BIT1_OFF,
73 Bit2 : BIT2_OFF,
74 Bit3 : BIT3_OFF,
75 Bit4 : BIT4_OFF,
76 Bit5 : BIT5_OFF,
77 Bit6 : BIT6_OFF,
78 Bit7 : BIT7_OFF
79 };
80
81 /*! Port 1 Port Select Register */
82 config GpioBits8PxSel_t P1SEL = {
83 Bit0 : BIT0_OFF,
84 Bit1 : BIT1_OFF,
85 Bit2 : BIT2_OFF,
86 Bit3 : BIT3_OFF,
87 Bit4 : BIT4_OFF,
88 Bit5 : BIT5_OFF,
89 Bit6 : BIT6_OFF,
90 Bit7 : BIT7_OFF
91 };
92
93 /*! Port 1 Direction Register */
94 config GpioBits8PxDir_t P1DIR = {
95 Bit0 : BIT0_OFF,
96 Bit1 : BIT1_OFF,
97 Bit2 : BIT2_OFF,
98 Bit3 : BIT3_OFF,
99 Bit4 : BIT4_OFF,
100 Bit5 : BIT5_OFF,
101 Bit6 : BIT6_OFF,
102 Bit7 : BIT7_OFF
103 };
104
105 /*! Port 1 Resistor Enable Register */
106 config GpioBits8PxRen_t P1REN = {
107 Bit0 : BIT0_OFF,
108 Bit1 : BIT1_OFF,
109 Bit2 : BIT2_OFF,
110 Bit3 : BIT3_OFF,
111 Bit4 : BIT4_OFF,
112 Bit5 : BIT5_OFF,
113 Bit6 : BIT6_OFF,
114 Bit7 : BIT7_OFF
115 };
116
117 /*! Port 1 Interrupt Edge Select Register */
118 config GpioBits8PxIes_t P1IES = {
119 Bit0 : BIT0_OFF,
120 Bit1 : BIT1_OFF,
121 Bit2 : BIT2_OFF,
122 Bit3 : BIT3_OFF,
123 Bit4 : BIT4_OFF,
124 Bit5 : BIT5_OFF,
125 Bit6 : BIT6_OFF,
126 Bit7 : BIT7_OFF
127 };
128
129 /*! Port 1 Interrupt Flag Register */
130 config GpioBits8PxIfg_t P1IFG = {
131 Bit0 : BIT0_OFF,
132 Bit1 : BIT1_OFF,
133 Bit2 : BIT2_OFF,
134 Bit3 : BIT3_OFF,
135 Bit4 : BIT4_OFF,
136 Bit5 : BIT5_OFF,
137 Bit6 : BIT6_OFF,
138 Bit7 : BIT7_OFF
139 };
140
141 /*! Port 1 Interrupt Enable Register */
142 config GpioBits8PxIe_t P1IE = {
143 Bit0 : BIT0_OFF,
144 Bit1 : BIT1_OFF,
145 Bit2 : BIT2_OFF,
146 Bit3 : BIT3_OFF,
147 Bit4 : BIT4_OFF,
148 Bit5 : BIT5_OFF,
149 Bit6 : BIT6_OFF,
150 Bit7 : BIT7_OFF
151 };
152
153 /*! Port 2 Output Register */
154 config GpioBits8PxOut_t P2OUT = {
155 Bit0 : BIT0_OFF,
156 Bit1 : BIT1_OFF,
157 Bit2 : BIT2_OFF,
158 Bit3 : BIT3_OFF,
159 Bit4 : BIT4_OFF,
160 Bit5 : BIT5_OFF,
161 Bit6 : BIT6_OFF,
162 Bit7 : BIT7_OFF
163 };
164
165 /*! Port 2 Port Select Register */
166 config GpioBits8PxSel_t P2SEL = {
167 Bit0 : BIT0_OFF,
168 Bit1 : BIT1_OFF,
169 Bit2 : BIT2_OFF,
170 Bit3 : BIT3_OFF,
171 Bit4 : BIT4_OFF,
172 Bit5 : BIT5_OFF,
173 Bit6 : BIT6,
174 Bit7 : BIT7
175 };
176
177 /*! Port 2 Direction Register */
178 config GpioBits8PxDir_t P2DIR = {
179 Bit0 : BIT0_OFF,
180 Bit1 : BIT1_OFF,
181 Bit2 : BIT2_OFF,
182 Bit3 : BIT3_OFF,
183 Bit4 : BIT4_OFF,
184 Bit5 : BIT5_OFF,
185 Bit6 : BIT6_OFF,
186 Bit7 : BIT7_OFF
187 };
188
189 /*! Port 2 Resistor Enable Register */
190 config GpioBits8PxRen_t P2REN = {
191 Bit0 : BIT0_OFF,
192 Bit1 : BIT1_OFF,
193 Bit2 : BIT2_OFF,
194 Bit3 : BIT3_OFF,
195 Bit4 : BIT4_OFF,
196 Bit5 : BIT5_OFF,
197 Bit6 : BIT6_OFF,
198 Bit7 : BIT7_OFF
199 };
200
201 /*! Port 2 Interrupt Edge Select Register */
202 config GpioBits8PxIes_t P2IES = {
203 Bit0 : BIT0_OFF,
204 Bit1 : BIT1_OFF,
205 Bit2 : BIT2_OFF,
206 Bit3 : BIT3_OFF,
207 Bit4 : BIT4_OFF,
208 Bit5 : BIT5_OFF,
209 Bit6 : BIT6_OFF,
210 Bit7 : BIT7_OFF
211 };
212
213 /*! Port 2 Interrupt Flag Register */
214 config GpioBits8PxIfg_t P2IFG = {
215 Bit0 : BIT0_OFF,
216 Bit1 : BIT1_OFF,
217 Bit2 : BIT2_OFF,
218 Bit3 : BIT3_OFF,
219 Bit4 : BIT4_OFF,
220 Bit5 : BIT5_OFF,
221 Bit6 : BIT6_OFF,
222 Bit7 : BIT7_OFF
223 };
224
225 /*! Port 2 Interrupt Enable Register */
226 config GpioBits8PxIe_t P2IE = {
227 Bit0 : BIT0_OFF,
228 Bit1 : BIT1_OFF,
229 Bit2 : BIT2_OFF,
230 Bit3 : BIT3_OFF,
231 Bit4 : BIT4_OFF,
232 Bit5 : BIT5_OFF,
233 Bit6 : BIT6_OFF,
234 Bit7 : BIT7_OFF
235 };
236 }