1    /*
     2     *  Copyright (c) 2011 by Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    
    13    /*
    14     *  ======== Boot.xdc ========
    15     *
    16     */
    17    
    18    package ti.catalog.c2800.init;
    19    
    20    import xdc.rov.ViewInfo;
    21    
    22    /*!
    23     *  ======== Boot ========
    24     *  28x Boot Support.
    25     *
    26     *  The Boot module supports boot initialization for the 28x devices.
    27     *  A special boot init function is created based on the configuration
    28     *  settings for this module.  This function is hooked into the
    29     *  xdc.runtime.Reset.fxns[] array and called very early at boot time (prior
    30     *  to cinit processing).
    31     *
    32     *  The code to support the boot module is placed in a separate section
    33     *  named `".text:.bootCodeSection"` to allow placement of this section in
    34     *  the linker .cmd file if necessary. This section is a subsection of the
    35     *  `".text"` section so this code will be placed into the .text section unless
    36     *  explicitly placed, either through
    37     *  `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
    38     *  command file.
    39     */
    40    @Template("./Boot.xdt")
    41    @NoRuntime
    42    module Boot
    43    {
    44        /*! PLL type */
    45        metaonly enum Type {
    46            Type_280x,   /*! 280x (PLL configuration not supported for this type) */
    47            Type_281x,   /*! 281x (PLL configuration not supported for this type) */
    48            Type_282xx_283xx,         /*! 282xx or 283xx */
    49            Type_2802x_2803x_2806x,   /*! 2802x or 2803x or 2806x */
    50            Type_2834x                /*! 2834x */
    51        };
    52    
    53        metaonly struct ModuleView {
    54            Bool         disableWatchdog;
    55            Bool         configurePll;
    56            UInt         pllcrDIV;
    57            UInt         pllstsDIVSEL;
    58        }
    59    
    60        @Facet
    61        metaonly config ViewInfo.Instance rovViewInfo = 
    62            ViewInfo.create({
    63                viewMap: [
    64                [
    65                    'Module',
    66                    {
    67                        type: ViewInfo.MODULE,
    68                        viewInitFxn: 'viewInitModule',
    69                        structName: 'ModuleView'
    70                    }
    71                ],
    72                ]
    73            });
    74        
    75        /*! 
    76         *  Watchdog disable flag, default is false.
    77         *
    78         *  Set to true to disable the watchdog timer.
    79         */
    80        metaonly config Bool disableWatchdog = false;
    81    
    82        /*! 
    83         *  PLL type.  
    84         *
    85         *  The default will be determined by platform specification, or by the 
    86         *  device ID for the generic (tms320c28) platform.
    87         */
    88        metaonly config Type pllType;
    89    
    90        /*! 
    91         *  PLL configuration flag, default is false.
    92         *
    93         *  Set to true to configure the PLL.
    94         */
    95        metaonly config Bool configurePll = false;
    96    
    97        /*! 
    98         *  OSCCLK input frequency to PLL, in MHz. Default is 10 MHz.
    99         *
   100         *  This is the frequency of the oscillator clock (OSCCLK) input to the
   101         *  PLL.  On some devices (e.g., TMS320C28346) this will correspond to the
   102         *  frequency of an external crystal or clock input.  On others 
   103         *  (e.g., TMS320F28069) this will correspond to the frequency of an 
   104         *  internal oscillator which is the default OSCCLK coming out of reset.
   105         */
   106        metaonly config UInt pllOSCCLK = 10;
   107    
   108        /*! 
   109         *  PLLCR[DIV] clocking ratio value. Default is 10.
   110         *
   111         *  This is the actual value written to the DIV bits in 
   112         *  the PLL Control Register (PLLCR)
   113         */
   114        metaonly config UInt pllcrDIV = 10;
   115    
   116        /*! 
   117         *  PLLSTS[DIVSEL] divide select value. Default is 2.
   118         *
   119         *  This is the actual value written to the DIVSEL bits in 
   120         *  the PLL Status Register (PLLSTS).
   121         *
   122         *  This configuration parameter applies for all of the
   123         *  enumerated PLL types, except for "Type_280x".
   124         */
   125        metaonly config UInt pllstsDIVSEL = 2;
   126    
   127        /*!
   128         *  Function to be called when Limp mode is detected.
   129         *
   130         *  This function is called when the Boot module is about to configure
   131         *  the PLL, but finds the device operating in Limp mode (i.e., the mode
   132         *  when a missing OSCCLK input has been detected).
   133         *  
   134         *  If this function is not specified by the application, a default 
   135         *  function will be used, which does an ESTOP0 and then enters an
   136         *  infinite loop.
   137         */
   138        metaonly config Fxn limpAbortFunction;
   139    
   140        /*! 
   141         *  Boot from FLASH flag, default is false.
   142         *
   143         *  Set to true to enable booting from FLASH.  When set to true,
   144         *  a long branch (LB) to the c_int00 entry point will be placed at 
   145         *  the BEGIN section address defined in the linker command file.
   146         */
   147        metaonly config Bool bootFromFlash = false;
   148    
   149        /*!
   150         * Configure the external memory interface (XINTF) for eZdsp283xx
   151         * boards.
   152         *
   153         * This external memory interface configuration is applicable only for
   154         * eZdsp283xx boards; it should not be enabled for any other boards.
   155         */
   156        metaonly config Bool enableEzdspXintfConfig = false;
   157    
   158        /*!
   159         * @_nodoc
   160         *  Default abort function to be called when PLL Limp mode is detected
   161         */
   162        metaonly Void defaultLimpAbort();
   163    
   164        /*!
   165         *  ======== getFrequency ========
   166         *  Gets the resulting output frequency (in Hz) given the PLL configuration 
   167         *  parameters.
   168         */
   169        metaonly UInt32 getFrequency();
   170        
   171        /*!
   172         *  ======== registerFreqListener ========
   173         *  Register a module to be notified whenever the frequency changes.
   174         *
   175         *  The registered module must have a function named 'fireFrequencyUpdate'
   176         *  which takes the new frequency as an argument.
   177         */
   178        metaonly function registerFreqListener(listener);
   179        
   180    internal:
   181    
   182        /* Used to display the computed frequency value in the Grace page. */
   183        metaonly config String displayFrequency;
   184    
   185        /* Used to indicate if using on a Concerto device */
   186        metaonly config Bool concertoDevice = false;
   187    
   188    };   
   189    /*
   190     *  @(#) ti.catalog.c2800.init; 1, 0, 0,231; 11-9-2011 11:59:45; /db/ztree/library/trees/platform/platform-n08x/src/
   191     */
   192