1 2 3 4 5 6 7 8 9 10 11
12 import ti.catalog.msp430.peripherals.clock.IClock;
13
14 /*!
15 * Universal Serial Communication Interface B1 I2C 2xx
16 */
17 metaonly module USCI_B1_I2C_2xx inherits IUSCI_B1_I2C {
18
19 20 21
22 create(IClock.Instance clock);
23
24 /*! Not-acknowledge interrupt enable */
25 enum UCNACKIE_t {
26 UCNACKIE_OFF = 0x00, /*! Interrupt disabled */
27 UCNACKIE = 0x80 /*! Interrupt enabled */
28 };
29
30 /*! Stop condition interrupt enable */
31 enum UCSTPIE_t {
32 UCSTPIE_OFF = 0x00, /*! Interrupt disabled */
33 UCSTPIE = 0x80 /*! Interrupt enabled */
34 };
35
36 /*! Start condition interrupt enable */
37 enum UCSTTIE_t {
38 UCSTTIE_OFF = 0x00, /*! Interrupt disabled */
39 UCSTTIE = 0x80 /*! Interrupt enabled */
40 };
41
42 /*! Arbitration lost interrupt enable */
43 enum UCALIE_t {
44 UCALIE_OFF = 0x00, /*! Interrupt disabled */
45 UCALIE = 0x80 /*! Interrupt enabled */
46 };
47
48 /*! USCI_Bx I2C Interrupt Enable Register */
49 struct UCBxI2CIE_t {
50 UCNACKIE_t UCNACKIE; /*! Not-acknowledge interrupt enable
51 * 0 Interrupt disabled
52 * 1 Interrupt enabled */
53 UCSTPIE_t UCSTPIE; /*! Stop condition interrupt enable
54 * 0 Interrupt disabled
55 * 1 Interrupt enabled */
56 UCSTTIE_t UCSTTIE; /*! Start condition interrupt enable
57 * 0 Interrupt disabled
58 * 1 Interrupt enabled */
59 UCALIE_t UCALIE; /*! Arbitration lost interrupt enable
60 * 0 Interrupt disabled
61 * 1 Interrupt enabled */
62 }
63
64 /*! USCI_B1 transmit interrupt enable */
65 enum UCB1TXIE_t {
66 UCB1TXIE_OFF = 0x00, /*! Interrupt disabled */
67 UCB1TXIE = 0x08 /*! Interrupt enabled */
68 };
69
70 /*! USCI_B1 receive interrupt enable */
71 enum UCB1RXIE_t {
72 UCB1RXIE_OFF = 0x00, /*! Interrupt disabled */
73 UCB1RXIE = 0x04 /*! Interrupt enabled */
74 };
75
76 /*! USCI_xx SPI Interrupt Enable Register */
77 struct UC1IE_t {
78 UCB1TXIE_t UCB1TXIE; /*! USCI_B1 transmit interrupt enable
79 * 0 Interrupt disabled
80 * 1 Interrupt enabled */
81 UCB1RXIE_t UCB1RXIE; /*! USCI_B1 receive interrupt enable
82 * 0 Interrupt disabled
83 * 1 Interrupt enabled */
84 }
85
86 instance:
87 /*! @_nodoc */
88 config IClock.Instance clock;
89
90 /*! USCI_Bx I2C Interrupt Enable Register */
91 config UCBxI2CIE_t UCB1I2CIE = {
92 UCNACKIE : UCNACKIE_OFF,
93 UCSTPIE : UCSTPIE_OFF,
94 UCSTTIE : UCSTTIE_OFF,
95 UCALIE : UCALIE_OFF,
96 };
97
98 /*! USCI_B1 Interrupt Enable Register */
99 config UC1IE_t UC1IE = {
100 UCB1TXIE : UCB1TXIE_OFF,
101 UCB1RXIE : UCB1RXIE_OFF
102 };
103
104 /*!
105 * ======== setUCNACKIE ========
106 * Sets UCNACKIE bit
107 *
108 * @see #setUCNACKIE
109 */
110 Bool setUCNACKIE(Bool set);
111
112 /*!
113 * ======== getUCNACKIE ========
114 * Gets UCNACKIE bit
115 *
116 * @see #getUCNACKIE
117 */
118 Bool getUCNACKIE();
119
120 /*!
121 * ======== setUCSTPIE ========
122 * Sets UCSTPIE bit
123 *
124 * @see #setUCSTPIE
125 */
126 Bool setUCSTPIE(Bool set);
127
128 /*!
129 * ======== getUCSTPIE ========
130 * Gets UCSTPIE bit
131 *
132 * @see #getUCSTPIE
133 */
134 Bool getUCSTPIE();
135
136 /*!
137 * ======== setUCSTTIE ========
138 * Sets UCSTTIE bit
139 *
140 * @see #setUCSTTIE
141 */
142 Bool setUCSTTIE(Bool set);
143
144 /*!
145 * ======== getUCSTTIE ========
146 * Gets UCSTTIE bit
147 *
148 * @see #getUCSTTIE
149 */
150 Bool getUCSTTIE();
151
152 /*!
153 * ======== setUCALIE ========
154 * Sets UCALIE bit
155 *
156 * @see #setUCALIE
157 */
158 Bool setUCALIE(Bool set);
159
160 /*!
161 * ======== getUCALIE ========
162 * Gets UCALIE bit
163 *
164 * @see #getUCALIE
165 */
166 Bool getUCALIE();
167
168 /*! Determine if each Register needs to be forced set or not */
169 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
170 [
171 { register : "UCB1CTL0" , regForceSet : false },
172 { register : "UCB1CTL1" , regForceSet : false },
173 { register : "UCB1BR0" , regForceSet : false },
174 { register : "UCB1BR1" , regForceSet : false },
175 { register : "UCB1STAT" , regForceSet : false },
176 { register : "UCB1RXBUF" , regForceSet : false },
177 { register : "UCB1TXBUF" , regForceSet : false },
178 { register : "UCB1I2COA" , regForceSet : false },
179 { register : "UCB1I2CSA" , regForceSet : false },
180 { register : "UCB1I2CIE" , regForceSet : false },
181 { register : "UC1IE" , regForceSet : false }
182 ];
183 }