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12 /*!
13 * ======== Timer_A3 ========
14 * MSP430 Timer_A3 timer
15 */
16 metaonly module Timer_A3 inherits ITimer_A {
17
18 instance:
19 /*! TACTL, Timer_A3 Control Register */
20 config TACTL_t TACTL = {
21 TASSEL : TASSEL_0,
22 ID : ID_0,
23 MC : MC_0,
24 TACLR : TACLR_OFF,
25 TAIE : TAIE_OFF,
26 TAIFG : TAIFG_OFF
27 };
28
29 /*! TACCTL0, Capture/Compare Control Register 0 */
30 config TACCTLx_t TACCTL0 = {
31 CM : CM_0,
32 CCIS : CCIS_0,
33 SCS : SCS_OFF,
34 SCCI : SCCI_OFF,
35 CAP : CAP_OFF,
36 OUTMOD : OUTMOD_0,
37 CCIE : CCIE_OFF,
38 CCI : CCI_OFF,
39 OUT : OUT_OFF,
40 COV : COV_OFF,
41 CCIFG : CCIFG_OFF
42 };
43
44 /*! TACCTL1, Capture/Compare Control Register 1 */
45 config TACCTLx_t TACCTL1 = {
46 CM : CM_0,
47 CCIS : CCIS_0,
48 SCS : SCS_OFF,
49 SCCI : SCCI_OFF,
50 CAP : CAP_OFF,
51 OUTMOD : OUTMOD_0,
52 CCIE : CCIE_OFF,
53 CCI : CCI_OFF,
54 OUT : OUT_OFF,
55 COV : COV_OFF,
56 CCIFG : CCIFG_OFF
57 };
58
59 /*! TACCTL2, Capture/Compare Control Register 2 */
60 config TACCTLx_t TACCTL2 = {
61 CM : CM_0,
62 CCIS : CCIS_0,
63 SCS : SCS_OFF,
64 SCCI : SCCI_OFF,
65 CAP : CAP_OFF,
66 OUTMOD : OUTMOD_0,
67 CCIE : CCIE_OFF,
68 CCI : CCI_OFF,
69 OUT : OUT_OFF,
70 COV : COV_OFF,
71 CCIFG : CCIFG_OFF
72 };
73
74 /*! TACCR0, Timer_A Capture/Compare Register 0 */
75 config Bits16 TACCR0 = 0;
76 /*! TACCR1, Timer_A Capture/Compare Register 1 */
77 config Bits16 TACCR1 = 0;
78 /*! TACCR2, Timer_A Capture/Compare Register 2 */
79 config Bits16 TACCR2 = 0;
80
81 /*! Determine if each Register needs to be forced set or not */
82 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
83 [
84 { register : "TACTL" , regForceSet : false },
85 { register : "TACCTL0" , regForceSet : false },
86 { register : "TACCTL1" , regForceSet : false },
87 { register : "TACCTL2" , regForceSet : false },
88 { register : "TACCR0" , regForceSet : false },
89 { register : "TACCR1" , regForceSet : false },
90 { register : "TACCR2" , regForceSet : false }
91 ];
92 }