1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     * 
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     * 
    11     * --/COPYRIGHT--*/
    12    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    13    
    14    /*!
    15     *  ======== GPIO for MSP430G2x33 ========
    16     *  MSP430 General Purpose Input Output Ports
    17     */
    18    metaonly module GPIO_MSP430G2x33 inherits IGPIO {
    19        /*!
    20         *  ======== create ========
    21         *  Create an instance of this peripheral. Use a customized
    22         *  init function so that we can get access to the ADC10
    23         *  instance.
    24         */
    25            create(ADC10.Instance adc10);
    26            
    27    instance:
    28        /*! @_nodoc */
    29        config ADC10.Instance adc10;
    30    
    31       /*! Define an array to describe all device pins. The 1st dimension
    32        *  denotes the port, the second the pin on that port. On an
    33        *  MSP430G2x33 device, there are 3 x 8 = 24 pins total.
    34        */
    35            
    36            /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    37             * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    38        /* TODO: For this device the config variable definition has been moved into the
    39         * corresponding XS file due to its size. This needs a more consistent solution. */
    40        config DevicePin_t devicePins[3][8];
    41        
    42            /*! Implementation of Device Pin Functional Configuration */
    43            override config DevicePinFunctionSetting_t devicePinSetting[3][8];
    44    
    45            /*! Determine if each Register needs to be forced set or not */
    46            readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    47            [
    48                    { register : "P1OUT" , regForceSet : true  },
    49                    { register : "P1SEL" , regForceSet : false },
    50            { register : "P1SEL2", regForceSet : false },
    51                    { register : "P1DIR" , regForceSet : false },
    52                    { register : "P1REN" , regForceSet : false },
    53                    { register : "P1IES" , regForceSet : true  },
    54                    { register : "P1IFG" , regForceSet : true  },
    55                    { register : "P1IE"  , regForceSet : false },
    56                    { register : "P2OUT" , regForceSet : true  },
    57                    { register : "P2SEL" , regForceSet : false },
    58                    { register : "P2SEL2", regForceSet : false },
    59                    { register : "P2DIR" , regForceSet : false },
    60                    { register : "P2REN" , regForceSet : false },
    61                    { register : "P2IES" , regForceSet : true  },
    62                    { register : "P2IFG" , regForceSet : true  },
    63                    { register : "P2IE"  , regForceSet : false },
    64                    { register : "P3OUT" , regForceSet : true  },
    65                    { register : "P3SEL" , regForceSet : false },
    66            { register : "P3SEL2", regForceSet : false },
    67                    { register : "P3DIR" , regForceSet : false },
    68                    { register : "P3REN" , regForceSet : false },
    69            ];
    70            
    71        /*
    72         *  GPIO Digital I/O Registers
    73         *
    74         *  One GIPO instance defines the configuration of an entire,
    75         *  8-bit wide digital I/O port.
    76         */
    77         
    78        /*! Port 1 Output Register */ 
    79        config GpioBits8PxOut_t P1OUT = {
    80            Bit0        : BIT0_OFF,
    81            Bit1        : BIT1_OFF,
    82            Bit2        : BIT2_OFF,
    83            Bit3        : BIT3_OFF,
    84            Bit4        : BIT4_OFF,
    85            Bit5        : BIT5_OFF,
    86            Bit6        : BIT6_OFF,
    87            Bit7        : BIT7_OFF
    88        };
    89    
    90        /*! Port 1 Port Select Register */
    91        config GpioBits8PxSel_t P1SEL = {
    92            Bit0        : BIT0_OFF,
    93            Bit1        : BIT1_OFF,
    94            Bit2        : BIT2_OFF,
    95            Bit3        : BIT3_OFF,
    96            Bit4        : BIT4_OFF,
    97            Bit5        : BIT5_OFF,
    98            Bit6        : BIT6_OFF,
    99            Bit7        : BIT7_OFF
   100        };
   101        
   102        /*! Port 1 Port Select 2 Register */
   103        config GpioBits8PxSel_t P1SEL2 = {
   104            Bit0        : BIT0_OFF,
   105            Bit1        : BIT1_OFF,
   106            Bit2        : BIT2_OFF,
   107            Bit3        : BIT3_OFF,
   108            Bit4        : BIT4_OFF,
   109            Bit5        : BIT5_OFF,
   110            Bit6        : BIT6_OFF,
   111            Bit7        : BIT7_OFF
   112        };
   113        
   114        /*! Port 1 Direction Register */
   115        config GpioBits8PxDir_t P1DIR = {
   116            Bit0        : BIT0_OFF,
   117            Bit1        : BIT1_OFF,
   118            Bit2        : BIT2_OFF,
   119            Bit3        : BIT3_OFF,
   120            Bit4        : BIT4_OFF,
   121            Bit5        : BIT5_OFF,
   122            Bit6        : BIT6_OFF,
   123            Bit7        : BIT7_OFF
   124        };
   125        
   126        /*! Port 1 Resistor Enable Register */
   127        config GpioBits8PxRen_t P1REN = {
   128            Bit0        : BIT0_OFF,
   129            Bit1        : BIT1_OFF,
   130            Bit2        : BIT2_OFF,
   131            Bit3        : BIT3_OFF,
   132            Bit4        : BIT4_OFF,
   133            Bit5        : BIT5_OFF,
   134            Bit6        : BIT6_OFF,
   135            Bit7        : BIT7_OFF
   136        };
   137        
   138        /*! Port 1 Interrupt Edge Select Register */
   139        config GpioBits8PxIes_t P1IES = {
   140            Bit0        : BIT0_OFF,
   141            Bit1        : BIT1_OFF,
   142            Bit2        : BIT2_OFF,
   143            Bit3        : BIT3_OFF,
   144            Bit4        : BIT4_OFF,
   145            Bit5        : BIT5_OFF,
   146            Bit6        : BIT6_OFF,
   147            Bit7        : BIT7_OFF
   148        };
   149        
   150        /*! Port 1 Interrupt Flag Register */
   151        config GpioBits8PxIfg_t P1IFG = {
   152            Bit0        : BIT0_OFF,
   153            Bit1        : BIT1_OFF,
   154            Bit2        : BIT2_OFF,
   155            Bit3        : BIT3_OFF,
   156            Bit4        : BIT4_OFF,
   157            Bit5        : BIT5_OFF,
   158            Bit6        : BIT6_OFF,
   159            Bit7        : BIT7_OFF
   160        };
   161        
   162        /*! Port 1 Interrupt Enable Register */
   163        config GpioBits8PxIe_t P1IE = {
   164            Bit0        : BIT0_OFF,
   165            Bit1        : BIT1_OFF,
   166            Bit2        : BIT2_OFF,
   167            Bit3        : BIT3_OFF,
   168            Bit4        : BIT4_OFF,
   169            Bit5        : BIT5_OFF,
   170            Bit6        : BIT6_OFF,
   171            Bit7        : BIT7_OFF
   172        };
   173    
   174        /*! Port 2 Output Register */ 
   175        config GpioBits8PxOut_t P2OUT = {
   176            Bit0        : BIT0_OFF,
   177            Bit1        : BIT1_OFF,
   178            Bit2        : BIT2_OFF,
   179            Bit3        : BIT3_OFF,
   180            Bit4        : BIT4_OFF,
   181            Bit5        : BIT5_OFF,
   182            Bit6        : BIT6_OFF,
   183            Bit7        : BIT7_OFF
   184        };
   185    
   186        /*! Port 2 Port Select Register */
   187        config GpioBits8PxSel_t P2SEL = {
   188            Bit0        : BIT0_OFF,
   189            Bit1        : BIT1_OFF,
   190            Bit2        : BIT2_OFF,
   191            Bit3        : BIT3_OFF,
   192            Bit4        : BIT4_OFF,
   193            Bit5        : BIT5_OFF,
   194            Bit6        : BIT6,         /* POR default for all 2xx devices */
   195            Bit7        : BIT7          /* POR default for all 2xx devices */
   196        };
   197        
   198        /*! Port 2 Port Select 2 Register */
   199        config GpioBits8PxSel2_t P2SEL2 = {
   200            Bit0        : BIT0_OFF,
   201            Bit1        : BIT1_OFF,
   202            Bit2        : BIT2_OFF,
   203            Bit3        : BIT3_OFF,
   204            Bit4        : BIT4_OFF,
   205            Bit5        : BIT5_OFF,
   206            Bit6        : BIT6_OFF,
   207            Bit7        : BIT7_OFF
   208        };
   209        
   210        /*! Port 2 Direction Register */
   211        config GpioBits8PxDir_t P2DIR = {
   212            Bit0        : BIT0_OFF,
   213            Bit1        : BIT1_OFF,
   214            Bit2        : BIT2_OFF,
   215            Bit3        : BIT3_OFF,
   216            Bit4        : BIT4_OFF,
   217            Bit5        : BIT5_OFF,
   218            Bit6        : BIT6_OFF,
   219            Bit7        : BIT7_OFF
   220        };
   221        
   222        /*! Port 2 Resistor Enable Register */
   223        config GpioBits8PxRen_t P2REN = {
   224            Bit0        : BIT0_OFF,
   225            Bit1        : BIT1_OFF,
   226            Bit2        : BIT2_OFF,
   227            Bit3        : BIT3_OFF,
   228            Bit4        : BIT4_OFF,
   229            Bit5        : BIT5_OFF,
   230            Bit6        : BIT6_OFF,
   231            Bit7        : BIT7_OFF
   232        };
   233        
   234        /*! Port 2 Interrupt Edge Select Register */
   235        config GpioBits8PxIes_t P2IES = {
   236            Bit0        : BIT0_OFF,
   237            Bit1        : BIT1_OFF,
   238            Bit2        : BIT2_OFF,
   239            Bit3        : BIT3_OFF,
   240            Bit4        : BIT4_OFF,
   241            Bit5        : BIT5_OFF,
   242            Bit6        : BIT6_OFF,
   243            Bit7        : BIT7_OFF
   244        };
   245        
   246        /*! Port 2 Interrupt Flag Register */
   247        config GpioBits8PxIfg_t P2IFG = {
   248            Bit0        : BIT0_OFF,
   249            Bit1        : BIT1_OFF,
   250            Bit2        : BIT2_OFF,
   251            Bit3        : BIT3_OFF,
   252            Bit4        : BIT4_OFF,
   253            Bit5        : BIT5_OFF,
   254            Bit6        : BIT6_OFF,
   255            Bit7        : BIT7_OFF
   256        };
   257        
   258        /*! Port 2 Interrupt Enable Register */
   259        config GpioBits8PxIe_t P2IE = {
   260            Bit0        : BIT0_OFF,
   261            Bit1        : BIT1_OFF,
   262            Bit2        : BIT2_OFF,
   263            Bit3        : BIT3_OFF,
   264            Bit4        : BIT4_OFF,
   265            Bit5        : BIT5_OFF,
   266            Bit6        : BIT6_OFF,
   267            Bit7        : BIT7_OFF
   268        };
   269    
   270        /*! Port 3 Output Register */ 
   271        config GpioBits8PxOut_t P3OUT = {
   272            Bit0        : BIT0_OFF,
   273            Bit1        : BIT1_OFF,
   274            Bit2        : BIT2_OFF,
   275            Bit3        : BIT3_OFF,
   276            Bit4        : BIT4_OFF,
   277            Bit5        : BIT5_OFF,
   278            Bit6        : BIT6_OFF,
   279            Bit7        : BIT7_OFF
   280        };
   281    
   282        /*! Port 3 Port Select Register */
   283        config GpioBits8PxSel_t P3SEL = {
   284            Bit0        : BIT0_OFF,
   285            Bit1        : BIT1_OFF,
   286            Bit2        : BIT2_OFF,
   287            Bit3        : BIT3_OFF,
   288            Bit4        : BIT4_OFF,
   289            Bit5        : BIT5_OFF,
   290            Bit6        : BIT6_OFF,
   291            Bit7        : BIT7_OFF
   292        };
   293        
   294        /*! Port 3 Port Select 2 Register */
   295        config GpioBits8PxSel2_t P3SEL2 = {
   296            Bit0        : BIT0_OFF,
   297            Bit1        : BIT1_OFF,
   298            Bit2        : BIT2_OFF,
   299            Bit3        : BIT3_OFF,
   300            Bit4        : BIT4_OFF,
   301            Bit5        : BIT5_OFF,
   302            Bit6        : BIT6_OFF,
   303            Bit7        : BIT7_OFF
   304        };
   305            
   306        /*! Port 3 Direction Register */
   307        config GpioBits8PxDir_t P3DIR = {
   308            Bit0        : BIT0_OFF,
   309            Bit1        : BIT1_OFF,
   310            Bit2        : BIT2_OFF,
   311            Bit3        : BIT3_OFF,
   312            Bit4        : BIT4_OFF,
   313            Bit5        : BIT5_OFF,
   314            Bit6        : BIT6_OFF,
   315            Bit7        : BIT7_OFF
   316        };
   317        
   318        /*! Port 3 Resistor Enable Register */
   319        config GpioBits8PxRen_t P3REN = {
   320            Bit0        : BIT0_OFF,
   321            Bit1        : BIT1_OFF,
   322            Bit2        : BIT2_OFF,
   323            Bit3        : BIT3_OFF,
   324            Bit4        : BIT4_OFF,
   325            Bit5        : BIT5_OFF,
   326            Bit6        : BIT6_OFF,
   327            Bit7        : BIT7_OFF
   328        };
   329    }