1 /* --COPYRIGHT--,EPL
2 * Copyright (c) 2008 Texas Instruments and others.
3 * All rights reserved. This program and the accompanying materials
4 * are made available under the terms of the Eclipse Public License v1.0
5 * which accompanies this distribution, and is available at
6 * http://www.eclipse.org/legal/epl-v10.html
7 *
8 * Contributors:
9 * Texas Instruments - initial implementation
10 *
11 * --/COPYRIGHT--*/
12 /*!
13 * ======== GPIO for MSP430G2x01 ========
14 * MSP430 General Purpose Input Output Ports
15 */
16 metaonly module GPIO_MSP430G2x01 inherits IGPIO {
17 /*!
18 * ======== create ========
19 * Create an instance of this peripheral.
20 */
21 create();
22
23 instance:
24 /*! Define an array to describe all device pins. The 1st dimension
25 * denotes the port, the second the pin on that port. On an
26 * MSP430G2x01 device, there are 8 + 2 = 10 pins total.
27 */
28
29 /* TODO: This here should really be a module-wide feature, rather than an instance feature,
30 * however due to limitations in XDCtools 3.21.0.0 the data is located here */
31 readonly config DevicePin_t devicePins[2][8] =
32 [
33 [
34 {
35 pinName : "P1.0",
36 pinFunction : {
37 functionName : [
38 "GPIO Input",
39 "GPIO Output",
40 "TACLK",
41 "ACLK"
42 ],
43 functionConfig : [
44 [
45 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x01 },
46 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x01 }
47 ],
48 [
49 { register : "P1DIR", bitSetMask : 0x01, bitClearMask : 0x00 },
50 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x01 }
51 ],
52 [
53 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x01 },
54 { register : "P1SEL", bitSetMask : 0x01, bitClearMask : 0x00 }
55 ],
56 [
57 { register : "P1DIR", bitSetMask : 0x01, bitClearMask : 0x00 },
58 { register : "P1SEL", bitSetMask : 0x01, bitClearMask : 0x00 }
59 ]
60 ]
61 }
62 },
63 {
64 pinName : "P1.1",
65 pinFunction : {
66 functionName : [
67 "GPIO Input",
68 "GPIO Output",
69 "Timer_A2.CCI0A",
70 "Timer_A2.TA0"
71 ],
72 functionConfig : [
73 [
74 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x02 },
75 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x02 }
76 ],
77 [
78 { register : "P1DIR", bitSetMask : 0x02, bitClearMask : 0x00 },
79 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x02 }
80 ],
81 [
82 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x02 },
83 { register : "P1SEL", bitSetMask : 0x02, bitClearMask : 0x00 }
84 ],
85 [
86 { register : "P1DIR", bitSetMask : 0x02, bitClearMask : 0x00 },
87 { register : "P1SEL", bitSetMask : 0x02, bitClearMask : 0x00 }
88 ]
89 ]
90 }
91 },
92 {
93 pinName : "P1.2",
94 pinFunction : {
95 functionName : [
96 "GPIO Input",
97 "GPIO Output",
98 "Timer_A2.CCI1A",
99 "Timer_A2.TA1"
100 ],
101 functionConfig : [
102 [
103 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x04 },
104 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x04 }
105 ],
106 [
107 { register : "P1DIR", bitSetMask : 0x04, bitClearMask : 0x00 },
108 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x04 }
109 ],
110 [
111 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x04 },
112 { register : "P1SEL", bitSetMask : 0x04, bitClearMask : 0x00 }
113 ],
114 [
115 { register : "P1DIR", bitSetMask : 0x04, bitClearMask : 0x00 },
116 { register : "P1SEL", bitSetMask : 0x04, bitClearMask : 0x00 }
117 ]
118 ]
119 }
120 },
121 {
122 pinName : "P1.3",
123 pinFunction : {
124 functionName : [
125 "GPIO Input",
126 "GPIO Output"
127 ],
128 functionConfig : [
129 [
130 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x08 },
131 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x08 }
132 ],
133 [
134 { register : "P1DIR", bitSetMask : 0x08, bitClearMask : 0x00 },
135 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x08 }
136 ]
137 ]
138 }
139 },
140 {
141 pinName : "P1.4",
142 pinFunction : {
143 functionName : [
144 "GPIO Input",
145 "GPIO Output",
146 "SMCLK"
147 ],
148 functionConfig : [
149 [
150 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x10 },
151 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x10 }
152 ],
153 [
154 { register : "P1DIR", bitSetMask : 0x10, bitClearMask : 0x00 },
155 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x10 }
156 ],
157 [
158 { register : "P1DIR", bitSetMask : 0x10, bitClearMask : 0x00 },
159 { register : "P1SEL", bitSetMask : 0x10, bitClearMask : 0x00 }
160 ]
161 ]
162 }
163 },
164 {
165 pinName : "P1.5",
166 pinFunction : {
167 functionName : [
168 "GPIO Input",
169 "GPIO Output",
170 "Timer_A2.TA0"
171 ],
172 functionConfig : [
173 [
174 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x20 },
175 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x20 }
176 ],
177 [
178 { register : "P1DIR", bitSetMask : 0x20, bitClearMask : 0x00 },
179 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x20 }
180 ],
181 [
182 { register : "P1DIR", bitSetMask : 0x20, bitClearMask : 0x00 },
183 { register : "P1SEL", bitSetMask : 0x20, bitClearMask : 0x00 }
184 ]
185 ]
186 }
187 },
188 {
189 pinName : "P1.6",
190 pinFunction : {
191 functionName : [
192 "GPIO Input",
193 "GPIO Output",
194 "Timer_A2.TA1"
195 ],
196 functionConfig : [
197 [
198 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x40 },
199 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x40 }
200 ],
201 [
202 { register : "P1DIR", bitSetMask : 0x40, bitClearMask : 0x00 },
203 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x40 }
204 ],
205 [
206 { register : "P1DIR", bitSetMask : 0x40, bitClearMask : 0x00 },
207 { register : "P1SEL", bitSetMask : 0x40, bitClearMask : 0x00 }
208 ]
209 ]
210 }
211 },
212 {
213 pinName : "P1.7",
214 pinFunction : {
215 functionName : [
216 "GPIO Input",
217 "GPIO Output"
218 ],
219 functionConfig : [
220 [
221 { register : "P1DIR", bitSetMask : 0x00, bitClearMask : 0x80 },
222 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x80 }
223 ],
224 [
225 { register : "P1DIR", bitSetMask : 0x80, bitClearMask : 0x00 },
226 { register : "P1SEL", bitSetMask : 0x00, bitClearMask : 0x80 }
227 ]
228 ]
229 }
230 }
231 ],
232 [
233 {
234 pinName : "P2.0",
235 pinFunction : {
236 functionName : [
237 ""
238 ],
239 functionConfig : [
240 [
241
242 ]
243 ]
244 }
245 },
246 {
247 pinName : "P2.1",
248 pinFunction : {
249 functionName : [
250 ""
251 ],
252 functionConfig : [
253 [
254
255 ]
256 ]
257 }
258 },
259 {
260 pinName : "P2.2",
261 pinFunction : {
262 functionName : [
263 ""
264 ],
265 functionConfig : [
266 [
267
268 ]
269 ]
270 }
271 },
272 {
273 pinName : "P2.3",
274 pinFunction : {
275 functionName : [
276 ""
277 ],
278 functionConfig : [
279 [
280
281 ]
282 ]
283 }
284 },
285 {
286 pinName : "P2.4",
287 pinFunction : {
288 functionName : [
289 ""
290 ],
291 functionConfig : [
292 [
293
294 ]
295 ]
296 }
297 },
298 {
299 pinName : "P2.5",
300 pinFunction : {
301 functionName : [
302 ""
303 ],
304 functionConfig : [
305 [
306
307 ]
308 ]
309 }
310 },
311 {
312 pinName : "P2.6",
313 pinFunction : {
314 functionName : [
315 "GPIO Input",
316 "GPIO Output",
317 "XIN",
318 "Timer_A2.TA1"
319 ],
320 functionConfig : [
321 [
322 { register : "P2DIR", bitSetMask : 0x00, bitClearMask : 0x40 },
323 { register : "P2SEL", bitSetMask : 0x00, bitClearMask : 0x40 }
324 ],
325 [
326 { register : "P2DIR", bitSetMask : 0x40, bitClearMask : 0x00 },
327 { register : "P2SEL", bitSetMask : 0x00, bitClearMask : 0x40 }
328 ],
329 [
330 { register : "P2DIR", bitSetMask : 0x00, bitClearMask : 0x40 },
331 { register : "P2SEL", bitSetMask : 0x40, bitClearMask : 0x00 }
332 ],
333 [
334 { register : "P2DIR", bitSetMask : 0x40, bitClearMask : 0x00 },
335 { register : "P2SEL", bitSetMask : 0x40, bitClearMask : 0x00 }
336 ]
337 ]
338 }
339 },
340 {
341 pinName : "P2.7",
342 pinFunction : {
343 functionName : [
344 "GPIO Input",
345 "GPIO Output",
346 "XOUT"
347 ],
348 functionConfig : [
349 [
350 { register : "P2DIR", bitSetMask : 0x00, bitClearMask : 0x80 },
351 { register : "P2SEL", bitSetMask : 0x00, bitClearMask : 0x80 }
352 ],
353 [
354 { register : "P2DIR", bitSetMask : 0x80, bitClearMask : 0x00 },
355 { register : "P2SEL", bitSetMask : 0x00, bitClearMask : 0x80 }
356 ],
357 [
358 { register : "P2SEL", bitSetMask : 0x80, bitClearMask : 0x00 }
359 ]
360 ]
361 }
362 }
363 ]
364 ];
365
366 /*! Implementation of Device Pin Functional Configuration */
367 override config DevicePinFunctionSetting_t devicePinSetting[2][8];
368
369 /*! Determine if each Register needs to be forced set or not */
370 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
371 [
372 { register : "P1OUT" , regForceSet : true },
373 { register : "P1SEL" , regForceSet : false },
374 { register : "P1DIR" , regForceSet : false },
375 { register : "P1REN" , regForceSet : false },
376 { register : "P1IES" , regForceSet : true },
377 { register : "P1IFG" , regForceSet : true },
378 { register : "P1IE" , regForceSet : false },
379 { register : "P2OUT" , regForceSet : true },
380 { register : "P2SEL" , regForceSet : false },
381 { register : "P2DIR" , regForceSet : false },
382 { register : "P2REN" , regForceSet : false },
383 { register : "P2IES" , regForceSet : true },
384 { register : "P2IFG" , regForceSet : true },
385 { register : "P2IE" , regForceSet : false }
386 ];
387
388 /*
389 * GPIO Digital I/O Registers
390 *
391 * One GIPO instance defines the configuration of an entire,
392 * 8-bit wide digital I/O port.
393 */
394
395 /*! Port 1 Output Register */
396 config GpioBits8PxOut_t P1OUT = {
397 Bit0 : BIT0_OFF,
398 Bit1 : BIT1_OFF,
399 Bit2 : BIT2_OFF,
400 Bit3 : BIT3_OFF,
401 Bit4 : BIT4_OFF,
402 Bit5 : BIT5_OFF,
403 Bit6 : BIT6_OFF,
404 Bit7 : BIT7_OFF
405 };
406
407 /*! Port 1 Port Select Register */
408 config GpioBits8PxSel_t P1SEL = {
409 Bit0 : BIT0_OFF,
410 Bit1 : BIT1_OFF,
411 Bit2 : BIT2_OFF,
412 Bit3 : BIT3_OFF,
413 Bit4 : BIT4_OFF,
414 Bit5 : BIT5_OFF,
415 Bit6 : BIT6_OFF,
416 Bit7 : BIT7_OFF
417 };
418
419 /*! Port 1 Direction Register */
420 config GpioBits8PxDir_t P1DIR = {
421 Bit0 : BIT0_OFF,
422 Bit1 : BIT1_OFF,
423 Bit2 : BIT2_OFF,
424 Bit3 : BIT3_OFF,
425 Bit4 : BIT4_OFF,
426 Bit5 : BIT5_OFF,
427 Bit6 : BIT6_OFF,
428 Bit7 : BIT7_OFF
429 };
430
431 /*! Port 1 Resistor Enable Register */
432 config GpioBits8PxRen_t P1REN = {
433 Bit0 : BIT0_OFF,
434 Bit1 : BIT1_OFF,
435 Bit2 : BIT2_OFF,
436 Bit3 : BIT3_OFF,
437 Bit4 : BIT4_OFF,
438 Bit5 : BIT5_OFF,
439 Bit6 : BIT6_OFF,
440 Bit7 : BIT7_OFF
441 };
442
443 /*! Port 1 Interrupt Edge Select Register */
444 config GpioBits8PxIes_t P1IES = {
445 Bit0 : BIT0_OFF,
446 Bit1 : BIT1_OFF,
447 Bit2 : BIT2_OFF,
448 Bit3 : BIT3_OFF,
449 Bit4 : BIT4_OFF,
450 Bit5 : BIT5_OFF,
451 Bit6 : BIT6_OFF,
452 Bit7 : BIT7_OFF
453 };
454
455 /*! Port 1 Interrupt Flag Register */
456 config GpioBits8PxIfg_t P1IFG = {
457 Bit0 : BIT0_OFF,
458 Bit1 : BIT1_OFF,
459 Bit2 : BIT2_OFF,
460 Bit3 : BIT3_OFF,
461 Bit4 : BIT4_OFF,
462 Bit5 : BIT5_OFF,
463 Bit6 : BIT6_OFF,
464 Bit7 : BIT7_OFF
465 };
466
467 /*! Port 1 Interrupt Enable Register */
468 config GpioBits8PxIe_t P1IE = {
469 Bit0 : BIT0_OFF,
470 Bit1 : BIT1_OFF,
471 Bit2 : BIT2_OFF,
472 Bit3 : BIT3_OFF,
473 Bit4 : BIT4_OFF,
474 Bit5 : BIT5_OFF,
475 Bit6 : BIT6_OFF,
476 Bit7 : BIT7_OFF
477 };
478
479 /*! Port 2 Output Register */
480 config GpioBits8PxOut_t P2OUT = {
481 Bit0 : BIT0_OFF,
482 Bit1 : BIT1_OFF,
483 Bit2 : BIT2_OFF,
484 Bit3 : BIT3_OFF,
485 Bit4 : BIT4_OFF,
486 Bit5 : BIT5_OFF,
487 Bit6 : BIT6_OFF,
488 Bit7 : BIT7_OFF
489 };
490
491 /*! Port 2 Port Select Register */
492 config GpioBits8PxSel_t P2SEL = {
493 Bit0 : BIT0_OFF,
494 Bit1 : BIT1_OFF,
495 Bit2 : BIT2_OFF,
496 Bit3 : BIT3_OFF,
497 Bit4 : BIT4_OFF,
498 Bit5 : BIT5_OFF,
499 Bit6 : BIT6, /* POR default for all 2xx devices */
500 Bit7 : BIT7 /* POR default for all 2xx devices */
501 };
502
503 /*! Port 2 Direction Register */
504 config GpioBits8PxDir_t P2DIR = {
505 Bit0 : BIT0_OFF,
506 Bit1 : BIT1_OFF,
507 Bit2 : BIT2_OFF,
508 Bit3 : BIT3_OFF,
509 Bit4 : BIT4_OFF,
510 Bit5 : BIT5_OFF,
511 Bit6 : BIT6_OFF,
512 Bit7 : BIT7_OFF
513 };
514
515 /*! Port 2 Resistor Enable Register */
516 config GpioBits8PxRen_t P2REN = {
517 Bit0 : BIT0_OFF,
518 Bit1 : BIT1_OFF,
519 Bit2 : BIT2_OFF,
520 Bit3 : BIT3_OFF,
521 Bit4 : BIT4_OFF,
522 Bit5 : BIT5_OFF,
523 Bit6 : BIT6_OFF,
524 Bit7 : BIT7_OFF
525 };
526
527 /*! Port 2 Interrupt Edge Select Register */
528 config GpioBits8PxIes_t P2IES = {
529 Bit0 : BIT0_OFF,
530 Bit1 : BIT1_OFF,
531 Bit2 : BIT2_OFF,
532 Bit3 : BIT3_OFF,
533 Bit4 : BIT4_OFF,
534 Bit5 : BIT5_OFF,
535 Bit6 : BIT6_OFF,
536 Bit7 : BIT7_OFF
537 };
538
539 /*! Port 2 Interrupt Flag Register */
540 config GpioBits8PxIfg_t P2IFG = {
541 Bit0 : BIT0_OFF,
542 Bit1 : BIT1_OFF,
543 Bit2 : BIT2_OFF,
544 Bit3 : BIT3_OFF,
545 Bit4 : BIT4_OFF,
546 Bit5 : BIT5_OFF,
547 Bit6 : BIT6_OFF,
548 Bit7 : BIT7_OFF
549 };
550
551 /*! Port 2 Interrupt Enable Register */
552 config GpioBits8PxIe_t P2IE = {
553 Bit0 : BIT0_OFF,
554 Bit1 : BIT1_OFF,
555 Bit2 : BIT2_OFF,
556 Bit3 : BIT3_OFF,
557 Bit4 : BIT4_OFF,
558 Bit5 : BIT5_OFF,
559 Bit6 : BIT6_OFF,
560 Bit7 : BIT7_OFF
561 };
562 }