1 2 3 4 5 6 7 8 9 10 11
12 import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
13 import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
14 import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
15
16 /*!
17 * ======== GPIO for MSP430F21x2 ========
18 * MSP430 General Purpose Input Output Ports
19 */
20 metaonly module GPIO_MSP430F21x2 inherits IGPIO {
21 /*!
22 * ======== create ========
23 * Create an instance of this peripheral. Use a customized
24 * init function so that we can get access to the ADC10,
25 * Comparator_A, and BCS+ instances.
26 */
27 create(ADC10.Instance adc10, Comparator.Instance comparator,
28 BCSplus.Instance clock);
29
30 instance:
31 /*! @_nodoc */
32 config ADC10.Instance adc10;
33
34 /*! @_nodoc */
35 config Comparator.Instance comparator;
36
37 /*! @_nodoc */
38 config BCSplus.Instance clock;
39
40 /*! Define an array to describe all device pins. The 1st dimension
41 * denotes the port, the second the pin on that port. On an
42 * MSP430F21x2 device, there are 3 x 8 = 24 pins total.
43 */
44
45 46
47 48
49 config DevicePin_t devicePins[3][8];
50
51 /*! Implementation of Device Pin Functional Configuration */
52 override config DevicePinFunctionSetting_t devicePinSetting[3][8];
53
54 /*! Determine if each Register needs to be forced set or not */
55 readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
56 [
57 { register : "P1OUT" , regForceSet : true },
58 { register : "P1SEL" , regForceSet : false },
59 { register : "P1SEL2", regForceSet : false },
60 { register : "P1DIR" , regForceSet : false },
61 { register : "P1REN" , regForceSet : false },
62 { register : "P1IES" , regForceSet : true },
63 { register : "P1IFG" , regForceSet : true },
64 { register : "P1IE" , regForceSet : false },
65 { register : "P2OUT" , regForceSet : true },
66 { register : "P2SEL" , regForceSet : false },
67 { register : "P2SEL2", regForceSet : false },
68 { register : "P2DIR" , regForceSet : false },
69 { register : "P2REN" , regForceSet : false },
70 { register : "P2IES" , regForceSet : true },
71 { register : "P2IFG" , regForceSet : true },
72 { register : "P2IE" , regForceSet : false },
73 { register : "P3OUT" , regForceSet : true },
74 { register : "P3SEL" , regForceSet : false },
75 { register : "P3DIR" , regForceSet : false },
76 { register : "P3REN" , regForceSet : false },
77 ];
78
79 80 81 82 83 84
85
86 /*! Port 1 Output Register */
87 config GpioBits8PxOut_t P1OUT = {
88 Bit0 : BIT0_OFF,
89 Bit1 : BIT1_OFF,
90 Bit2 : BIT2_OFF,
91 Bit3 : BIT3_OFF,
92 Bit4 : BIT4_OFF,
93 Bit5 : BIT5_OFF,
94 Bit6 : BIT6_OFF,
95 Bit7 : BIT7_OFF
96 };
97
98 /*! Port 1 Port Select Register */
99 config GpioBits8PxSel_t P1SEL = {
100 Bit0 : BIT0_OFF,
101 Bit1 : BIT1_OFF,
102 Bit2 : BIT2_OFF,
103 Bit3 : BIT3_OFF,
104 Bit4 : BIT4_OFF,
105 Bit5 : BIT5_OFF,
106 Bit6 : BIT6_OFF,
107 Bit7 : BIT7_OFF
108 };
109
110 /*! Port 1 Port Select 2 Register */
111 config GpioBits8PxSel_t P1SEL2 = {
112 Bit0 : BIT0_OFF,
113 Bit1 : BIT1_OFF,
114 Bit2 : BIT2_OFF,
115 Bit3 : BIT3_OFF,
116 Bit4 : BIT4_OFF,
117 Bit5 : BIT5_OFF,
118 Bit6 : BIT6_OFF,
119 Bit7 : BIT7_OFF
120 };
121
122 /*! Port 1 Direction Register */
123 config GpioBits8PxDir_t P1DIR = {
124 Bit0 : BIT0_OFF,
125 Bit1 : BIT1_OFF,
126 Bit2 : BIT2_OFF,
127 Bit3 : BIT3_OFF,
128 Bit4 : BIT4_OFF,
129 Bit5 : BIT5_OFF,
130 Bit6 : BIT6_OFF,
131 Bit7 : BIT7_OFF
132 };
133
134 /*! Port 1 Resistor Enable Register */
135 config GpioBits8PxRen_t P1REN = {
136 Bit0 : BIT0_OFF,
137 Bit1 : BIT1_OFF,
138 Bit2 : BIT2_OFF,
139 Bit3 : BIT3_OFF,
140 Bit4 : BIT4_OFF,
141 Bit5 : BIT5_OFF,
142 Bit6 : BIT6_OFF,
143 Bit7 : BIT7_OFF
144 };
145
146 /*! Port 1 Interrupt Edge Select Register */
147 config GpioBits8PxIes_t P1IES = {
148 Bit0 : BIT0_OFF,
149 Bit1 : BIT1_OFF,
150 Bit2 : BIT2_OFF,
151 Bit3 : BIT3_OFF,
152 Bit4 : BIT4_OFF,
153 Bit5 : BIT5_OFF,
154 Bit6 : BIT6_OFF,
155 Bit7 : BIT7_OFF
156 };
157
158 /*! Port 1 Interrupt Flag Register */
159 config GpioBits8PxIfg_t P1IFG = {
160 Bit0 : BIT0_OFF,
161 Bit1 : BIT1_OFF,
162 Bit2 : BIT2_OFF,
163 Bit3 : BIT3_OFF,
164 Bit4 : BIT4_OFF,
165 Bit5 : BIT5_OFF,
166 Bit6 : BIT6_OFF,
167 Bit7 : BIT7_OFF
168 };
169
170 /*! Port 1 Interrupt Enable Register */
171 config GpioBits8PxIe_t P1IE = {
172 Bit0 : BIT0_OFF,
173 Bit1 : BIT1_OFF,
174 Bit2 : BIT2_OFF,
175 Bit3 : BIT3_OFF,
176 Bit4 : BIT4_OFF,
177 Bit5 : BIT5_OFF,
178 Bit6 : BIT6_OFF,
179 Bit7 : BIT7_OFF
180 };
181
182 /*! Port 2 Output Register */
183 config GpioBits8PxOut_t P2OUT = {
184 Bit0 : BIT0_OFF,
185 Bit1 : BIT1_OFF,
186 Bit2 : BIT2_OFF,
187 Bit3 : BIT3_OFF,
188 Bit4 : BIT4_OFF,
189 Bit5 : BIT5_OFF,
190 Bit6 : BIT6_OFF,
191 Bit7 : BIT7_OFF
192 };
193
194 /*! Port 2 Port Select Register */
195 config GpioBits8PxSel_t P2SEL = {
196 Bit0 : BIT0_OFF,
197 Bit1 : BIT1_OFF,
198 Bit2 : BIT2_OFF,
199 Bit3 : BIT3_OFF,
200 Bit4 : BIT4_OFF,
201 Bit5 : BIT5_OFF,
202 Bit6 : BIT6,
203 Bit7 : BIT7
204 };
205
206 /*! Port 2 Port Select 2 Register */
207 config GpioBits8PxSel2_t P2SEL2 = {
208 Bit0 : BIT0_OFF,
209 Bit1 : BIT1_OFF,
210 Bit2 : BIT2_OFF,
211 Bit3 : BIT3_OFF,
212 Bit4 : BIT4_OFF,
213 Bit5 : BIT5_OFF,
214 Bit6 : BIT6_OFF,
215 Bit7 : BIT7_OFF
216 };
217
218 /*! Port 2 Direction Register */
219 config GpioBits8PxDir_t P2DIR = {
220 Bit0 : BIT0_OFF,
221 Bit1 : BIT1_OFF,
222 Bit2 : BIT2_OFF,
223 Bit3 : BIT3_OFF,
224 Bit4 : BIT4_OFF,
225 Bit5 : BIT5_OFF,
226 Bit6 : BIT6_OFF,
227 Bit7 : BIT7_OFF
228 };
229
230 /*! Port 2 Resistor Enable Register */
231 config GpioBits8PxRen_t P2REN = {
232 Bit0 : BIT0_OFF,
233 Bit1 : BIT1_OFF,
234 Bit2 : BIT2_OFF,
235 Bit3 : BIT3_OFF,
236 Bit4 : BIT4_OFF,
237 Bit5 : BIT5_OFF,
238 Bit6 : BIT6_OFF,
239 Bit7 : BIT7_OFF
240 };
241
242 /*! Port 2 Interrupt Edge Select Register */
243 config GpioBits8PxIes_t P2IES = {
244 Bit0 : BIT0_OFF,
245 Bit1 : BIT1_OFF,
246 Bit2 : BIT2_OFF,
247 Bit3 : BIT3_OFF,
248 Bit4 : BIT4_OFF,
249 Bit5 : BIT5_OFF,
250 Bit6 : BIT6_OFF,
251 Bit7 : BIT7_OFF
252 };
253
254 /*! Port 2 Interrupt Flag Register */
255 config GpioBits8PxIfg_t P2IFG = {
256 Bit0 : BIT0_OFF,
257 Bit1 : BIT1_OFF,
258 Bit2 : BIT2_OFF,
259 Bit3 : BIT3_OFF,
260 Bit4 : BIT4_OFF,
261 Bit5 : BIT5_OFF,
262 Bit6 : BIT6_OFF,
263 Bit7 : BIT7_OFF
264 };
265
266 /*! Port 2 Interrupt Enable Register */
267 config GpioBits8PxIe_t P2IE = {
268 Bit0 : BIT0_OFF,
269 Bit1 : BIT1_OFF,
270 Bit2 : BIT2_OFF,
271 Bit3 : BIT3_OFF,
272 Bit4 : BIT4_OFF,
273 Bit5 : BIT5_OFF,
274 Bit6 : BIT6_OFF,
275 Bit7 : BIT7_OFF
276 };
277
278 /*! Port 3 Output Register */
279 config GpioBits8PxOut_t P3OUT = {
280 Bit0 : BIT0_OFF,
281 Bit1 : BIT1_OFF,
282 Bit2 : BIT2_OFF,
283 Bit3 : BIT3_OFF,
284 Bit4 : BIT4_OFF,
285 Bit5 : BIT5_OFF,
286 Bit6 : BIT6_OFF,
287 Bit7 : BIT7_OFF
288 };
289
290 /*! Port 3 Port Select Register */
291 config GpioBits8PxSel_t P3SEL = {
292 Bit0 : BIT0_OFF,
293 Bit1 : BIT1_OFF,
294 Bit2 : BIT2_OFF,
295 Bit3 : BIT3_OFF,
296 Bit4 : BIT4_OFF,
297 Bit5 : BIT5_OFF,
298 Bit6 : BIT6_OFF,
299 Bit7 : BIT7_OFF
300 };
301
302 /*! Port 3 Direction Register */
303 config GpioBits8PxDir_t P3DIR = {
304 Bit0 : BIT0_OFF,
305 Bit1 : BIT1_OFF,
306 Bit2 : BIT2_OFF,
307 Bit3 : BIT3_OFF,
308 Bit4 : BIT4_OFF,
309 Bit5 : BIT5_OFF,
310 Bit6 : BIT6_OFF,
311 Bit7 : BIT7_OFF
312 };
313
314 /*! Port 3 Resistor Enable Register */
315 config GpioBits8PxRen_t P3REN = {
316 Bit0 : BIT0_OFF,
317 Bit1 : BIT1_OFF,
318 Bit2 : BIT2_OFF,
319 Bit3 : BIT3_OFF,
320 Bit4 : BIT4_OFF,
321 Bit5 : BIT5_OFF,
322 Bit6 : BIT6_OFF,
323 Bit7 : BIT7_OFF
324 };
325 }