1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     * 
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     * 
    11     * --/COPYRIGHT--*/
    12    import ti.catalog.msp430.peripherals.communication.USI as USI;
    13    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    14    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    15    
    16    /*!
    17     *  ======== GPIO for MSP430G2x52 ========
    18     *  MSP430 General Purpose Input Output Ports
    19     */
    20    metaonly module GPIO_MSP430G2x52 inherits IGPIO {
    21        /*!
    22         *  ======== create ========
    23         *  Create an instance of these peripherals. 
    24         */
    25            create(USI.Instance usi, Comparator.Instance comparator, ADC10.Instance adc10);
    26            
    27    instance:
    28        /*! @_nodoc */
    29        config USI.Instance usi;
    30        
    31        /*! @_nodoc */
    32            config Comparator.Instance comparator;
    33            
    34        /*! @_nodoc */
    35        config ADC10.Instance adc10;
    36    
    37       /*! Define an array to describe all device pins. The 1st dimension
    38        *  denotes the port, the second the pin on that port. On an
    39        *  MSP430G2x52 device, there are 8 + 8 = 16 pins total.
    40        */
    41    
    42            /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    43             * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    44        /* TODO: For this device the config variable definition has been moved into the
    45         * corresponding XS file due to its size. This needs a more consistent solution. */
    46        config DevicePin_t devicePins[8][8];
    47    
    48            /*! Implementation of Device Pin Functional Configuration */
    49            override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    50    
    51            /*! Determine if each Register needs to be forced set or not */
    52            readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    53            [
    54                    { register : "P1OUT" , regForceSet : true  },
    55                    { register : "P1SEL" , regForceSet : false },
    56                    { register : "P1SEL2", regForceSet : false },           
    57                    { register : "P1DIR" , regForceSet : false },
    58                    { register : "P1REN" , regForceSet : false },
    59                    { register : "P1IES" , regForceSet : true  },
    60                    { register : "P1IFG" , regForceSet : true  },
    61                    { register : "P1IE"  , regForceSet : false },
    62                    { register : "P2OUT" , regForceSet : true  },
    63                    { register : "P2SEL" , regForceSet : false },
    64                    { register : "P2SEL2", regForceSet : false },
    65                    { register : "P2DIR" , regForceSet : false },
    66                    { register : "P2REN" , regForceSet : false },
    67                    { register : "P2IES" , regForceSet : true  },
    68                    { register : "P2IFG" , regForceSet : true  },
    69                    { register : "P2IE"  , regForceSet : false }
    70            ];
    71            
    72        /*
    73         *  GPIO Digital I/O Registers
    74         *
    75         *  One GIPO instance defines the configuration of an entire,
    76         *  8-bit wide digital I/O port.
    77         */
    78         
    79        /*! Port 1 Output Register */ 
    80        config GpioBits8PxOut_t P1OUT = {
    81            Bit0        : BIT0_OFF,
    82            Bit1        : BIT1_OFF,
    83            Bit2        : BIT2_OFF,
    84            Bit3        : BIT3_OFF,
    85            Bit4        : BIT4_OFF,
    86            Bit5        : BIT5_OFF,
    87            Bit6        : BIT6_OFF,
    88            Bit7        : BIT7_OFF
    89        };
    90    
    91        /*! Port 1 Port Select Register */
    92        config GpioBits8PxSel_t P1SEL = {
    93            Bit0        : BIT0_OFF,
    94            Bit1        : BIT1_OFF,
    95            Bit2        : BIT2_OFF,
    96            Bit3        : BIT3_OFF,
    97            Bit4        : BIT4_OFF,
    98            Bit5        : BIT5_OFF,
    99            Bit6        : BIT6_OFF,
   100            Bit7        : BIT7_OFF
   101        };
   102    
   103        /*! Port 1 Port Select 2 Register */
   104        config GpioBits8PxSel2_t P1SEL2 = {
   105            Bit0        : BIT0_OFF,
   106            Bit1        : BIT1_OFF,
   107            Bit2        : BIT2_OFF,
   108            Bit3        : BIT3_OFF,
   109            Bit4        : BIT4_OFF,
   110            Bit5        : BIT5_OFF,
   111            Bit6        : BIT6_OFF,
   112            Bit7        : BIT7_OFF
   113        };
   114        
   115        /*! Port 1 Direction Register */
   116        config GpioBits8PxDir_t P1DIR = {
   117            Bit0        : BIT0_OFF,
   118            Bit1        : BIT1_OFF,
   119            Bit2        : BIT2_OFF,
   120            Bit3        : BIT3_OFF,
   121            Bit4        : BIT4_OFF,
   122            Bit5        : BIT5_OFF,
   123            Bit6        : BIT6_OFF,
   124            Bit7        : BIT7_OFF
   125        };
   126        
   127        /*! Port 1 Resistor Enable Register */
   128        config GpioBits8PxRen_t P1REN = {
   129            Bit0        : BIT0_OFF,
   130            Bit1        : BIT1_OFF,
   131            Bit2        : BIT2_OFF,
   132            Bit3        : BIT3_OFF,
   133            Bit4        : BIT4_OFF,
   134            Bit5        : BIT5_OFF,
   135            Bit6        : BIT6_OFF,
   136            Bit7        : BIT7_OFF
   137        };
   138        
   139        /*! Port 1 Interrupt Edge Select Register */
   140        config GpioBits8PxIes_t P1IES = {
   141            Bit0        : BIT0_OFF,
   142            Bit1        : BIT1_OFF,
   143            Bit2        : BIT2_OFF,
   144            Bit3        : BIT3_OFF,
   145            Bit4        : BIT4_OFF,
   146            Bit5        : BIT5_OFF,
   147            Bit6        : BIT6_OFF,
   148            Bit7        : BIT7_OFF
   149        };
   150        
   151        /*! Port 1 Interrupt Flag Register */
   152        config GpioBits8PxIfg_t P1IFG = {
   153            Bit0        : BIT0_OFF,
   154            Bit1        : BIT1_OFF,
   155            Bit2        : BIT2_OFF,
   156            Bit3        : BIT3_OFF,
   157            Bit4        : BIT4_OFF,
   158            Bit5        : BIT5_OFF,
   159            Bit6        : BIT6_OFF,
   160            Bit7        : BIT7_OFF
   161        };
   162        
   163        /*! Port 1 Interrupt Enable Register */
   164        config GpioBits8PxIe_t P1IE = {
   165            Bit0        : BIT0_OFF,
   166            Bit1        : BIT1_OFF,
   167            Bit2        : BIT2_OFF,
   168            Bit3        : BIT3_OFF,
   169            Bit4        : BIT4_OFF,
   170            Bit5        : BIT5_OFF,
   171            Bit6        : BIT6_OFF,
   172            Bit7        : BIT7_OFF
   173        };
   174    
   175        /*! Port 2 Output Register */ 
   176        config GpioBits8PxOut_t P2OUT = {
   177            Bit0        : BIT0_OFF,
   178            Bit1        : BIT1_OFF,
   179            Bit2        : BIT2_OFF,
   180            Bit3        : BIT3_OFF,
   181            Bit4        : BIT4_OFF,
   182            Bit5        : BIT5_OFF,
   183            Bit6        : BIT6_OFF,
   184            Bit7        : BIT7_OFF
   185        };
   186    
   187        /*! Port 2 Port Select Register */
   188        config GpioBits8PxSel_t P2SEL = {
   189            Bit0        : BIT0_OFF,
   190            Bit1        : BIT1_OFF,
   191            Bit2        : BIT2_OFF,
   192            Bit3        : BIT3_OFF,
   193            Bit4        : BIT4_OFF,
   194            Bit5        : BIT5_OFF,
   195            Bit6        : BIT6,         /* POR default for all 2xx devices */
   196            Bit7        : BIT7          /* POR default for all 2xx devices */
   197        };
   198    
   199        /*! Port 2 Port Select 2 Register */
   200        config GpioBits8PxSel2_t P2SEL2 = {
   201            Bit0        : BIT0_OFF,
   202            Bit1        : BIT1_OFF,
   203            Bit2        : BIT2_OFF,
   204            Bit3        : BIT3_OFF,
   205            Bit4        : BIT4_OFF,
   206            Bit5        : BIT5_OFF,
   207            Bit6        : BIT6_OFF,
   208            Bit7        : BIT7_OFF
   209        };
   210        
   211        /*! Port 2 Direction Register */
   212        config GpioBits8PxDir_t P2DIR = {
   213            Bit0        : BIT0_OFF,
   214            Bit1        : BIT1_OFF,
   215            Bit2        : BIT2_OFF,
   216            Bit3        : BIT3_OFF,
   217            Bit4        : BIT4_OFF,
   218            Bit5        : BIT5_OFF,
   219            Bit6        : BIT6_OFF,
   220            Bit7        : BIT7_OFF
   221        };
   222        
   223        /*! Port 2 Resistor Enable Register */
   224        config GpioBits8PxRen_t P2REN = {
   225            Bit0        : BIT0_OFF,
   226            Bit1        : BIT1_OFF,
   227            Bit2        : BIT2_OFF,
   228            Bit3        : BIT3_OFF,
   229            Bit4        : BIT4_OFF,
   230            Bit5        : BIT5_OFF,
   231            Bit6        : BIT6_OFF,
   232            Bit7        : BIT7_OFF
   233        };
   234        
   235        /*! Port 2 Interrupt Edge Select Register */
   236        config GpioBits8PxIes_t P2IES = {
   237            Bit0        : BIT0_OFF,
   238            Bit1        : BIT1_OFF,
   239            Bit2        : BIT2_OFF,
   240            Bit3        : BIT3_OFF,
   241            Bit4        : BIT4_OFF,
   242            Bit5        : BIT5_OFF,
   243            Bit6        : BIT6_OFF,
   244            Bit7        : BIT7_OFF
   245        };
   246        
   247        /*! Port 2 Interrupt Flag Register */
   248        config GpioBits8PxIfg_t P2IFG = {
   249            Bit0        : BIT0_OFF,
   250            Bit1        : BIT1_OFF,
   251            Bit2        : BIT2_OFF,
   252            Bit3        : BIT3_OFF,
   253            Bit4        : BIT4_OFF,
   254            Bit5        : BIT5_OFF,
   255            Bit6        : BIT6_OFF,
   256            Bit7        : BIT7_OFF
   257        };
   258        
   259        /*! Port 2 Interrupt Enable Register */
   260        config GpioBits8PxIe_t P2IE = {
   261            Bit0        : BIT0_OFF,
   262            Bit1        : BIT1_OFF,
   263            Bit2        : BIT2_OFF,
   264            Bit3        : BIT3_OFF,
   265            Bit4        : BIT4_OFF,
   266            Bit5        : BIT5_OFF,
   267            Bit6        : BIT6_OFF,
   268            Bit7        : BIT7_OFF
   269        };
   270    }